From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ley Foon Tan <ley.foon.tan@intel.com>
Date: Tue, 28 Feb 2017 10:31:54 +0800
Subject: [U-Boot] [PATCH 06/20] arm: socfpga: add reset driver support
 for Arria 10
In-Reply-To: <5d2f908a-cd28-3117-206c-5b9451e47ec8@denx.de>
References: <1487756858-16730-1-git-send-email-ley.foon.tan@intel.com>
 <1487756858-16730-7-git-send-email-ley.foon.tan@intel.com>
 <a085117f-b718-c060-7be2-fe9fbaaea39a@denx.de>
 <1488190453.2424.18.camel@intel.com>
 <5d2f908a-cd28-3117-206c-5b9451e47ec8@denx.de>
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On Isn, 2017-02-27 at 11:19 +0100, Marek Vasut wrote:
> On 02/27/2017 11:14 AM, Ley Foon Tan wrote:
> > 
> > On Sab, 2017-02-25 at 22:28 +0100, Marek Vasut wrote:
> > > 
> > > On 02/22/2017 10:47 AM, Ley Foon Tan wrote:
> > > > 
> > > > 
> > > > Add reset driver support for Arria 10.
> > > > 
> > > > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> > > > Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
> > > > ---
> > > >  arch/arm/mach-socfpga/Makefile                     |   2 +
> > > >  arch/arm/mach-socfpga/include/mach/reset_manager.h |   4 +-
> > > >  .../include/mach/reset_manager_arria10.h           | 144
> > > > ++++++++
> > > >  arch/arm/mach-socfpga/reset_manager_arria10.c      | 406
> > > > +++++++++++++++++++++
> > > >  include/dt-bindings/reset/altr,rst-mgr-a10.h       | 103
> > > > ++++++
> > > >  5 files changed, 658 insertions(+), 1 deletion(-)
> > > >  create mode 100755 arch/arm/mach-
> > > > socfpga/include/mach/reset_manager_arria10.h
> > > >  create mode 100644 arch/arm/mach-
> > > > socfpga/reset_manager_arria10.c
> > > >  create mode 100644 include/dt-bindings/reset/altr,rst-mgr-
> > > > a10.h
> > > > 
> > > > diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-
> > > > socfpga/Makefile
> > > > index e83da2e..d81f003 100644
> > > > --- a/arch/arm/mach-socfpga/Makefile
> > > > +++ b/arch/arm/mach-socfpga/Makefile
> > > > @@ -10,6 +10,8 @@
> > > >  obj-y	+= misc.o timer.o reset_manager.o clock_manager.o
> > > > \
> > > >  	   fpga_manager.o board.o
> > > >  
> > > > +obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) +=
> > > > reset_manager_arria10.o
> > > > +
> > > >  obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o
> > > >  
> > > >  # QTS-generated config file wrappers
> > > > diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h
> > > > b/arch/arm/mach-socfpga/include/mach/reset_manager.h
> > > > index 9e253bf..64526b6 100644
> > > > --- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
> > > > +++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
> > > > @@ -43,7 +43,9 @@ void socfpga_per_reset_all(void);
> > > >  /* Create a human-readable reference to SoCFPGA reset. */
> > > >  #define SOCFPGA_RESET(_name)	RSTMGR_##_name
> > > >  
> > > > -#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> > > > +#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > > > +#include <asm/arch/reset_manager_arria10.h>
> > > > +#elif defined(CONFIG_TARGET_SOCFPGA_GEN5)
> > > You can use #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) instead
> > > to
> > > keep
> > > this list sorted.
> > You want sort with GEN5, ARRIA10 or sorted alphanumerically ARRIA10
> > then GEN5?
> I'd opt for sorting this in the order in which those parts came out,
> but
> that might be just my personal preference ...

Okay, will sorting it with GEN5, ARRIA10.

Thanks.

Regards
Ley Foon