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From: Huang Rui <ray.huang-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
Cc: Alvin Huan <alvin.huan-5C7GfCeVMHo@public.gmane.org>,
	Huang Rui <ray.huang-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 2/6] drm/amdgpu: add get_clockgating callback for nbio v6.1
Date: Fri, 24 Mar 2017 13:47:42 +0800	[thread overview]
Message-ID: <1490334466-17596-3-git-send-email-ray.huang@amd.com> (raw)
In-Reply-To: <1490334466-17596-1-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>

Signed-off-by: Huang Rui <ray.huang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c |  1 +
 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 15 +++++++++++++++
 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.h |  1 +
 3 files changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index 2c170f1..743a852 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -49,6 +49,7 @@ static const struct cg_flag_name clocks[] = {
 	{AMD_CG_SUPPORT_MC_MGCG, "Memory Controller Medium Grain Clock Gating"},
 	{AMD_CG_SUPPORT_SDMA_LS, "System Direct Memory Access Light Sleep"},
 	{AMD_CG_SUPPORT_SDMA_MGCG, "System Direct Memory Access Medium Grain Clock Gating"},
+	{AMD_CG_SUPPORT_BIF_MGCG, "Bus Interface Medium Grain Clock Gating"},
 	{AMD_CG_SUPPORT_BIF_LS, "Bus Interface Light Sleep"},
 	{AMD_CG_SUPPORT_UVD_MGCG, "Unified Video Decoder Medium Grain Clock Gating"},
 	{AMD_CG_SUPPORT_VCE_MGCG, "Video Compression Engine Medium Grain Clock Gating"},
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
index f517e9a..c0945e8 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
@@ -206,6 +206,21 @@ void nbio_v6_1_update_medium_grain_light_sleep(struct amdgpu_device *adev,
 		WREG32_PCIE(smnPCIE_CNTL2, data);
 }
 
+void nbio_v6_1_get_clockgating_state(struct amdgpu_device *adev, u32 *flags)
+{
+	int data;
+
+	/* AMD_CG_SUPPORT_BIF_MGCG */
+	data = RREG32_PCIE(smnCPM_CONTROL);
+	if (data & CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK)
+		*flags |= AMD_CG_SUPPORT_BIF_MGCG;
+
+	/* AMD_CG_SUPPORT_BIF_LS */
+	data = RREG32_PCIE(smnPCIE_CNTL2);
+	if (data & PCIE_CNTL2__SLV_MEM_LS_EN_MASK)
+		*flags |= AMD_CG_SUPPORT_BIF_LS;
+}
+
 struct nbio_hdp_flush_reg nbio_v6_1_hdp_flush_reg;
 struct nbio_pcie_index_data nbio_v6_1_pcie_index_data;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.h b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.h
index a778d1c..a7e6f39 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.h
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.h
@@ -48,5 +48,6 @@ void nbio_v6_1_ih_control(struct amdgpu_device *adev);
 u32 nbio_v6_1_get_rev_id(struct amdgpu_device *adev);
 void nbio_v6_1_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable);
 void nbio_v6_1_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable);
+void nbio_v6_1_get_clockgating_state(struct amdgpu_device *adev, u32 *flags);
 
 #endif
-- 
2.7.4

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  parent reply	other threads:[~2017-03-24  5:47 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-24  5:47 [PATCH 0/6] drm/amdgpu: add get clockgating functions for new asic Huang Rui
     [not found] ` <1490334466-17596-1-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2017-03-24  5:47   ` [PATCH 1/6] drm/amdgpu: add get_clockgating callback for gfx v9 Huang Rui
2017-03-24  5:47   ` Huang Rui [this message]
2017-03-24  5:47   ` [PATCH 3/6] drm/amdgpu: add get_clockgating callback for soc15 Huang Rui
     [not found]     ` <1490334466-17596-4-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2017-03-24 12:49       ` William Lewis
2017-03-24  5:47   ` [PATCH 4/6] drm/amdgpu: add get_clockgating for sdma v4 Huang Rui
2017-03-24  5:47   ` [PATCH 5/6] drm/amdgpu: add get_clockgating callback for mmhub v1 Huang Rui
2017-03-24  5:47   ` [PATCH 6/6] drm/amdgpu: fix to remove HDP MGCG on soc15 Huang Rui
     [not found]     ` <1490334466-17596-7-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2017-03-24 14:19       ` Deucher, Alexander
2017-03-24 12:57   ` [PATCH 0/6] drm/amdgpu: add get clockgating functions for new asic Edward O'Callaghan

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