* [U-Boot] [PATCH 0/5] arm: i.MX6: SabreSD: Add initial dts support
@ 2017-03-30 9:58 Jagan Teki
2017-03-30 9:58 ` [U-Boot] [PATCH 1/5] arm: dts: i.MX6: Add imx6qdl-sabresd.dtsi Jagan Teki
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: Jagan Teki @ 2017-03-30 9:58 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jagan@amarulasolutions.com>
This series add initial devicetree support for i.MX6 Quad and Quad Plus
SabreSD boards. Since fdt require some more time to stable, this series
add new defconfigs for quad and quadplus boards by make other deconfigs
unchange.
Once more fdt nodes and proper testing is done, the legacy defconfigs
along with other imximage files will remove.
thanks!
Jagan.
Jagan Teki (5):
arm: dts: i.MX6: Add imx6qdl-sabresd.dtsi
arm: dts: imx6qdl-sabresd: Add imx6q-sabresd.dts
arm: imx6q: sabresd: Add initial devicetree support
arm: dts: imx6qdl-sabresd: Add imx6qp-sabresd.dts
arm: imx6qp: sabresd: Add initial devicetree support
arch/arm/dts/Makefile | 2 +
arch/arm/dts/imx6q-sabresd.dts | 21 ++++++
arch/arm/dts/imx6qdl-sabresd.dtsi | 113 +++++++++++++++++++++++++++++
arch/arm/dts/imx6qp-sabresd.dts | 85 ++++++++++++++++++++++
board/freescale/mx6sabresd/MAINTAINERS | 2 +
board/freescale/mx6sabresd/mx6sabresd.c | 122 +++++++++++++++++++++-----------
configs/imx6q_sabresd_defconfig | 59 +++++++++++++++
configs/imx6qp_sabresd_defconfig | 60 ++++++++++++++++
include/configs/mx6sabresd.h | 4 ++
9 files changed, 428 insertions(+), 40 deletions(-)
create mode 100644 arch/arm/dts/imx6q-sabresd.dts
create mode 100644 arch/arm/dts/imx6qdl-sabresd.dtsi
create mode 100644 arch/arm/dts/imx6qp-sabresd.dts
create mode 100644 configs/imx6q_sabresd_defconfig
create mode 100644 configs/imx6qp_sabresd_defconfig
--
1.9.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 1/5] arm: dts: i.MX6: Add imx6qdl-sabresd.dtsi
2017-03-30 9:58 [U-Boot] [PATCH 0/5] arm: i.MX6: SabreSD: Add initial dts support Jagan Teki
@ 2017-03-30 9:58 ` Jagan Teki
2017-03-30 9:58 ` [U-Boot] [PATCH 2/5] arm: dts: imx6qdl-sabresd: Add imx6q-sabresd.dts Jagan Teki
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Jagan Teki @ 2017-03-30 9:58 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jagan@amarulasolutions.com>
Add common minimal dtsi file for i.MX6QDL Sabresd boards,
- uart1
- usdhc2
- usdhc3
- usdhc4
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/dts/imx6qdl-sabresd.dtsi | 111 ++++++++++++++++++++++++++++++++++++++
1 file changed, 111 insertions(+)
create mode 100644 arch/arm/dts/imx6qdl-sabresd.dtsi
diff --git a/arch/arm/dts/imx6qdl-sabresd.dtsi b/arch/arm/dts/imx6qdl-sabresd.dtsi
new file mode 100644
index 0000000..1846274
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-sabresd.dtsi
@@ -0,0 +1,111 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ chosen {
+ stdout-path = &uart1;
+ };
+
+ memory {
+ reg = <0x10000000 0x40000000>;
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
+};
+
+&usdhc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ bus-width = <8>;
+ cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ bus-width = <8>;
+ cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&usdhc4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc4>;
+ bus-width = <8>;
+ non-removable;
+ no-1-8-v;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
+ >;
+ };
+
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
+ MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
+ MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
+ MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
+ MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
+ MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
+ MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
+ MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
+ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
+ >;
+ };
+
+ pinctrl_usdhc4: usdhc4grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
+ >;
+ };
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 2/5] arm: dts: imx6qdl-sabresd: Add imx6q-sabresd.dts
2017-03-30 9:58 [U-Boot] [PATCH 0/5] arm: i.MX6: SabreSD: Add initial dts support Jagan Teki
2017-03-30 9:58 ` [U-Boot] [PATCH 1/5] arm: dts: i.MX6: Add imx6qdl-sabresd.dtsi Jagan Teki
@ 2017-03-30 9:58 ` Jagan Teki
2017-03-30 9:58 ` [U-Boot] [PATCH 3/5] arm: imx6q: sabresd: Add initial devicetree support Jagan Teki
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Jagan Teki @ 2017-03-30 9:58 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jagan@amarulasolutions.com>
Add initial dts support for i.MX6 Quad Sabresd board.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/imx6q-sabresd.dts | 21 +++++++++++++++++++++
2 files changed, 22 insertions(+)
create mode 100644 arch/arm/dts/imx6q-sabresd.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index aa0bd12..18b1ee6 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -317,6 +317,7 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
imx6dl-icore-rqs.dtb \
imx6q-icore.dtb \
imx6q-icore-rqs.dtb \
+ imx6q-sabresd.dtb \
imx6sx-sabreauto.dtb \
imx6ul-geam-kit.dtb \
imx6ul-isiot-emmc.dtb \
diff --git a/arch/arm/dts/imx6q-sabresd.dts b/arch/arm/dts/imx6q-sabresd.dts
new file mode 100644
index 0000000..5e62c24
--- /dev/null
+++ b/arch/arm/dts/imx6q-sabresd.dts
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-sabresd.dtsi"
+
+/ {
+ model = "Freescale i.MX6 Quad SABRE Smart Device Board";
+ compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 3/5] arm: imx6q: sabresd: Add initial devicetree support
2017-03-30 9:58 [U-Boot] [PATCH 0/5] arm: i.MX6: SabreSD: Add initial dts support Jagan Teki
2017-03-30 9:58 ` [U-Boot] [PATCH 1/5] arm: dts: i.MX6: Add imx6qdl-sabresd.dtsi Jagan Teki
2017-03-30 9:58 ` [U-Boot] [PATCH 2/5] arm: dts: imx6qdl-sabresd: Add imx6q-sabresd.dts Jagan Teki
@ 2017-03-30 9:58 ` Jagan Teki
2017-03-30 9:59 ` [U-Boot] [PATCH 4/5] arm: dts: imx6qdl-sabresd: Add imx6qp-sabresd.dts Jagan Teki
2017-03-30 9:59 ` [U-Boot] [PATCH 5/5] arm: imx6qp: sabresd: Add initial devicetree support Jagan Teki
4 siblings, 0 replies; 6+ messages in thread
From: Jagan Teki @ 2017-03-30 9:58 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jagan@amarulasolutions.com>
Add initial devicetree support for i.MX6 Quad Sabresd board.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
board/freescale/mx6sabresd/MAINTAINERS | 1 +
board/freescale/mx6sabresd/mx6sabresd.c | 122 +++++++++++++++++++++-----------
configs/imx6q_sabresd_defconfig | 59 +++++++++++++++
include/configs/mx6sabresd.h | 4 ++
4 files changed, 146 insertions(+), 40 deletions(-)
create mode 100644 configs/imx6q_sabresd_defconfig
diff --git a/board/freescale/mx6sabresd/MAINTAINERS b/board/freescale/mx6sabresd/MAINTAINERS
index add2314..434548a 100644
--- a/board/freescale/mx6sabresd/MAINTAINERS
+++ b/board/freescale/mx6sabresd/MAINTAINERS
@@ -6,3 +6,4 @@ F: include/configs/mx6sabresd.h
F: configs/mx6dlsabresd_defconfig
F: configs/mx6qsabresd_defconfig
F: configs/mx6sabresd_spl_defconfig
+F: configs/imx6q_sabresd_defconfig
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 80a7789..db25dad 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -241,7 +241,7 @@ static void setup_iomux_uart(void)
imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
}
-#ifdef CONFIG_FSL_ESDHC
+#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_OF_CONTROL)
struct fsl_esdhc_cfg usdhc_cfg[3] = {
{USDHC2_BASE_ADDR},
{USDHC3_BASE_ADDR},
@@ -276,9 +276,9 @@ int board_mmc_getcd(struct mmc *mmc)
return ret;
}
+#ifndef CONFIG_FSL_ESDHC
int board_mmc_init(bd_t *bis)
{
-#ifndef CONFIG_SPL_BUILD
int ret;
int i;
@@ -321,46 +321,9 @@ int board_mmc_init(bd_t *bis)
}
return 0;
-#else
- struct src *psrc = (struct src *)SRC_BASE_ADDR;
- unsigned reg = readl(&psrc->sbmr1) >> 11;
- /*
- * Upon reading BOOT_CFG register the following map is done:
- * Bit 11 and 12 of BOOT_CFG register can determine the current
- * mmc port
- * 0x1 SD1
- * 0x2 SD2
- * 0x3 SD4
- */
-
- switch (reg & 0x3) {
- case 0x1:
- imx_iomux_v3_setup_multiple_pads(
- usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
- usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR;
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
- gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
- break;
- case 0x2:
- imx_iomux_v3_setup_multiple_pads(
- usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
- usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
- gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
- break;
- case 0x3:
- imx_iomux_v3_setup_multiple_pads(
- usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
- usdhc_cfg[0].esdhc_base = USDHC4_BASE_ADDR;
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
- gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
- break;
- }
-
- return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
-#endif
}
#endif
+#endif
static int ar8031_phy_fixup(struct phy_device *phydev)
{
@@ -717,6 +680,85 @@ int checkboard(void)
#include <spl.h>
#include <libfdt.h>
+#ifdef CONFIG_FSL_ESDHC
+
+#if defined(CONFIG_OF_CONTROL) && !defined(CONFIG_DM_MMC)
+struct fsl_esdhc_cfg usdhc_cfg[3] = {
+ {USDHC2_BASE_ADDR},
+ {USDHC3_BASE_ADDR},
+ {USDHC4_BASE_ADDR},
+};
+
+#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 2)
+#define USDHC3_CD_GPIO IMX_GPIO_NR(2, 0)
+
+int board_mmc_get_env_dev(int devno)
+{
+ return devno - 1;
+}
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+ struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
+ int ret = 0;
+
+ switch (cfg->esdhc_base) {
+ case USDHC2_BASE_ADDR:
+ ret = !gpio_get_value(USDHC2_CD_GPIO);
+ break;
+ case USDHC3_BASE_ADDR:
+ ret = !gpio_get_value(USDHC3_CD_GPIO);
+ break;
+ case USDHC4_BASE_ADDR:
+ ret = 1; /* eMMC/uSDHC4 is always present */
+ break;
+ }
+
+ return ret;
+}
+#endif
+
+int board_mmc_init(bd_t *bis)
+{
+ struct src *psrc = (struct src *)SRC_BASE_ADDR;
+ unsigned reg = readl(&psrc->sbmr1) >> 11;
+ /*
+ * Upon reading BOOT_CFG register the following map is done:
+ * Bit 11 and 12 of BOOT_CFG register can determine the current
+ * mmc port
+ * 0x1 SD1
+ * 0x2 SD2
+ * 0x3 SD4
+ */
+
+ switch (reg & 0x3) {
+ case 0x1:
+ imx_iomux_v3_setup_multiple_pads(
+ usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
+ usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR;
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+ gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
+ break;
+ case 0x2:
+ imx_iomux_v3_setup_multiple_pads(
+ usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
+ usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
+ break;
+ case 0x3:
+ imx_iomux_v3_setup_multiple_pads(
+ usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
+ usdhc_cfg[0].esdhc_base = USDHC4_BASE_ADDR;
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+ gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
+ break;
+ }
+
+ return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+}
+#endif
+
#ifdef CONFIG_SPL_OS_BOOT
int spl_start_uboot(void)
{
diff --git a/configs/imx6q_sabresd_defconfig b/configs/imx6q_sabresd_defconfig
new file mode 100644
index 0000000..3919231
--- /dev/null
+++ b/configs/imx6q_sabresd_defconfig
@@ -0,0 +1,59 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_MX6SABRESD=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_VIDEO=y
+CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q"
+CONFIG_BOOTDELAY=3
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PCI=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="FSL"
+CONFIG_G_DNL_VENDOR_NUM=0x0525
+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+# CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_OF_LIBFDT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_MMC=y
+# CONFIG_BLK is not set
+# CONFIG_DM_MMC_OPS is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index 598ab9a..9885a5c 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -11,6 +11,10 @@
#ifdef CONFIG_SPL
#include "imx6_spl.h"
+# ifdef CONFIG_SPL_BUILD
+# undef CONFIG_DM_GPIO
+# undef CONFIG_DM_MMC
+# endif
#endif
#define CONFIG_MACH_TYPE 3980
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 4/5] arm: dts: imx6qdl-sabresd: Add imx6qp-sabresd.dts
2017-03-30 9:58 [U-Boot] [PATCH 0/5] arm: i.MX6: SabreSD: Add initial dts support Jagan Teki
` (2 preceding siblings ...)
2017-03-30 9:58 ` [U-Boot] [PATCH 3/5] arm: imx6q: sabresd: Add initial devicetree support Jagan Teki
@ 2017-03-30 9:59 ` Jagan Teki
2017-03-30 9:59 ` [U-Boot] [PATCH 5/5] arm: imx6qp: sabresd: Add initial devicetree support Jagan Teki
4 siblings, 0 replies; 6+ messages in thread
From: Jagan Teki @ 2017-03-30 9:59 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jagan@amarulasolutions.com>
Add initial dts support for i.MX6 Quad Plus Sabresd board.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/imx6qdl-sabresd.dtsi | 96 ++++++++++++++++++++-------------------
arch/arm/dts/imx6qp-sabresd.dts | 85 ++++++++++++++++++++++++++++++++++
3 files changed, 135 insertions(+), 47 deletions(-)
create mode 100644 arch/arm/dts/imx6qp-sabresd.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 18b1ee6..b6042f3 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -318,6 +318,7 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
imx6q-icore.dtb \
imx6q-icore-rqs.dtb \
imx6q-sabresd.dtb \
+ imx6qp-sabresd.dtb \
imx6sx-sabreauto.dtb \
imx6ul-geam-kit.dtb \
imx6ul-isiot-emmc.dtb \
diff --git a/arch/arm/dts/imx6qdl-sabresd.dtsi b/arch/arm/dts/imx6qdl-sabresd.dtsi
index 1846274..2986cb4 100644
--- a/arch/arm/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/dts/imx6qdl-sabresd.dtsi
@@ -56,56 +56,58 @@
};
&iomuxc {
- pinctrl_uart1: uart1grp {
- fsl,pins = <
- MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
- MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
- >;
- };
+ imx6qdl-sabresd {
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
+ >;
+ };
- pinctrl_usdhc2: usdhc2grp {
- fsl,pins = <
- MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
- MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
- MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
- MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
- MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
- MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
- MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
- MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
- MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
- MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
- >;
- };
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
+ MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
+ MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
+ MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
+ MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
+ >;
+ };
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins = <
- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
- MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
- MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
- MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
- MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
- >;
- };
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
+ MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
+ MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
+ MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
+ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
+ >;
+ };
- pinctrl_usdhc4: usdhc4grp {
- fsl,pins = <
- MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
- MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
- MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
- MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
- MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
- MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
- MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
- MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
- MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
- MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
- >;
+ pinctrl_usdhc4: usdhc4grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
+ >;
+ };
};
};
diff --git a/arch/arm/dts/imx6qp-sabresd.dts b/arch/arm/dts/imx6qp-sabresd.dts
new file mode 100644
index 0000000..b882aee
--- /dev/null
+++ b/arch/arm/dts/imx6qp-sabresd.dts
@@ -0,0 +1,85 @@
+/*
+ * Copyright 2016 Freescale Semiconductor, Inc.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-sabresd.dtsi"
+
+/ {
+ model = "Freescale i.MX6 Quad Plus SABRE Smart Device Board";
+ compatible = "fsl,imx6qp-sabresd", "fsl,imx6qp";
+};
+
+&iomuxc {
+ imx6qdl-sabresd {
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071
+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
+ MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
+ MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
+ MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
+ MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10071
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
+ MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
+ MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
+ MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
+ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
+ >;
+ };
+ };
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 5/5] arm: imx6qp: sabresd: Add initial devicetree support
2017-03-30 9:58 [U-Boot] [PATCH 0/5] arm: i.MX6: SabreSD: Add initial dts support Jagan Teki
` (3 preceding siblings ...)
2017-03-30 9:59 ` [U-Boot] [PATCH 4/5] arm: dts: imx6qdl-sabresd: Add imx6qp-sabresd.dts Jagan Teki
@ 2017-03-30 9:59 ` Jagan Teki
4 siblings, 0 replies; 6+ messages in thread
From: Jagan Teki @ 2017-03-30 9:59 UTC (permalink / raw)
To: u-boot
From: Jagan Teki <jagan@amarulasolutions.com>
Add initial dts support for i.MX6 Quad Plus Sabresd board.
Boot from MMC:
-------------
U-Boot SPL 2017.03-33690-ga80e4f6-dirty (Mar 30 2017 - 00:40:29)
Trying to boot from MMC1
U-Boot 2017.03-33690-ga80e4f6-dirty (Mar 30 2017 - 00:40:29 +0530)
CPU: Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz)
CPU: Automotive temperature grade (-40C to 125C) at 29C
Reset cause: POR
Model: Freescale i.MX6 Quad Plus SABRE Smart Device Board
Board: MX6-SabreSD
I2C: ready
DRAM: 1 GiB
PMIC: PFUZE100 ID=0x10
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
*** Warning - bad CRC, using default environment
gpio at 020a4000: dir_output: error: gpio GPIO3_19 not reserved
gpio at 020a4000: set_value: error: gpio GPIO3_19 not reserved
gpio at 020b4000: dir_output: error: gpio GPIO7_12 not reserved
gpio at 020b4000: set_value: error: gpio GPIO7_12 not reserved
PCI: pcie phy link never came up
No panel detected: default to Hannstar-XGA
gpio at 0209c000: dir_output: error: gpio GPIO1_21 not reserved
Display: Hannstar-XGA (1024x768)
In: serial
Out: serial
Err: serial
Net: gpio at 0209c000: dir_output: error: gpio GPIO1_25 not reserved
gpio at 0209c000: set_value: error: gpio GPIO1_25 not reserved
FEC [PRIME]
Hit any key to stop autoboot: 0
=>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
board/freescale/mx6sabresd/MAINTAINERS | 1 +
configs/imx6qp_sabresd_defconfig | 60 ++++++++++++++++++++++++++++++++++
2 files changed, 61 insertions(+)
create mode 100644 configs/imx6qp_sabresd_defconfig
diff --git a/board/freescale/mx6sabresd/MAINTAINERS b/board/freescale/mx6sabresd/MAINTAINERS
index 434548a..40507f8 100644
--- a/board/freescale/mx6sabresd/MAINTAINERS
+++ b/board/freescale/mx6sabresd/MAINTAINERS
@@ -7,3 +7,4 @@ F: configs/mx6dlsabresd_defconfig
F: configs/mx6qsabresd_defconfig
F: configs/mx6sabresd_spl_defconfig
F: configs/imx6q_sabresd_defconfig
+F: configs/imx6qp_sabresd_defconfig
diff --git a/configs/imx6qp_sabresd_defconfig b/configs/imx6qp_sabresd_defconfig
new file mode 100644
index 0000000..73fbdb2
--- /dev/null
+++ b/configs/imx6qp_sabresd_defconfig
@@ -0,0 +1,60 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_MX6SABRESD=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_VIDEO=y
+CONFIG_DEFAULT_DEVICE_TREE="imx6qp-sabresd"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q"
+CONFIG_BOOTDELAY=3
+CONFIG_DEFAULT_FDT_FILE="imx6qp-sabresd.dtb"
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PCI=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="FSL"
+CONFIG_G_DNL_VENDOR_NUM=0x0525
+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+# CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_OF_LIBFDT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_MMC=y
+# CONFIG_BLK is not set
+# CONFIG_DM_MMC_OPS is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
end of thread, other threads:[~2017-03-30 9:59 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-03-30 9:58 [U-Boot] [PATCH 0/5] arm: i.MX6: SabreSD: Add initial dts support Jagan Teki
2017-03-30 9:58 ` [U-Boot] [PATCH 1/5] arm: dts: i.MX6: Add imx6qdl-sabresd.dtsi Jagan Teki
2017-03-30 9:58 ` [U-Boot] [PATCH 2/5] arm: dts: imx6qdl-sabresd: Add imx6q-sabresd.dts Jagan Teki
2017-03-30 9:58 ` [U-Boot] [PATCH 3/5] arm: imx6q: sabresd: Add initial devicetree support Jagan Teki
2017-03-30 9:59 ` [U-Boot] [PATCH 4/5] arm: dts: imx6qdl-sabresd: Add imx6qp-sabresd.dts Jagan Teki
2017-03-30 9:59 ` [U-Boot] [PATCH 5/5] arm: imx6qp: sabresd: Add initial devicetree support Jagan Teki
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