From mboxrd@z Thu Jan 1 00:00:00 1970 From: Xie XiuQi Subject: [PATCH v3 3/8] arm64: apei: add a per-cpu variable to indecate sei is processing Date: Thu, 30 Mar 2017 18:31:12 +0800 Message-ID: <1490869877-118713-13-git-send-email-xiexiuqi@huawei.com> References: <1490869877-118713-1-git-send-email-xiexiuqi@huawei.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1490869877-118713-1-git-send-email-xiexiuqi@huawei.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu To: christoffer.dall@linaro.org, marc.zyngier@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, james.morse@arm.com, fu.wei@linaro.org, rostedt@goodmis.org, hanjun.guo@linaro.org, shiju.jose@huawei.com Cc: wuquanming@huawei.com, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, gengdongjiu@huawei.com, wangxiongfeng2@huawei.com, linux-acpi@vger.kernel.org, zhengqiang10@huawei.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org List-Id: linux-acpi@vger.kernel.org Add a per-cpu variable to indicate sei is processing, with which we could use to reserve a separate virtual space address page for sei in next patch Signed-off-by: Xie XiuQi --- arch/arm64/kernel/traps.c | 4 ++++ include/acpi/ghes.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 53710a2..955dc8c 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -615,6 +615,8 @@ const char *esr_get_class_string(u32 esr) return esr_class_str[ESR_ELx_EC(esr)]; } +DEFINE_PER_CPU(int, sei_in_process); + /* * bad_mode handles the impossible case in the exception vector. This is always * fatal. @@ -632,7 +634,9 @@ asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr) * of cper records at a time. There is no risk for one cpu to parse ghes table. */ if (IS_ENABLED(CONFIG_ACPI_APEI_SEI) && ESR_ELx_EC(esr) == ESR_ELx_EC_SERROR) { + this_cpu_inc(sei_in_process); ghes_notify_sei(); + this_cpu_dec(sei_in_process); } die("Oops - bad mode", regs, 0); diff --git a/include/acpi/ghes.h b/include/acpi/ghes.h index 10d752e..eed79ea 100644 --- a/include/acpi/ghes.h +++ b/include/acpi/ghes.h @@ -102,4 +102,6 @@ static inline void *acpi_hest_generic_data_payload(struct acpi_hest_generic_data int ghes_notify_sea(void); int ghes_notify_sei(void); +DECLARE_PER_CPU(int, sei_in_process); + #endif /* GHES_H */ -- 1.8.3.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933696AbdC3KmJ (ORCPT ); Thu, 30 Mar 2017 06:42:09 -0400 Received: from szxga03-in.huawei.com ([45.249.212.189]:4913 "EHLO dggrg03-dlp.huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S933311AbdC3Kes (ORCPT ); Thu, 30 Mar 2017 06:34:48 -0400 From: Xie XiuQi To: , , , , , , , , CC: , , , , , , , , , Subject: [PATCH v3 3/8] arm64: apei: add a per-cpu variable to indecate sei is processing Date: Thu, 30 Mar 2017 18:31:12 +0800 Message-ID: <1490869877-118713-13-git-send-email-xiexiuqi@huawei.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1490869877-118713-1-git-send-email-xiexiuqi@huawei.com> References: <1490869877-118713-1-git-send-email-xiexiuqi@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.175.113.25] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090202.58DCDF43.00EB,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: d6a0965cb71f7b080e4bc9779bb2aa7e Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a per-cpu variable to indicate sei is processing, with which we could use to reserve a separate virtual space address page for sei in next patch Signed-off-by: Xie XiuQi --- arch/arm64/kernel/traps.c | 4 ++++ include/acpi/ghes.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 53710a2..955dc8c 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -615,6 +615,8 @@ const char *esr_get_class_string(u32 esr) return esr_class_str[ESR_ELx_EC(esr)]; } +DEFINE_PER_CPU(int, sei_in_process); + /* * bad_mode handles the impossible case in the exception vector. This is always * fatal. @@ -632,7 +634,9 @@ asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr) * of cper records at a time. There is no risk for one cpu to parse ghes table. */ if (IS_ENABLED(CONFIG_ACPI_APEI_SEI) && ESR_ELx_EC(esr) == ESR_ELx_EC_SERROR) { + this_cpu_inc(sei_in_process); ghes_notify_sei(); + this_cpu_dec(sei_in_process); } die("Oops - bad mode", regs, 0); diff --git a/include/acpi/ghes.h b/include/acpi/ghes.h index 10d752e..eed79ea 100644 --- a/include/acpi/ghes.h +++ b/include/acpi/ghes.h @@ -102,4 +102,6 @@ static inline void *acpi_hest_generic_data_payload(struct acpi_hest_generic_data int ghes_notify_sea(void); int ghes_notify_sei(void); +DECLARE_PER_CPU(int, sei_in_process); + #endif /* GHES_H */ -- 1.8.3.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Xie XiuQi Subject: [PATCH v3 3/8] arm64: apei: add a per-cpu variable to indecate sei is processing Date: Thu, 30 Mar 2017 18:31:12 +0800 Message-ID: <1490869877-118713-13-git-send-email-xiexiuqi@huawei.com> References: <1490869877-118713-1-git-send-email-xiexiuqi@huawei.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: wuquanming@huawei.com, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, gengdongjiu@huawei.com, wangxiongfeng2@huawei.com, linux-acpi@vger.kernel.org, zhengqiang10@huawei.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org To: , , , , , , , , Return-path: In-Reply-To: <1490869877-118713-1-git-send-email-xiexiuqi@huawei.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu List-Id: kvm.vger.kernel.org Add a per-cpu variable to indicate sei is processing, with which we could use to reserve a separate virtual space address page for sei in next patch Signed-off-by: Xie XiuQi --- arch/arm64/kernel/traps.c | 4 ++++ include/acpi/ghes.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 53710a2..955dc8c 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -615,6 +615,8 @@ const char *esr_get_class_string(u32 esr) return esr_class_str[ESR_ELx_EC(esr)]; } +DEFINE_PER_CPU(int, sei_in_process); + /* * bad_mode handles the impossible case in the exception vector. This is always * fatal. @@ -632,7 +634,9 @@ asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr) * of cper records at a time. There is no risk for one cpu to parse ghes table. */ if (IS_ENABLED(CONFIG_ACPI_APEI_SEI) && ESR_ELx_EC(esr) == ESR_ELx_EC_SERROR) { + this_cpu_inc(sei_in_process); ghes_notify_sei(); + this_cpu_dec(sei_in_process); } die("Oops - bad mode", regs, 0); diff --git a/include/acpi/ghes.h b/include/acpi/ghes.h index 10d752e..eed79ea 100644 --- a/include/acpi/ghes.h +++ b/include/acpi/ghes.h @@ -102,4 +102,6 @@ static inline void *acpi_hest_generic_data_payload(struct acpi_hest_generic_data int ghes_notify_sea(void); int ghes_notify_sei(void); +DECLARE_PER_CPU(int, sei_in_process); + #endif /* GHES_H */ -- 1.8.3.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: xiexiuqi@huawei.com (Xie XiuQi) Date: Thu, 30 Mar 2017 18:31:12 +0800 Subject: [PATCH v3 3/8] arm64: apei: add a per-cpu variable to indecate sei is processing In-Reply-To: <1490869877-118713-1-git-send-email-xiexiuqi@huawei.com> References: <1490869877-118713-1-git-send-email-xiexiuqi@huawei.com> Message-ID: <1490869877-118713-13-git-send-email-xiexiuqi@huawei.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Add a per-cpu variable to indicate sei is processing, with which we could use to reserve a separate virtual space address page for sei in next patch Signed-off-by: Xie XiuQi --- arch/arm64/kernel/traps.c | 4 ++++ include/acpi/ghes.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 53710a2..955dc8c 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -615,6 +615,8 @@ const char *esr_get_class_string(u32 esr) return esr_class_str[ESR_ELx_EC(esr)]; } +DEFINE_PER_CPU(int, sei_in_process); + /* * bad_mode handles the impossible case in the exception vector. This is always * fatal. @@ -632,7 +634,9 @@ asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr) * of cper records at a time. There is no risk for one cpu to parse ghes table. */ if (IS_ENABLED(CONFIG_ACPI_APEI_SEI) && ESR_ELx_EC(esr) == ESR_ELx_EC_SERROR) { + this_cpu_inc(sei_in_process); ghes_notify_sei(); + this_cpu_dec(sei_in_process); } die("Oops - bad mode", regs, 0); diff --git a/include/acpi/ghes.h b/include/acpi/ghes.h index 10d752e..eed79ea 100644 --- a/include/acpi/ghes.h +++ b/include/acpi/ghes.h @@ -102,4 +102,6 @@ static inline void *acpi_hest_generic_data_payload(struct acpi_hest_generic_data int ghes_notify_sea(void); int ghes_notify_sei(void); +DECLARE_PER_CPU(int, sei_in_process); + #endif /* GHES_H */ -- 1.8.3.1