From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg0-f42.google.com ([74.125.83.42]:33048 "EHLO mail-pg0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751018AbdDDGMz (ORCPT ); Tue, 4 Apr 2017 02:12:55 -0400 Received: by mail-pg0-f42.google.com with SMTP id x125so142440207pgb.0 for ; Mon, 03 Apr 2017 23:12:55 -0700 (PDT) From: Amit Pundir To: gregkh@linuxfoundation.org Cc: stable@vger.kernel.org, =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Florian Fainelli Subject: [PATCH 02/33] ARM: dts: BCM5301X: Set 5 GHz wireless frequency limits on Netgear R8000 Date: Tue, 4 Apr 2017 11:42:15 +0530 Message-Id: <1491286366-30720-3-git-send-email-amit.pundir@linaro.org> In-Reply-To: <1491286366-30720-1-git-send-email-amit.pundir@linaro.org> References: <1491286366-30720-1-git-send-email-amit.pundir@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org List-ID: From: Rafał Miłecki Netgear R8000 is a tri-band home router. It has three BCM43602 chipsets two of them for 5 GHz band. Both seem the same and their firmwares report the same set of channels. The problem is due to hardware / board design there are extra limitations that should be respected. First PHY should be used for U-NII-2 and U-NII-3. Third PHY should be used for U-NII-1. Using them in a different way may result in wireless not working or in noticeably reduced performance. Basic version of this info was provided by Broadcom employee, then it has been verified by me using original vendor firmware (which has limitations hardcoded in UI). This patch uses recently introduced ieee80211-freq-limit property to describe these limitations at DT level. Referencing PCIe devices in DT required specifying all related bridges. Below you can see (a bit complex) PCI tree from R8000 that explains all entries that I needed to put in DT. 0000:00:00.0 14e4:8012 Bridge Device └─ 0000:01:00.0 14e4:aa52 Network Controller 0001:00:00.0 14e4:8012 Bridge Device └─ 0001:01:00.0 10b5:8603 Bridge Device ├─ 0001:02:01.0 10b5:8603 Bridge Device │ └─ 0001:03:00.0 14e4:aa52 Network Controller ├─ 0001:02:02.0 10b5:8603 Bridge Device │ └─ 0001:04:00.0 14e4:aa52 Network Controller ├─ 0001:02:03.0 000d:0000 0x000000 ├─ 0001:02:04.0 000d:0000 0x000000 ├─ 0001:02:05.0 000d:0000 0x000000 ├─ 0001:02:06.0 000d:0000 0x000000 ├─ (...) ├─ 0001:02:1d.0 000d:0000 0x000000 ├─ 0001:02:1e.0 000d:0000 0x000000 └─ 0001:02:1f.0 000d:0000 0x000000 Signed-off-by: Rafał Miłecki Signed-off-by: Florian Fainelli (cherry picked from commit 5d1f2d2c253037a5d89b48347d90868fa9407102) Signed-off-by: Amit Pundir --- arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 48 +++++++++++++++++++++++++++++ arch/arm/boot/dts/bcm5301x.dtsi | 8 +++++ 2 files changed, 56 insertions(+) diff --git a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts index ca18151..3551718 100644 --- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts +++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts @@ -107,6 +107,54 @@ }; }; +&pcie0 { + #address-cells = <3>; + #size-cells = <2>; + + bridge@0,0,0 { + reg = <0x0000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + + wifi@0,1,0 { + reg = <0x0000 0 0 0 0>; + ieee80211-freq-limit = <5735000 5835000>; + }; + }; +}; + +&pcie1 { + #address-cells = <3>; + #size-cells = <2>; + + bridge@1,0,0 { + reg = <0x0000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + + bridge@1,1,0 { + reg = <0x0000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + + bridge@1,2,2 { + reg = <0x1000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + + wifi@1,4,0 { + reg = <0x0000 0 0 0 0>; + ieee80211-freq-limit = <5170000 5730000>; + }; + }; + }; + }; +}; + &usb2 { vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi index ae4b388..c52711b 100644 --- a/arch/arm/boot/dts/bcm5301x.dtsi +++ b/arch/arm/boot/dts/bcm5301x.dtsi @@ -236,6 +236,14 @@ #gpio-cells = <2>; }; + pcie0: pcie@12000 { + reg = <0x00012000 0x1000>; + }; + + pcie1: pcie@13000 { + reg = <0x00013000 0x1000>; + }; + usb2: usb2@21000 { reg = <0x00021000 0x1000>; -- 2.7.4