From mboxrd@z Thu Jan 1 00:00:00 1970 From: Vikas Manocha Date: Tue, 4 Apr 2017 14:45:03 -0700 Subject: [U-Boot] [PATCH v2 01/18] stm32f7: use clock driver to enable qspi controller clock In-Reply-To: <1491342324-5820-1-git-send-email-vikas.manocha@st.com> References: <1491342324-5820-1-git-send-email-vikas.manocha@st.com> Message-ID: <1491342324-5820-2-git-send-email-vikas.manocha@st.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Signed-off-by: Vikas Manocha cc: Christophe KERELLO --- Changed in v2: None arch/arm/dts/stm32f746.dtsi | 1 + drivers/spi/stm32_qspi.c | 16 +++++++++++++++- 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi index b2b0b5f..883f818 100644 --- a/arch/arm/dts/stm32f746.dtsi +++ b/arch/arm/dts/stm32f746.dtsi @@ -78,6 +78,7 @@ reg-names = "QuadSPI", "QuadSPI-memory"; interrupts = <92>; spi-max-frequency = <108000000>; + clocks = <&rcc 0 65>; status = "disabled"; }; usart1: serial at 40011000 { diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c index 05358eb..f0434a4 100644 --- a/drivers/spi/stm32_qspi.c +++ b/drivers/spi/stm32_qspi.c @@ -17,6 +17,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -457,7 +458,20 @@ static int stm32_qspi_probe(struct udevice *bus) priv->max_hz = plat->max_hz; - clock_setup(QSPI_CLOCK_CFG); +#ifdef CONFIG_CLK + int ret; + struct clk clk; + ret = clk_get_by_index(bus, 0, &clk); + if (ret < 0) + return ret; + + ret = clk_enable(&clk); + + if (ret) { + dev_err(bus, "failed to enable clock\n"); + return ret; + } +#endif setbits_le32(&priv->regs->cr, STM32_QSPI_CR_SSHIFT); -- 1.9.1