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* Patch "MIPS: Add MIPS_CPU_FTLB for Loongson-3A R2" has been added to the 4.9-stable tree
@ 2017-04-10 14:46 gregkh
  0 siblings, 0 replies; only message in thread
From: gregkh @ 2017-04-10 14:46 UTC (permalink / raw)
  To: chenhc, Steven.Hill, gregkh, john, ralf, wuzhangjin, zhangfx
  Cc: stable, stable-commits


This is a note to let you know that I've just added the patch titled

    MIPS: Add MIPS_CPU_FTLB for Loongson-3A R2

to the 4.9-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     mips-add-mips_cpu_ftlb-for-loongson-3a-r2.patch
and it can be found in the queue-4.9 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.


>From 033cffeedbd11c140952b98e8639bf652091a17d Mon Sep 17 00:00:00 2001
From: Huacai Chen <chenhc@lemote.com>
Date: Thu, 16 Mar 2017 21:00:25 +0800
Subject: MIPS: Add MIPS_CPU_FTLB for Loongson-3A R2

From: Huacai Chen <chenhc@lemote.com>

commit 033cffeedbd11c140952b98e8639bf652091a17d upstream.

Loongson-3A R2 and newer CPU have FTLB, but Config0.MT is 1, so add
MIPS_CPU_FTLB to the CPU options.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J . Hill <Steven.Hill@caviumnetworks.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/15752/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/mips/kernel/cpu-probe.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1824,7 +1824,7 @@ static inline void cpu_probe_loongson(st
 		}
 
 		decode_configs(c);
-		c->options |= MIPS_CPU_TLBINV | MIPS_CPU_LDPTE;
+		c->options |= MIPS_CPU_FTLB | MIPS_CPU_TLBINV | MIPS_CPU_LDPTE;
 		c->writecombine = _CACHE_UNCACHED_ACCELERATED;
 		break;
 	default:


Patches currently in stable-queue which might be from chenhc@lemote.com are

queue-4.9/mips-flush-wrong-invalid-ftlb-entry-for-huge-page.patch
queue-4.9/mips-check-tlb-before-handle_ri_rdhwr-for-loongson-3.patch
queue-4.9/mips-c-r4k-fix-loongson-3-s-vcache-scache-waysize-calculation.patch
queue-4.9/mips-add-mips_cpu_ftlb-for-loongson-3a-r2.patch

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2017-04-10 14:46 Patch "MIPS: Add MIPS_CPU_FTLB for Loongson-3A R2" has been added to the 4.9-stable tree gregkh

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