From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753139AbdDKNj5 (ORCPT ); Tue, 11 Apr 2017 09:39:57 -0400 Received: from gate.crashing.org ([63.228.1.57]:35912 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752195AbdDKNjz (ORCPT ); Tue, 11 Apr 2017 09:39:55 -0400 Message-ID: <1491917928.7236.8.camel@kernel.crashing.org> Subject: Re: [PATCH v3 21/32] powerpc: include default ioremap_nopost() implementation From: Benjamin Herrenschmidt To: Lorenzo Pieralisi , linux-pci@vger.kernel.org Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Michael Ellerman , Bjorn Helgaas , Paul Mackerras Date: Tue, 11 Apr 2017 23:38:48 +1000 In-Reply-To: <20170411122923.6285-22-lorenzo.pieralisi@arm.com> References: <20170411122923.6285-1-lorenzo.pieralisi@arm.com> <20170411122923.6285-22-lorenzo.pieralisi@arm.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.22.6 (3.22.6-1.fc25) Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2017-04-11 at 13:29 +0100, Lorenzo Pieralisi wrote: > The PCI specifications (Rev 3.0, 3.2.5 "Transaction Ordering and Posting") > mandate non-posted configuration transactions. As further highlighted in > the PCIe specifications (4.0 - Rev0.3, "Ordering Considerations for the > Enhanced Configuration Access Mechanism"), through ECAM and > ECAM-derivative configuration mechanism, the memory mapped transactions > from the host CPU into Configuration Requests on the PCI express fabric > may create ordering problems for software because writes to memory > address are typically posted transactions (unless the architecture can > enforce through virtual address mapping non-posted write transactions > behaviour) but writes to Configuration Space are not posted on the PCI > express fabric. > > Include the asm-generic ioremap_nopost() implementation (currently > falling back to ioremap_nocache()) to provide a non-posted writes > ioremap interface to kernel subsystems. NAK. As explained in my reply to patch 0. > Signed-off-by: Lorenzo Pieralisi > > Cc: Michael Ellerman > > Cc: Bjorn Helgaas > > Cc: Benjamin Herrenschmidt > > Cc: Paul Mackerras > --- >  arch/powerpc/include/asm/io.h | 1 + >  1 file changed, 1 insertion(+) > > diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h > index 5ed2924..6dcd0e2 100644 > --- a/arch/powerpc/include/asm/io.h > +++ b/arch/powerpc/include/asm/io.h > @@ -757,6 +757,7 @@ extern void __iomem *ioremap_prot(phys_addr_t address, unsigned long size, >  extern void __iomem *ioremap_wc(phys_addr_t address, unsigned long size); > >  #define ioremap_nocache(addr, size) ioremap((addr), (size)) > >  #define ioremap_uc(addr, size) ioremap((addr), (size)) > +#include >   >  extern void iounmap(volatile void __iomem *addr); >   From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: Message-ID: <1491917928.7236.8.camel@kernel.crashing.org> Subject: Re: [PATCH v3 21/32] powerpc: include default ioremap_nopost() implementation From: Benjamin Herrenschmidt To: Lorenzo Pieralisi , linux-pci@vger.kernel.org Date: Tue, 11 Apr 2017 23:38:48 +1000 In-Reply-To: <20170411122923.6285-22-lorenzo.pieralisi@arm.com> References: <20170411122923.6285-1-lorenzo.pieralisi@arm.com> <20170411122923.6285-22-lorenzo.pieralisi@arm.com> Mime-Version: 1.0 List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, Michael Ellerman , linux-kernel@vger.kernel.org, Paul Mackerras , Bjorn Helgaas , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="utf-8" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+bjorn=helgaas.com@lists.infradead.org List-ID: T24gVHVlLCAyMDE3LTA0LTExIGF0IDEzOjI5ICswMTAwLCBMb3JlbnpvIFBpZXJhbGlzaSB3cm90 ZToKPiBUaGUgUENJIHNwZWNpZmljYXRpb25zIChSZXYgMy4wLCAzLjIuNSAiVHJhbnNhY3Rpb24g T3JkZXJpbmcgYW5kIFBvc3RpbmciKQo+IG1hbmRhdGUgbm9uLXBvc3RlZCBjb25maWd1cmF0aW9u IHRyYW5zYWN0aW9ucy4gQXMgZnVydGhlciBoaWdobGlnaHRlZCBpbgo+IHRoZSBQQ0llIHNwZWNp ZmljYXRpb25zICg0LjAgLSBSZXYwLjMsICJPcmRlcmluZyBDb25zaWRlcmF0aW9ucyBmb3IgdGhl Cj4gRW5oYW5jZWQgQ29uZmlndXJhdGlvbiBBY2Nlc3MgTWVjaGFuaXNtIiksIHRocm91Z2ggRUNB TSBhbmQKPiBFQ0FNLWRlcml2YXRpdmUgY29uZmlndXJhdGlvbiBtZWNoYW5pc20sIHRoZSBtZW1v cnkgbWFwcGVkIHRyYW5zYWN0aW9ucwo+IGZyb20gdGhlIGhvc3QgQ1BVIGludG8gQ29uZmlndXJh dGlvbiBSZXF1ZXN0cyBvbiB0aGUgUENJIGV4cHJlc3MgZmFicmljCj4gbWF5IGNyZWF0ZSBvcmRl cmluZyBwcm9ibGVtcyBmb3Igc29mdHdhcmUgYmVjYXVzZSB3cml0ZXMgdG8gbWVtb3J5Cj4gYWRk cmVzcyBhcmUgdHlwaWNhbGx5IHBvc3RlZCB0cmFuc2FjdGlvbnMgKHVubGVzcyB0aGUgYXJjaGl0 ZWN0dXJlIGNhbgo+IGVuZm9yY2UgdGhyb3VnaCB2aXJ0dWFsIGFkZHJlc3MgbWFwcGluZyBub24t cG9zdGVkIHdyaXRlIHRyYW5zYWN0aW9ucwo+IGJlaGF2aW91cikgYnV0IHdyaXRlcyB0byBDb25m aWd1cmF0aW9uIFNwYWNlIGFyZSBub3QgcG9zdGVkIG9uIHRoZSBQQ0kKPiBleHByZXNzIGZhYnJp Yy4KPiAKPiBJbmNsdWRlIHRoZSBhc20tZ2VuZXJpYyBpb3JlbWFwX25vcG9zdCgpIGltcGxlbWVu dGF0aW9uIChjdXJyZW50bHkKPiBmYWxsaW5nIGJhY2sgdG8gaW9yZW1hcF9ub2NhY2hlKCkpIHRv IHByb3ZpZGUgYSBub24tcG9zdGVkIHdyaXRlcwo+IGlvcmVtYXAgaW50ZXJmYWNlIHRvIGtlcm5l bCBzdWJzeXN0ZW1zLgoKTkFLLiBBcyBleHBsYWluZWQgaW4gbXkgcmVwbHkgdG8gcGF0Y2ggMC4K Cj4gU2lnbmVkLW9mZi1ieTogTG9yZW56byBQaWVyYWxpc2kgPGxvcmVuem8ucGllcmFsaXNpQGFy bS5jb20+Cj4gPiBDYzogTWljaGFlbCBFbGxlcm1hbiA8bXBlQGVsbGVybWFuLmlkLmF1Pgo+ID4g Q2M6IEJqb3JuIEhlbGdhYXMgPGJoZWxnYWFzQGdvb2dsZS5jb20+Cj4gPiBDYzogQmVuamFtaW4g SGVycmVuc2NobWlkdCA8YmVuaEBrZXJuZWwuY3Jhc2hpbmcub3JnPgo+ID4gQ2M6IFBhdWwgTWFj a2VycmFzIDxwYXVsdXNAc2FtYmEub3JnPgo+IC0tLQo+IMKgYXJjaC9wb3dlcnBjL2luY2x1ZGUv YXNtL2lvLmggfCAxICsKPiDCoDEgZmlsZSBjaGFuZ2VkLCAxIGluc2VydGlvbigrKQo+IAo+IGRp ZmYgLS1naXQgYS9hcmNoL3Bvd2VycGMvaW5jbHVkZS9hc20vaW8uaCBiL2FyY2gvcG93ZXJwYy9p bmNsdWRlL2FzbS9pby5oCj4gaW5kZXggNWVkMjkyNC4uNmRjZDBlMiAxMDA2NDQKPiAtLS0gYS9h cmNoL3Bvd2VycGMvaW5jbHVkZS9hc20vaW8uaAo+ICsrKyBiL2FyY2gvcG93ZXJwYy9pbmNsdWRl L2FzbS9pby5oCj4gQEAgLTc1Nyw2ICs3NTcsNyBAQCBleHRlcm4gdm9pZCBfX2lvbWVtICppb3Jl bWFwX3Byb3QocGh5c19hZGRyX3QgYWRkcmVzcywgdW5zaWduZWQgbG9uZyBzaXplLAo+IMKgZXh0 ZXJuIHZvaWQgX19pb21lbSAqaW9yZW1hcF93YyhwaHlzX2FkZHJfdCBhZGRyZXNzLCB1bnNpZ25l ZCBsb25nIHNpemUpOwo+ID4gwqAjZGVmaW5lIGlvcmVtYXBfbm9jYWNoZShhZGRyLCBzaXplKQlp b3JlbWFwKChhZGRyKSwgKHNpemUpKQo+ID4gwqAjZGVmaW5lIGlvcmVtYXBfdWMoYWRkciwgc2l6 ZSkJCWlvcmVtYXAoKGFkZHIpLCAoc2l6ZSkpCj4gKyNpbmNsdWRlIDxhc20tZ2VuZXJpYy9pb3Jl bWFwLW5vcG9zdC5oPgo+IMKgCj4gwqBleHRlcm4gdm9pZCBpb3VubWFwKHZvbGF0aWxlIHZvaWQg X19pb21lbSAqYWRkcik7Cj4gwqAKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1rZXJu ZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFu L2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK From mboxrd@z Thu Jan 1 00:00:00 1970 From: Benjamin Herrenschmidt Subject: Re: [PATCH v3 21/32] powerpc: include default ioremap_nopost() implementation Date: Tue, 11 Apr 2017 23:38:48 +1000 Message-ID: <1491917928.7236.8.camel@kernel.crashing.org> References: <20170411122923.6285-1-lorenzo.pieralisi@arm.com> <20170411122923.6285-22-lorenzo.pieralisi@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20170411122923.6285-22-lorenzo.pieralisi@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Lorenzo Pieralisi , linux-pci@vger.kernel.org Cc: linux-arch@vger.kernel.org, Michael Ellerman , linux-kernel@vger.kernel.org, Paul Mackerras , Bjorn Helgaas , linux-arm-kernel@lists.infradead.org List-Id: linux-arch.vger.kernel.org T24gVHVlLCAyMDE3LTA0LTExIGF0IDEzOjI5ICswMTAwLCBMb3JlbnpvIFBpZXJhbGlzaSB3cm90 ZToKPiBUaGUgUENJIHNwZWNpZmljYXRpb25zIChSZXYgMy4wLCAzLjIuNSAiVHJhbnNhY3Rpb24g T3JkZXJpbmcgYW5kIFBvc3RpbmciKQo+IG1hbmRhdGUgbm9uLXBvc3RlZCBjb25maWd1cmF0aW9u IHRyYW5zYWN0aW9ucy4gQXMgZnVydGhlciBoaWdobGlnaHRlZCBpbgo+IHRoZSBQQ0llIHNwZWNp ZmljYXRpb25zICg0LjAgLSBSZXYwLjMsICJPcmRlcmluZyBDb25zaWRlcmF0aW9ucyBmb3IgdGhl Cj4gRW5oYW5jZWQgQ29uZmlndXJhdGlvbiBBY2Nlc3MgTWVjaGFuaXNtIiksIHRocm91Z2ggRUNB TSBhbmQKPiBFQ0FNLWRlcml2YXRpdmUgY29uZmlndXJhdGlvbiBtZWNoYW5pc20sIHRoZSBtZW1v cnkgbWFwcGVkIHRyYW5zYWN0aW9ucwo+IGZyb20gdGhlIGhvc3QgQ1BVIGludG8gQ29uZmlndXJh dGlvbiBSZXF1ZXN0cyBvbiB0aGUgUENJIGV4cHJlc3MgZmFicmljCj4gbWF5IGNyZWF0ZSBvcmRl cmluZyBwcm9ibGVtcyBmb3Igc29mdHdhcmUgYmVjYXVzZSB3cml0ZXMgdG8gbWVtb3J5Cj4gYWRk cmVzcyBhcmUgdHlwaWNhbGx5IHBvc3RlZCB0cmFuc2FjdGlvbnMgKHVubGVzcyB0aGUgYXJjaGl0 ZWN0dXJlIGNhbgo+IGVuZm9yY2UgdGhyb3VnaCB2aXJ0dWFsIGFkZHJlc3MgbWFwcGluZyBub24t cG9zdGVkIHdyaXRlIHRyYW5zYWN0aW9ucwo+IGJlaGF2aW91cikgYnV0IHdyaXRlcyB0byBDb25m aWd1cmF0aW9uIFNwYWNlIGFyZSBub3QgcG9zdGVkIG9uIHRoZSBQQ0kKPiBleHByZXNzIGZhYnJp Yy4KPiAKPiBJbmNsdWRlIHRoZSBhc20tZ2VuZXJpYyBpb3JlbWFwX25vcG9zdCgpIGltcGxlbWVu dGF0aW9uIChjdXJyZW50bHkKPiBmYWxsaW5nIGJhY2sgdG8gaW9yZW1hcF9ub2NhY2hlKCkpIHRv IHByb3ZpZGUgYSBub24tcG9zdGVkIHdyaXRlcwo+IGlvcmVtYXAgaW50ZXJmYWNlIHRvIGtlcm5l bCBzdWJzeXN0ZW1zLgoKTkFLLiBBcyBleHBsYWluZWQgaW4gbXkgcmVwbHkgdG8gcGF0Y2ggMC4K Cj4gU2lnbmVkLW9mZi1ieTogTG9yZW56byBQaWVyYWxpc2kgPGxvcmVuem8ucGllcmFsaXNpQGFy bS5jb20+Cj4gPiBDYzogTWljaGFlbCBFbGxlcm1hbiA8bXBlQGVsbGVybWFuLmlkLmF1Pgo+ID4g Q2M6IEJqb3JuIEhlbGdhYXMgPGJoZWxnYWFzQGdvb2dsZS5jb20+Cj4gPiBDYzogQmVuamFtaW4g SGVycmVuc2NobWlkdCA8YmVuaEBrZXJuZWwuY3Jhc2hpbmcub3JnPgo+ID4gQ2M6IFBhdWwgTWFj a2VycmFzIDxwYXVsdXNAc2FtYmEub3JnPgo+IC0tLQo+IMKgYXJjaC9wb3dlcnBjL2luY2x1ZGUv YXNtL2lvLmggfCAxICsKPiDCoDEgZmlsZSBjaGFuZ2VkLCAxIGluc2VydGlvbigrKQo+IAo+IGRp ZmYgLS1naXQgYS9hcmNoL3Bvd2VycGMvaW5jbHVkZS9hc20vaW8uaCBiL2FyY2gvcG93ZXJwYy9p bmNsdWRlL2FzbS9pby5oCj4gaW5kZXggNWVkMjkyNC4uNmRjZDBlMiAxMDA2NDQKPiAtLS0gYS9h cmNoL3Bvd2VycGMvaW5jbHVkZS9hc20vaW8uaAo+ICsrKyBiL2FyY2gvcG93ZXJwYy9pbmNsdWRl L2FzbS9pby5oCj4gQEAgLTc1Nyw2ICs3NTcsNyBAQCBleHRlcm4gdm9pZCBfX2lvbWVtICppb3Jl bWFwX3Byb3QocGh5c19hZGRyX3QgYWRkcmVzcywgdW5zaWduZWQgbG9uZyBzaXplLAo+IMKgZXh0 ZXJuIHZvaWQgX19pb21lbSAqaW9yZW1hcF93YyhwaHlzX2FkZHJfdCBhZGRyZXNzLCB1bnNpZ25l ZCBsb25nIHNpemUpOwo+ID4gwqAjZGVmaW5lIGlvcmVtYXBfbm9jYWNoZShhZGRyLCBzaXplKQlp b3JlbWFwKChhZGRyKSwgKHNpemUpKQo+ID4gwqAjZGVmaW5lIGlvcmVtYXBfdWMoYWRkciwgc2l6 ZSkJCWlvcmVtYXAoKGFkZHIpLCAoc2l6ZSkpCj4gKyNpbmNsdWRlIDxhc20tZ2VuZXJpYy9pb3Jl bWFwLW5vcG9zdC5oPgo+IMKgCj4gwqBleHRlcm4gdm9pZCBpb3VubWFwKHZvbGF0aWxlIHZvaWQg X19pb21lbSAqYWRkcik7Cj4gwqAKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1rZXJu ZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFu L2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK From mboxrd@z Thu Jan 1 00:00:00 1970 From: benh@kernel.crashing.org (Benjamin Herrenschmidt) Date: Tue, 11 Apr 2017 23:38:48 +1000 Subject: [PATCH v3 21/32] powerpc: include default ioremap_nopost() implementation In-Reply-To: <20170411122923.6285-22-lorenzo.pieralisi@arm.com> References: <20170411122923.6285-1-lorenzo.pieralisi@arm.com> <20170411122923.6285-22-lorenzo.pieralisi@arm.com> Message-ID: <1491917928.7236.8.camel@kernel.crashing.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Tue, 2017-04-11 at 13:29 +0100, Lorenzo Pieralisi wrote: > The PCI specifications (Rev 3.0, 3.2.5 "Transaction Ordering and Posting") > mandate non-posted configuration transactions. As further highlighted in > the PCIe specifications (4.0 - Rev0.3, "Ordering Considerations for the > Enhanced Configuration Access Mechanism"), through ECAM and > ECAM-derivative configuration mechanism, the memory mapped transactions > from the host CPU into Configuration Requests on the PCI express fabric > may create ordering problems for software because writes to memory > address are typically posted transactions (unless the architecture can > enforce through virtual address mapping non-posted write transactions > behaviour) but writes to Configuration Space are not posted on the PCI > express fabric. > > Include the asm-generic ioremap_nopost() implementation (currently > falling back to ioremap_nocache()) to provide a non-posted writes > ioremap interface to kernel subsystems. NAK. As explained in my reply to patch 0. > Signed-off-by: Lorenzo Pieralisi > > Cc: Michael Ellerman > > Cc: Bjorn Helgaas > > Cc: Benjamin Herrenschmidt > > Cc: Paul Mackerras > --- > ?arch/powerpc/include/asm/io.h | 1 + > ?1 file changed, 1 insertion(+) > > diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h > index 5ed2924..6dcd0e2 100644 > --- a/arch/powerpc/include/asm/io.h > +++ b/arch/powerpc/include/asm/io.h > @@ -757,6 +757,7 @@ extern void __iomem *ioremap_prot(phys_addr_t address, unsigned long size, > ?extern void __iomem *ioremap_wc(phys_addr_t address, unsigned long size); > > ?#define ioremap_nocache(addr, size) ioremap((addr), (size)) > > ?#define ioremap_uc(addr, size) ioremap((addr), (size)) > +#include > ? > ?extern void iounmap(volatile void __iomem *addr); > ?