[U-Boot] [PATCH v2] arm: psci: make psci usable on single core socs

[Yuantian Tang <andy.tang@nxp.com>]

PSCI can be used on both multiple and single core socs. Current
implementation only allows PSCI to work on multiple core socs.
This patch removes this restriction so that PSCI can work on
single core socs as well.

Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
---
v2:
	- refine the title and commit message

 arch/arm/cpu/armv8/cpu-dt.c                   | 13 +++-------
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c       | 35 ++++++++++++---------------
 arch/arm/cpu/armv8/sec_firmware.c             |  2 +-
 arch/arm/include/asm/arch-fsl-layerscape/mp.h |  4 +++
 arch/arm/include/asm/armv8/sec_firmware.h     |  7 ++++++
 5 files changed, 31 insertions(+), 30 deletions(-)

diff --git a/arch/arm/cpu/armv8/cpu-dt.c b/arch/arm/cpu/armv8/cpu-dt.c
index 5156a15..e3c8aa2 100644
--- a/arch/arm/cpu/armv8/cpu-dt.c
+++ b/arch/arm/cpu/armv8/cpu-dt.c
@@ -7,25 +7,19 @@
 #include <common.h>
 #include <asm/psci.h>
 #include <asm/system.h>
-#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
 #include <asm/armv8/sec_firmware.h>
-#endif
 
+#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
 int psci_update_dt(void *fdt)
 {
-#ifdef CONFIG_MP
-#if defined(CONFIG_ARMV8_PSCI) || defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
-
-#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
 	/*
 	 * If the PSCI in SEC Firmware didn't work, avoid to update the
 	 * device node of PSCI. But still return 0 instead of an error
 	 * number to support detecting PSCI dynamically and then switching
 	 * the SMP boot method between PSCI and spin-table.
 	 */
-	if (sec_firmware_support_psci_version() == 0xffffffff)
+	if (sec_firmware_support_psci_version() == PSCI_INVALID_VER)
 		return 0;
-#endif
 	fdt_psci(fdt);
 
 #if defined(CONFIG_ARMV8_PSCI) && !defined(CONFIG_ARMV8_SECURE_BASE)
@@ -34,7 +28,6 @@ int psci_update_dt(void *fdt)
 			__secure_end - __secure_start);
 #endif
 
-#endif
-#endif
 	return 0;
 }
+#endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index ea6c090..ccddd49 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -14,18 +14,14 @@
 #include <asm/arch/soc.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/speed.h>
-#ifdef CONFIG_MP
 #include <asm/arch/mp.h>
-#endif
 #include <efi_loader.h>
 #include <fm_eth.h>
 #include <fsl-mc/fsl_mc.h>
 #ifdef CONFIG_FSL_ESDHC
 #include <fsl_esdhc.h>
 #endif
-#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
 #include <asm/armv8/sec_firmware.h>
-#endif
 #ifdef CONFIG_SYS_FSL_DDR
 #include <fsl_ddr.h>
 #endif
@@ -474,13 +470,19 @@ int cpu_eth_init(bd_t *bis)
 	return error;
 }
 
-int arch_early_init_r(void)
+static inline int check_psci(void)
 {
-#ifdef CONFIG_MP
-	int rv = 1;
-	u32 psci_ver = 0xffffffff;
-#endif
+	unsigned int psci_ver;
 
+	psci_ver = sec_firmware_support_psci_version();
+	if (psci_ver == PSCI_INVALID_VER)
+		return 1;
+
+	return 0;
+}
+
+int arch_early_init_r(void)
+{
 #ifdef CONFIG_SYS_FSL_ERRATUM_A009635
 	u32 svr_dev_id;
 	/*
@@ -494,18 +496,13 @@ int arch_early_init_r(void)
 #if defined(CONFIG_SYS_FSL_ERRATUM_A009942) && defined(CONFIG_SYS_FSL_DDR)
 	erratum_a009942_check_cpo();
 #endif
-#ifdef CONFIG_MP
-#if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \
-	defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
-	/* Check the psci version to determine if the psci is supported */
-	psci_ver = sec_firmware_support_psci_version();
-#endif
-	if (psci_ver == 0xffffffff) {
-		rv = fsl_layerscape_wake_seconday_cores();
-		if (rv)
+	if (check_psci()) {
+		printf("PSCI: PSCI does not exist.\n");
+
+		/* if PSCI does not exist, boot secondary cores here */
+		if (fsl_layerscape_wake_seconday_cores())
 			printf("Did not wake secondary cores\n");
 	}
-#endif
 
 #ifdef CONFIG_SYS_HAS_SERDES
 	fsl_serdes_init();
diff --git a/arch/arm/cpu/armv8/sec_firmware.c b/arch/arm/cpu/armv8/sec_firmware.c
index ec9cf40..4afa3ad 100644
--- a/arch/arm/cpu/armv8/sec_firmware.c
+++ b/arch/arm/cpu/armv8/sec_firmware.c
@@ -227,7 +227,7 @@ unsigned int sec_firmware_support_psci_version(void)
 	if (sec_firmware_addr & SEC_FIRMWARE_RUNNING)
 		return _sec_firmware_support_psci_version();
 
-	return 0xffffffff;
+	return PSCI_INVALID_VER;
 }
 #endif
 
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/mp.h b/arch/arm/include/asm/arch-fsl-layerscape/mp.h
index d0832b5..fd3f851 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/mp.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/mp.h
@@ -31,7 +31,11 @@ extern u64 __spin_table[];
 extern u64 __real_cntfrq;
 extern u64 *secondary_boot_code;
 extern size_t __secondary_boot_code_size;
+#ifdef CONFIG_MP
 int fsl_layerscape_wake_seconday_cores(void);
+#else
+static inline int fsl_layerscape_wake_seconday_cores(void) { return 0; }
+#endif
 void *get_spin_tbl_addr(void);
 phys_addr_t determine_mp_bootpg(void);
 void secondary_boot_func(void);
diff --git a/arch/arm/include/asm/armv8/sec_firmware.h b/arch/arm/include/asm/armv8/sec_firmware.h
index bcdb1b0..bc1d97d 100644
--- a/arch/arm/include/asm/armv8/sec_firmware.h
+++ b/arch/arm/include/asm/armv8/sec_firmware.h
@@ -7,12 +7,19 @@
 #ifndef __SEC_FIRMWARE_H_
 #define __SEC_FIRMWARE_H_
 
+#define PSCI_INVALID_VER		0xffffffff
+
 int sec_firmware_init(const void *, u32 *, u32 *);
 int _sec_firmware_entry(const void *, u32 *, u32 *);
 bool sec_firmware_is_valid(const void *);
 #ifdef CONFIG_SEC_FIRMWARE_ARMV8_PSCI
 unsigned int sec_firmware_support_psci_version(void);
 unsigned int _sec_firmware_support_psci_version(void);
+#else
+static inline unsigned int sec_firmware_support_psci_version(void)
+{
+	return PSCI_INVALID_VER;
+}
 #endif
 
 #endif /* __SEC_FIRMWARE_H_ */
-- 
2.1.0.27.g96db324