From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dinh Nguyen Date: Wed, 26 Apr 2017 23:36:03 -0500 Subject: [U-Boot] [PATCH] armv8: minor fix to comment for enabling SMPEN bit Message-ID: <1493267763-10213-1-git-send-email-dinguyen@kernel.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de The SMPEN bit is located in the cpuectlr_el1 register and not the cpuactlr_el1 register. Adjust the comment accordingly and also fix a spelling error. Signed-off-by: Dinh Nguyen CC: Mingkai Hu CC: Gong Qianyu CC: Mateusz Kulikowski CC: Hou Zhiqiang CC: York Sun CC: Albert Aribaud CC: Masahiro Yamada --- arch/arm/cpu/armv8/start.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index 62d97f7..354468b 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -86,12 +86,12 @@ save_boot_params_ret: 0: /* - * Enalbe SMPEN bit for coherency. + * Enable SMPEN bit for coherency. * This register is not architectural but at the moment * this bit should be set for A53/A57/A72. */ #ifdef CONFIG_ARMV8_SET_SMPEN - mrs x0, S3_1_c15_c2_1 /* cpuactlr_el1 */ + mrs x0, S3_1_c15_c2_1 /* cpuectlr_el1 */ orr x0, x0, #0x40 msr S3_1_c15_c2_1, x0 #endif -- 2.7.4