From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Mon, 15 May 2017 19:13:51 +0200 Subject: [U-Boot] [PATCH v2 4/6] dm: ram: bmips: add BCM6338/BCM6348 support In-Reply-To: <1494868433-7158-1-git-send-email-noltari@gmail.com> References: <1494631407-28655-1-git-send-email-noltari@gmail.com> <1494868433-7158-1-git-send-email-noltari@gmail.com> Message-ID: <1494868433-7158-5-git-send-email-noltari@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit To: u-boot@lists.denx.de Signed-off-by: Álvaro Fernández Rojas --- v2: "dm: ram" driver instead of cpu. drivers/ram/bmips_ram.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/ram/bmips_ram.c b/drivers/ram/bmips_ram.c index 382e231..ac35fbe 100644 --- a/drivers/ram/bmips_ram.c +++ b/drivers/ram/bmips_ram.c @@ -14,6 +14,16 @@ #include #include +#define SDRAM_CFG_REG 0x0 +#define SDRAM_CFG_COL_SHIFT 4 +#define SDRAM_CFG_COL_MASK (0x3 << SDRAM_CFG_COL_SHIFT) +#define SDRAM_CFG_ROW_SHIFT 6 +#define SDRAM_CFG_ROW_MASK (0x3 << SDRAM_CFG_ROW_SHIFT) +#define SDRAM_CFG_32B_SHIFT 10 +#define SDRAM_CFG_32B_MASK (1 << SDRAM_CFG_32B_SHIFT) +#define SDRAM_CFG_BANK_SHIFT 13 +#define SDRAM_CFG_BANK_MASK (1 << SDRAM_CFG_BANK_SHIFT) + #define MEMC_CFG_REG 0x4 #define MEMC_CFG_32B_SHIFT 1 #define MEMC_CFG_32B_MASK (1 << MEMC_CFG_32B_SHIFT) @@ -50,6 +60,20 @@ static ulong bmips_dram_size(unsigned int cols, unsigned int rows, return 1 << (cols + rows + is_32b + banks); } +static ulong bcm6338_get_ram_size(struct bmips_ram_priv *priv) +{ + unsigned int cols = 0, rows = 0, is_32b = 0, banks = 0; + u32 val; + + val = readl_be(priv->regs + SDRAM_CFG_REG); + rows = (val & SDRAM_CFG_ROW_MASK) >> SDRAM_CFG_ROW_SHIFT; + cols = (val & SDRAM_CFG_COL_MASK) >> SDRAM_CFG_COL_SHIFT; + is_32b = (val & SDRAM_CFG_32B_MASK) ? 1 : 0; + banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1; + + return bmips_dram_size(cols, rows, is_32b, banks); +} + static ulong bcm6358_get_ram_size(struct bmips_ram_priv *priv) { unsigned int cols = 0, rows = 0, is_32b = 0; @@ -82,6 +106,10 @@ static const struct bmips_ram_hw bmips_ram_bcm6328 = { .get_ram_size = bcm6328_get_ram_size, }; +static const struct bmips_ram_hw bmips_ram_bcm6338 = { + .get_ram_size = bcm6338_get_ram_size, +}; + static const struct bmips_ram_hw bmips_ram_bcm6358 = { .get_ram_size = bcm6358_get_ram_size, }; @@ -91,6 +119,9 @@ static const struct udevice_id bmips_ram_ids[] = { .compatible = "brcm,bcm6328-mc", .data = (ulong)&bmips_ram_bcm6328, }, { + .compatible = "brcm,bcm6338-mc", + .data = (ulong)&bmips_ram_bcm6338, + }, { .compatible = "brcm,bcm6358-mc", .data = (ulong)&bmips_ram_bcm6358, }, { /* sentinel */ } -- 2.1.4