From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754636AbdE0IkD (ORCPT ); Sat, 27 May 2017 04:40:03 -0400 Received: from mga05.intel.com ([192.55.52.43]:33965 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754526AbdE0IkC (ORCPT ); Sat, 27 May 2017 04:40:02 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,400,1491289200"; d="scan'208";a="92021697" From: Xiaoguang Chen To: alex.williamson@redhat.com, kraxel@redhat.com, chris@chris-wilson.co.uk, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, zhenyuw@linux.intel.com, zhiyuan.lv@intel.com, intel-gvt-dev@lists.freedesktop.org, zhi.a.wang@intel.com, kevin.tian@intel.com Cc: Xiaoguang Chen Subject: [PATCH v6 1/6] drm/i915/gvt: Extend the GVT-g architecture to support vfio device region Date: Sat, 27 May 2017 16:38:47 +0800 Message-Id: <1495874332-2851-2-git-send-email-xiaoguang.chen@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1495874332-2851-1-git-send-email-xiaoguang.chen@intel.com> References: <1495874332-2851-1-git-send-email-xiaoguang.chen@intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Xiaoguang Chen --- drivers/gpu/drm/i915/gvt/kvmgt.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c b/drivers/gpu/drm/i915/gvt/kvmgt.c index 1ae0b40..3c6a02b 100644 --- a/drivers/gpu/drm/i915/gvt/kvmgt.c +++ b/drivers/gpu/drm/i915/gvt/kvmgt.c @@ -53,11 +53,21 @@ static const struct intel_gvt_ops *intel_gvt_ops; #define VFIO_PCI_INDEX_TO_OFFSET(index) ((u64)(index) << VFIO_PCI_OFFSET_SHIFT) #define VFIO_PCI_OFFSET_MASK (((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1) +struct vfio_region; +struct intel_vgpu_regops { + size_t (*rw)(struct intel_vgpu *vgpu, char *buf, + size_t count, loff_t *ppos, bool iswrite); + void (*release)(struct intel_vgpu *vgpu, + struct vfio_region *region); +}; + struct vfio_region { u32 type; u32 subtype; size_t size; u32 flags; + const struct intel_vgpu_regops *ops; + void *data; }; struct kvmgt_pgfn { @@ -642,7 +652,7 @@ static ssize_t intel_vgpu_rw(struct mdev_device *mdev, char *buf, int ret = -EINVAL; - if (index >= VFIO_PCI_NUM_REGIONS) { + if (index >= VFIO_PCI_NUM_REGIONS + vgpu->vdev.num_regions) { gvt_vgpu_err("invalid index: %u\n", index); return -EINVAL; } @@ -676,8 +686,11 @@ static ssize_t intel_vgpu_rw(struct mdev_device *mdev, char *buf, case VFIO_PCI_BAR5_REGION_INDEX: case VFIO_PCI_VGA_REGION_INDEX: case VFIO_PCI_ROM_REGION_INDEX: + break; default: - gvt_vgpu_err("unsupported region: %u\n", index); + index -= VFIO_PCI_NUM_REGIONS; + return vgpu->vdev.region[index].ops->rw(vgpu, buf, count, + ppos, is_write); } return ret == 0 ? count : ret; @@ -940,7 +953,8 @@ static long intel_vgpu_ioctl(struct mdev_device *mdev, unsigned int cmd, info.flags = VFIO_DEVICE_FLAGS_PCI; info.flags |= VFIO_DEVICE_FLAGS_RESET; - info.num_regions = VFIO_PCI_NUM_REGIONS; + info.num_regions = VFIO_PCI_NUM_REGIONS + + vgpu->vdev.num_regions; info.num_irqs = VFIO_PCI_NUM_IRQS; return copy_to_user((void __user *)arg, &info, minsz) ? @@ -1061,6 +1075,7 @@ static long intel_vgpu_ioctl(struct mdev_device *mdev, unsigned int cmd, } if (caps.size) { + info.flags |= VFIO_REGION_INFO_FLAG_CAPS; if (info.argsz < sizeof(info) + caps.size) { info.argsz = sizeof(info) + caps.size; info.cap_offset = 0; -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Xiaoguang Chen Subject: [PATCH v6 1/6] drm/i915/gvt: Extend the GVT-g architecture to support vfio device region Date: Sat, 27 May 2017 16:38:47 +0800 Message-ID: <1495874332-2851-2-git-send-email-xiaoguang.chen@intel.com> References: <1495874332-2851-1-git-send-email-xiaoguang.chen@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1495874332-2851-1-git-send-email-xiaoguang.chen@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: alex.williamson@redhat.com, kraxel@redhat.com, chris@chris-wilson.co.uk, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, zhenyuw@linux.intel.com, zhiyuan.lv@intel.com, intel-gvt-dev@lists.freedesktop.org, zhi.a.wang@intel.com, kevin.tian@intel.com Cc: Xiaoguang Chen List-Id: intel-gfx@lists.freedesktop.org U2lnbmVkLW9mZi1ieTogWGlhb2d1YW5nIENoZW4gPHhpYW9ndWFuZy5jaGVuQGludGVsLmNvbT4K LS0tCiBkcml2ZXJzL2dwdS9kcm0vaTkxNS9ndnQva3ZtZ3QuYyB8IDIxICsrKysrKysrKysrKysr KysrKy0tLQogMSBmaWxlIGNoYW5nZWQsIDE4IGluc2VydGlvbnMoKyksIDMgZGVsZXRpb25zKC0p CgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvZ3Z0L2t2bWd0LmMgYi9kcml2ZXJz L2dwdS9kcm0vaTkxNS9ndnQva3ZtZ3QuYwppbmRleCAxYWUwYjQwLi4zYzZhMDJiIDEwMDY0NAot LS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9ndnQva3ZtZ3QuYworKysgYi9kcml2ZXJzL2dwdS9k cm0vaTkxNS9ndnQva3ZtZ3QuYwpAQCAtNTMsMTEgKzUzLDIxIEBAIHN0YXRpYyBjb25zdCBzdHJ1 Y3QgaW50ZWxfZ3Z0X29wcyAqaW50ZWxfZ3Z0X29wczsKICNkZWZpbmUgVkZJT19QQ0lfSU5ERVhf VE9fT0ZGU0VUKGluZGV4KSAoKHU2NCkoaW5kZXgpIDw8IFZGSU9fUENJX09GRlNFVF9TSElGVCkK ICNkZWZpbmUgVkZJT19QQ0lfT0ZGU0VUX01BU0sgICAgKCgodTY0KSgxKSA8PCBWRklPX1BDSV9P RkZTRVRfU0hJRlQpIC0gMSkKIAorc3RydWN0IHZmaW9fcmVnaW9uOworc3RydWN0IGludGVsX3Zn cHVfcmVnb3BzIHsKKwlzaXplX3QgKCpydykoc3RydWN0IGludGVsX3ZncHUgKnZncHUsIGNoYXIg KmJ1ZiwKKwkJCXNpemVfdCBjb3VudCwgbG9mZl90ICpwcG9zLCBib29sIGlzd3JpdGUpOworCXZv aWQgKCpyZWxlYXNlKShzdHJ1Y3QgaW50ZWxfdmdwdSAqdmdwdSwKKwkJCXN0cnVjdCB2ZmlvX3Jl Z2lvbiAqcmVnaW9uKTsKK307CisKIHN0cnVjdCB2ZmlvX3JlZ2lvbiB7CiAJdTMyCQkJCXR5cGU7 CiAJdTMyCQkJCXN1YnR5cGU7CiAJc2l6ZV90CQkJCXNpemU7CiAJdTMyCQkJCWZsYWdzOworCWNv bnN0IHN0cnVjdCBpbnRlbF92Z3B1X3JlZ29wcwkqb3BzOworCXZvaWQJCQkJKmRhdGE7CiB9Owog CiBzdHJ1Y3Qga3ZtZ3RfcGdmbiB7CkBAIC02NDIsNyArNjUyLDcgQEAgc3RhdGljIHNzaXplX3Qg aW50ZWxfdmdwdV9ydyhzdHJ1Y3QgbWRldl9kZXZpY2UgKm1kZXYsIGNoYXIgKmJ1ZiwKIAlpbnQg cmV0ID0gLUVJTlZBTDsKIAogCi0JaWYgKGluZGV4ID49IFZGSU9fUENJX05VTV9SRUdJT05TKSB7 CisJaWYgKGluZGV4ID49IFZGSU9fUENJX05VTV9SRUdJT05TICsgdmdwdS0+dmRldi5udW1fcmVn aW9ucykgewogCQlndnRfdmdwdV9lcnIoImludmFsaWQgaW5kZXg6ICV1XG4iLCBpbmRleCk7CiAJ CXJldHVybiAtRUlOVkFMOwogCX0KQEAgLTY3Niw4ICs2ODYsMTEgQEAgc3RhdGljIHNzaXplX3Qg aW50ZWxfdmdwdV9ydyhzdHJ1Y3QgbWRldl9kZXZpY2UgKm1kZXYsIGNoYXIgKmJ1ZiwKIAljYXNl IFZGSU9fUENJX0JBUjVfUkVHSU9OX0lOREVYOgogCWNhc2UgVkZJT19QQ0lfVkdBX1JFR0lPTl9J TkRFWDoKIAljYXNlIFZGSU9fUENJX1JPTV9SRUdJT05fSU5ERVg6CisJCWJyZWFrOwogCWRlZmF1 bHQ6Ci0JCWd2dF92Z3B1X2VycigidW5zdXBwb3J0ZWQgcmVnaW9uOiAldVxuIiwgaW5kZXgpOwor CQlpbmRleCAtPSBWRklPX1BDSV9OVU1fUkVHSU9OUzsKKwkJcmV0dXJuIHZncHUtPnZkZXYucmVn aW9uW2luZGV4XS5vcHMtPnJ3KHZncHUsIGJ1ZiwgY291bnQsCisJCQkJcHBvcywgaXNfd3JpdGUp OwogCX0KIAogCXJldHVybiByZXQgPT0gMCA/IGNvdW50IDogcmV0OwpAQCAtOTQwLDcgKzk1Myw4 IEBAIHN0YXRpYyBsb25nIGludGVsX3ZncHVfaW9jdGwoc3RydWN0IG1kZXZfZGV2aWNlICptZGV2 LCB1bnNpZ25lZCBpbnQgY21kLAogCiAJCWluZm8uZmxhZ3MgPSBWRklPX0RFVklDRV9GTEFHU19Q Q0k7CiAJCWluZm8uZmxhZ3MgfD0gVkZJT19ERVZJQ0VfRkxBR1NfUkVTRVQ7Ci0JCWluZm8ubnVt X3JlZ2lvbnMgPSBWRklPX1BDSV9OVU1fUkVHSU9OUzsKKwkJaW5mby5udW1fcmVnaW9ucyA9IFZG SU9fUENJX05VTV9SRUdJT05TICsKKwkJCQl2Z3B1LT52ZGV2Lm51bV9yZWdpb25zOwogCQlpbmZv Lm51bV9pcnFzID0gVkZJT19QQ0lfTlVNX0lSUVM7CiAKIAkJcmV0dXJuIGNvcHlfdG9fdXNlcigo dm9pZCBfX3VzZXIgKilhcmcsICZpbmZvLCBtaW5zeikgPwpAQCAtMTA2MSw2ICsxMDc1LDcgQEAg c3RhdGljIGxvbmcgaW50ZWxfdmdwdV9pb2N0bChzdHJ1Y3QgbWRldl9kZXZpY2UgKm1kZXYsIHVu c2lnbmVkIGludCBjbWQsCiAJCX0KIAogCQlpZiAoY2Fwcy5zaXplKSB7CisJCQlpbmZvLmZsYWdz IHw9IFZGSU9fUkVHSU9OX0lORk9fRkxBR19DQVBTOwogCQkJaWYgKGluZm8uYXJnc3ogPCBzaXpl b2YoaW5mbykgKyBjYXBzLnNpemUpIHsKIAkJCQlpbmZvLmFyZ3N6ID0gc2l6ZW9mKGluZm8pICsg Y2Fwcy5zaXplOwogCQkJCWluZm8uY2FwX29mZnNldCA9IDA7Ci0tIAoyLjcuNAoKX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcg bGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRl c2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg==