From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com ([134.134.136.31]:41244 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751751AbdFAKVv (ORCPT ); Thu, 1 Jun 2017 06:21:51 -0400 Message-ID: <1496312499.3386.0.camel@linux.intel.com> Subject: Re: [PATCH] drm/i915: Guard against i915_ggtt_disable_guc() being invoked unconditionally From: Joonas Lahtinen To: Chris Wilson , intel-gfx@lists.freedesktop.org Cc: Tvrtko Ursulin , Oscar Mateo , Daniele Ceraolo Spurio , Michal Wajdeczko , Arkadiusz Hiler , "# v4 . 11+" Date: Thu, 01 Jun 2017 13:21:39 +0300 In-Reply-To: <20170531190514.3691-1-chris@chris-wilson.co.uk> References: <20170531190514.3691-1-chris@chris-wilson.co.uk> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org List-ID: On ke, 2017-05-31 at 20:05 +0100, Chris Wilson wrote: > Commit 7c3f86b6dc51 ("drm/i915: Invalidate the guc ggtt TLB upon > insertion") added the restoration of the invalidation routine after the > GuC was disabled, but missed that the GuC was unconditionally disabled > when not used. This then overwrites the invalidate routine for the older > chipsets, causing havoc and breaking resume as the most obvious victim. > > We place the guard inside i915_ggtt_disable_guc() to be backport > friendly (the bug was introduced into v4.11) but it would be preferred > to be in more control over when this was guard (i.e. do not try and > teardown the data structures before we have enabled them). That should > be true with the reorganisation of the guc loaders. > > Reported-by: Ville Syrjälä > Signed-off-by: Chris Wilson > Fixes: 7c3f86b6dc51 ("drm/i915: Invalidate the guc ggtt TLB upon insertion") > Cc: Tvrtko Ursulin > Cc: Joonas Lahtinen > Cc: Oscar Mateo > Cc: Daniele Ceraolo Spurio > Cc: Michal Wajdeczko > Cc: Arkadiusz Hiler > Cc: # v4.11+ Reviewed-by: Joonas Lahtinen Regards, Joonas -- Joonas Lahtinen Open Source Technology Center Intel Corporation From mboxrd@z Thu Jan 1 00:00:00 1970 From: Joonas Lahtinen Subject: Re: [PATCH] drm/i915: Guard against i915_ggtt_disable_guc() being invoked unconditionally Date: Thu, 01 Jun 2017 13:21:39 +0300 Message-ID: <1496312499.3386.0.camel@linux.intel.com> References: <20170531190514.3691-1-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id AE0606E31D for ; Thu, 1 Jun 2017 10:21:43 +0000 (UTC) In-Reply-To: <20170531190514.3691-1-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Chris Wilson , intel-gfx@lists.freedesktop.org Cc: "# v4 . 11+" List-Id: intel-gfx@lists.freedesktop.org T24ga2UsIDIwMTctMDUtMzEgYXQgMjA6MDUgKzAxMDAsIENocmlzIFdpbHNvbiB3cm90ZToKPiBD b21taXQgN2MzZjg2YjZkYzUxICgiZHJtL2k5MTU6IEludmFsaWRhdGUgdGhlIGd1YyBnZ3R0IFRM QiB1cG9uCj4gaW5zZXJ0aW9uIikgYWRkZWQgdGhlIHJlc3RvcmF0aW9uIG9mIHRoZSBpbnZhbGlk YXRpb24gcm91dGluZSBhZnRlciB0aGUKPiBHdUMgd2FzIGRpc2FibGVkLCBidXQgbWlzc2VkIHRo YXQgdGhlIEd1QyB3YXMgdW5jb25kaXRpb25hbGx5IGRpc2FibGVkCj4gd2hlbiBub3QgdXNlZC4g VGhpcyB0aGVuIG92ZXJ3cml0ZXMgdGhlIGludmFsaWRhdGUgcm91dGluZSBmb3IgdGhlIG9sZGVy Cj4gY2hpcHNldHMsIGNhdXNpbmcgaGF2b2MgYW5kIGJyZWFraW5nIHJlc3VtZSBhcyB0aGUgbW9z dCBvYnZpb3VzIHZpY3RpbS4KPiAKPiBXZSBwbGFjZSB0aGUgZ3VhcmQgaW5zaWRlIGk5MTVfZ2d0 dF9kaXNhYmxlX2d1YygpIHRvIGJlIGJhY2twb3J0Cj4gZnJpZW5kbHkgKHRoZSBidWcgd2FzIGlu dHJvZHVjZWQgaW50byB2NC4xMSkgYnV0IGl0IHdvdWxkIGJlIHByZWZlcnJlZAo+IHRvIGJlIGlu IG1vcmUgY29udHJvbCBvdmVyIHdoZW4gdGhpcyB3YXMgZ3VhcmQgKGkuZS4gZG8gbm90IHRyeSBh bmQKPiB0ZWFyZG93biB0aGUgZGF0YSBzdHJ1Y3R1cmVzIGJlZm9yZSB3ZSBoYXZlIGVuYWJsZWQg dGhlbSkuIFRoYXQgc2hvdWxkCj4gYmUgdHJ1ZSB3aXRoIHRoZSByZW9yZ2FuaXNhdGlvbiBvZiB0 aGUgZ3VjIGxvYWRlcnMuCj4gCj4gUmVwb3J0ZWQtYnk6IFZpbGxlIFN5cmrDpGzDpCA8dmlsbGUu c3lyamFsYUBsaW51eC5pbnRlbC5jb20+Cj4gU2lnbmVkLW9mZi1ieTogQ2hyaXMgV2lsc29uIDxj aHJpc0BjaHJpcy13aWxzb24uY28udWs+Cj4gRml4ZXM6IDdjM2Y4NmI2ZGM1MSAoImRybS9pOTE1 OiBJbnZhbGlkYXRlIHRoZSBndWMgZ2d0dCBUTEIgdXBvbiBpbnNlcnRpb24iKQo+IENjOiBUdnJ0 a28gVXJzdWxpbiA8dHZydGtvLnVyc3VsaW5AbGludXguaW50ZWwuY29tPgo+IENjOiBKb29uYXMg TGFodGluZW4gPGpvb25hcy5sYWh0aW5lbkBsaW51eC5pbnRlbC5jb20+Cj4gQ2M6IE9zY2FyIE1h dGVvIDxvc2Nhci5tYXRlb0BpbnRlbC5jb20+Cj4gQ2M6IERhbmllbGUgQ2VyYW9sbyBTcHVyaW8g PGRhbmllbGUuY2VyYW9sb3NwdXJpb0BpbnRlbC5jb20+Cj4gQ2M6IE1pY2hhbCBXYWpkZWN6a28g PG1pY2hhbC53YWpkZWN6a29AaW50ZWwuY29tPgo+IENjOiBBcmthZGl1c3ogSGlsZXIgPGFya2Fk aXVzei5oaWxlckBpbnRlbC5jb20+Cj4gQ2M6IDxzdGFibGVAdmdlci5rZXJuZWwub3JnPiAjIHY0 LjExKwoKUmV2aWV3ZWQtYnk6IEpvb25hcyBMYWh0aW5lbiA8am9vbmFzLmxhaHRpbmVuQGxpbnV4 LmludGVsLmNvbT4KClJlZ2FyZHMsIEpvb25hcwotLSAKSm9vbmFzIExhaHRpbmVuCk9wZW4gU291 cmNlIFRlY2hub2xvZ3kgQ2VudGVyCkludGVsIENvcnBvcmF0aW9uCl9fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50 ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9y Zy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo=