From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751402AbdFBGgo (ORCPT ); Fri, 2 Jun 2017 02:36:44 -0400 Received: from mail-wm0-f52.google.com ([74.125.82.52]:35002 "EHLO mail-wm0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751141AbdFBGgk (ORCPT ); Fri, 2 Jun 2017 02:36:40 -0400 From: Anup Patel To: Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd Cc: Catalin Marinas , Will Deacon , Ray Jui , Scott Branden , Jon Mason , Florian Fainelli , Oza Pawandeep , Srinath Mannam , Pramod Kumar , Sandeep Tripathy , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com Subject: [PATCH v6 09/11] arm64: dts: Add I2C DT nodes for Stingray SoC Date: Fri, 2 Jun 2017 12:04:33 +0530 Message-Id: <1496385275-6899-10-git-send-email-anup.patel@broadcom.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1496385275-6899-1-git-send-email-anup.patel@broadcom.com> References: <1496385275-6899-1-git-send-email-anup.patel@broadcom.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Oza Pawandeep This patch adds I2C DT nodes on Stingray SoC. Signed-off-by: Oza Pawandeep Reviewed-by: Vikram Prakash Reviewed-by: Ray Jui Reviewed-by: Scott Branden --- .../boot/dts/broadcom/stingray/bcm958742-base.dtsi | 22 ++++++++++++++++++++++ .../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 20 ++++++++++++++++++++ 2 files changed, 42 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi index aad45a2..ff59a26 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi +++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi @@ -54,6 +54,28 @@ status = "okay"; }; +&i2c0 { + status = "okay"; + + pca9505: pca9505@20 { + compatible = "nxp,pca9505"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20>; + }; +}; + +&i2c1 { + status = "okay"; + + pcf8574: pcf8574@20 { + compatible = "nxp,pcf8574a"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x27>; + }; +}; + &nand { status = "ok"; nandcs@0 { diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi index e91debe..91ba61e 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi @@ -269,6 +269,16 @@ #include "stingray-pinctrl.dtsi" + i2c0: i2c@000b0000 { + compatible = "brcm,iproc-i2c"; + reg = <0x000b0000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clock-frequency = <100000>; + status = "disabled"; + }; + gpio_hsls: gpio@000d0000 { compatible = "brcm,iproc-gpio"; reg = <0x000d0000 0x864>; @@ -295,6 +305,16 @@ <&pinmux 151 91 4>; }; + i2c1: i2c@000e0000 { + compatible = "brcm,iproc-i2c"; + reg = <0x000e0000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clock-frequency = <100000>; + status = "disabled"; + }; + uart0: uart@00100000 { device_type = "serial"; compatible = "snps,dw-apb-uart"; -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 From: anup.patel@broadcom.com (Anup Patel) Date: Fri, 2 Jun 2017 12:04:33 +0530 Subject: [PATCH v6 09/11] arm64: dts: Add I2C DT nodes for Stingray SoC In-Reply-To: <1496385275-6899-1-git-send-email-anup.patel@broadcom.com> References: <1496385275-6899-1-git-send-email-anup.patel@broadcom.com> Message-ID: <1496385275-6899-10-git-send-email-anup.patel@broadcom.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: Oza Pawandeep This patch adds I2C DT nodes on Stingray SoC. Signed-off-by: Oza Pawandeep Reviewed-by: Vikram Prakash Reviewed-by: Ray Jui Reviewed-by: Scott Branden --- .../boot/dts/broadcom/stingray/bcm958742-base.dtsi | 22 ++++++++++++++++++++++ .../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 20 ++++++++++++++++++++ 2 files changed, 42 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi index aad45a2..ff59a26 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi +++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi @@ -54,6 +54,28 @@ status = "okay"; }; +&i2c0 { + status = "okay"; + + pca9505: pca9505 at 20 { + compatible = "nxp,pca9505"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20>; + }; +}; + +&i2c1 { + status = "okay"; + + pcf8574: pcf8574 at 20 { + compatible = "nxp,pcf8574a"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x27>; + }; +}; + &nand { status = "ok"; nandcs at 0 { diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi index e91debe..91ba61e 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi @@ -269,6 +269,16 @@ #include "stingray-pinctrl.dtsi" + i2c0: i2c at 000b0000 { + compatible = "brcm,iproc-i2c"; + reg = <0x000b0000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clock-frequency = <100000>; + status = "disabled"; + }; + gpio_hsls: gpio at 000d0000 { compatible = "brcm,iproc-gpio"; reg = <0x000d0000 0x864>; @@ -295,6 +305,16 @@ <&pinmux 151 91 4>; }; + i2c1: i2c at 000e0000 { + compatible = "brcm,iproc-i2c"; + reg = <0x000e0000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clock-frequency = <100000>; + status = "disabled"; + }; + uart0: uart at 00100000 { device_type = "serial"; compatible = "snps,dw-apb-uart"; -- 2.7.4