From mboxrd@z Thu Jan 1 00:00:00 1970 From: Joonas Lahtinen Subject: Re: [PATCH 19/67] drm/i915/cnl: Configure EU slice power gating. Date: Fri, 02 Jun 2017 14:27:24 +0300 Message-ID: <1496402844.3795.11.camel@linux.intel.com> References: <1491506163-14587-1-git-send-email-rodrigo.vivi@intel.com> <1491506163-14587-19-git-send-email-rodrigo.vivi@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 284076E082 for ; Fri, 2 Jun 2017 11:27:27 +0000 (UTC) In-Reply-To: <1491506163-14587-19-git-send-email-rodrigo.vivi@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Rodrigo Vivi , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org T24gdG8sIDIwMTctMDQtMDYgYXQgMTI6MTUgLTA3MDAsIFJvZHJpZ28gVml2aSB3cm90ZToKPiBD YW5ub25sYWtlIGFsc28gc3VwcG9ydHMgc2xpY2UgcG93ZXIgZ2F0aW5nIG9uIGRldmljZXMgd2l0 aCBtb3JlCj4gdGhhbiBvbmUgc2xpY2UgYXMgU0tMLiBMZXQncyBhc3N1bWUgdGhhdCB0aGlzIGlz IHRoZSBzYW1lIGZvciBTS0wrCj4gYW5kIGV4Y2x1ZGUgQlhUIG9ubHkuCj4gCj4gdjI6IEFsc28g cmVtb3ZlIEtCTC4KPiAKCkJzcGVjOiAxMjU2NgoKPiBTaWduZWQtb2ZmLWJ5OiBSb2RyaWdvIFZp dmkgPHJvZHJpZ28udml2aUBpbnRlbC5jb20+CgpSZXZpZXdlZC1ieTogSm9vbmFzIExhaHRpbmVu IDxqb29uYXMubGFodGluZW5AbGludXguaW50ZWwuY29tPgoKUmVnYXJkcywgSm9vbmFzCi0tIApK b29uYXMgTGFodGluZW4KT3BlbiBTb3VyY2UgVGVjaG5vbG9neSBDZW50ZXIKSW50ZWwgQ29ycG9y YXRpb24KX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50 ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBz Oi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg==