From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751696AbdFHBlM (ORCPT ); Wed, 7 Jun 2017 21:41:12 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:25451 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751424AbdFHBlL (ORCPT ); Wed, 7 Jun 2017 21:41:11 -0400 Message-ID: <1496886063.30249.1.camel@mhfsdcap03> Subject: Re: [PATCH 2/3] spi: mediatek: support adjust register define From: lei liu To: Mark Brown CC: Mark Rutland , Matthias Brugger , Sascha Hauer , , , , , , Date: Thu, 8 Jun 2017 09:41:03 +0800 In-Reply-To: <20170606185730.mrvgvp4hynftwahx@sirena.org.uk> References: <1496387923-31674-1-git-send-email-leilk.liu@mediatek.com> <1496387923-31674-3-git-send-email-leilk.liu@mediatek.com> <20170606185730.mrvgvp4hynftwahx@sirena.org.uk> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2017-06-06 at 19:57 +0100, Mark Brown wrote: > On Fri, Jun 02, 2017 at 03:18:42PM +0800, Leilk Liu wrote: > > > + /* some IC design adjust register define */ > > + bool adjust_reg; > > Can we have a name that's more specific to the particular quirk please? > The current name will get confusing if some future chip also needs > slightly different register settings. > thanks for your suggestion, I'll fix it. > Otherwise this looks good. From mboxrd@z Thu Jan 1 00:00:00 1970 From: lei liu Subject: Re: [PATCH 2/3] spi: mediatek: support adjust register define Date: Thu, 8 Jun 2017 09:41:03 +0800 Message-ID: <1496886063.30249.1.camel@mhfsdcap03> References: <1496387923-31674-1-git-send-email-leilk.liu@mediatek.com> <1496387923-31674-3-git-send-email-leilk.liu@mediatek.com> <20170606185730.mrvgvp4hynftwahx@sirena.org.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20170606185730.mrvgvp4hynftwahx-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> Sender: linux-spi-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Mark Brown Cc: Mark Rutland , Matthias Brugger , Sascha Hauer , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org List-Id: devicetree@vger.kernel.org On Tue, 2017-06-06 at 19:57 +0100, Mark Brown wrote: > On Fri, Jun 02, 2017 at 03:18:42PM +0800, Leilk Liu wrote: > > > + /* some IC design adjust register define */ > > + bool adjust_reg; > > Can we have a name that's more specific to the particular quirk please? > The current name will get confusing if some future chip also needs > slightly different register settings. > thanks for your suggestion, I'll fix it. > Otherwise this looks good. -- To unsubscribe from this list: send the line "unsubscribe linux-spi" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: lei liu Subject: Re: [PATCH 2/3] spi: mediatek: support adjust register define Date: Thu, 8 Jun 2017 09:41:03 +0800 Message-ID: <1496886063.30249.1.camel@mhfsdcap03> References: <1496387923-31674-1-git-send-email-leilk.liu@mediatek.com> <1496387923-31674-3-git-send-email-leilk.liu@mediatek.com> <20170606185730.mrvgvp4hynftwahx@sirena.org.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Cc: Mark Rutland , Matthias Brugger , Sascha Hauer , , , , , , To: Mark Brown Return-path: In-Reply-To: <20170606185730.mrvgvp4hynftwahx-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> Sender: linux-spi-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-ID: On Tue, 2017-06-06 at 19:57 +0100, Mark Brown wrote: > On Fri, Jun 02, 2017 at 03:18:42PM +0800, Leilk Liu wrote: > > > + /* some IC design adjust register define */ > > + bool adjust_reg; > > Can we have a name that's more specific to the particular quirk please? > The current name will get confusing if some future chip also needs > slightly different register settings. > thanks for your suggestion, I'll fix it. > Otherwise this looks good. -- To unsubscribe from this list: send the line "unsubscribe linux-spi" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: leilk.liu@mediatek.com (lei liu) Date: Thu, 8 Jun 2017 09:41:03 +0800 Subject: [PATCH 2/3] spi: mediatek: support adjust register define In-Reply-To: <20170606185730.mrvgvp4hynftwahx@sirena.org.uk> References: <1496387923-31674-1-git-send-email-leilk.liu@mediatek.com> <1496387923-31674-3-git-send-email-leilk.liu@mediatek.com> <20170606185730.mrvgvp4hynftwahx@sirena.org.uk> Message-ID: <1496886063.30249.1.camel@mhfsdcap03> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Tue, 2017-06-06 at 19:57 +0100, Mark Brown wrote: > On Fri, Jun 02, 2017 at 03:18:42PM +0800, Leilk Liu wrote: > > > + /* some IC design adjust register define */ > > + bool adjust_reg; > > Can we have a name that's more specific to the particular quirk please? > The current name will get confusing if some future chip also needs > slightly different register settings. > thanks for your suggestion, I'll fix it. > Otherwise this looks good.