* [Patch v5 00/12] Add MFC v10.10 support
[not found] <CGME20170619052453epcas1p426ebca32768cee57390f39b53d835e81@epcas1p4.samsung.com>
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki, Smitha T Murthy
This patch series adds MFC v10.10 support. MFC v10.10 is used in some
of Exynos7 variants.
This adds support for following:
* Add support for HEVC encoder and decoder
* Add support for VP9 decoder
* Update Documentation for control id definitions
* Update computation of min scratch buffer size requirement for V8 onwards
Changes since v4:
- Addressed review comments by Sylwester Nawrocki.
- Addressed review comments by Hans Verkuil.
- Rebased on latest git://linuxtv.org/snawrocki/samsung.git
for-v4.13/media/next and for-v4.12/media/next-2 branches,
the same series of patches applies on both branches.
- Applied r-o-b from Andrzej on respective patches.
- Built and checked the Documentation.
Smitha T Murthy (12):
[media] s5p-mfc: Rename IS_MFCV8 macro
[media] s5p-mfc: Adding initial support for MFC v10.10
[media] s5p-mfc: Use min scratch buffer size as provided by F/W
[media] s5p-mfc: Support MFCv10.10 buffer requirements
[media] videodev2.h: Add v4l2 definition for HEVC
[media] v4l2-ioctl: add HEVC format description
Documentation: v4l: Documentation for HEVC v4l2 definition
[media] s5p-mfc: Add support for HEVC decoder
[media] s5p-mfc: Add VP9 decoder support
[media] v4l2: Add v4l2 control IDs for HEVC encoder
[media] s5p-mfc: Add support for HEVC encoder
Documention: v4l: Documentation for HEVC CIDs
.../devicetree/bindings/media/s5p-mfc.txt | 1 +
Documentation/media/uapi/v4l/extended-controls.rst | 364 ++++++++++++++
Documentation/media/uapi/v4l/pixfmt-013.rst | 5 +
drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 88 ++++
drivers/media/platform/s5p-mfc/regs-mfc-v8.h | 2 +
drivers/media/platform/s5p-mfc/s5p_mfc.c | 28 ++
drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c | 9 +
drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 67 ++-
drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c | 6 +-
drivers/media/platform/s5p-mfc/s5p_mfc_dec.c | 48 +-
drivers/media/platform/s5p-mfc/s5p_mfc_enc.c | 542 ++++++++++++++++++++-
drivers/media/platform/s5p-mfc/s5p_mfc_opr.h | 14 +
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 383 +++++++++++++--
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 15 +
drivers/media/v4l2-core/v4l2-ctrls.c | 103 ++++
drivers/media/v4l2-core/v4l2-ioctl.c | 1 +
include/uapi/linux/v4l2-controls.h | 84 ++++
include/uapi/linux/videodev2.h | 1 +
18 files changed, 1684 insertions(+), 77 deletions(-)
create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v10.h
--
2.7.4
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 00/12] Add MFC v10.10 support
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel
This patch series adds MFC v10.10 support. MFC v10.10 is used in some
of Exynos7 variants.
This adds support for following:
* Add support for HEVC encoder and decoder
* Add support for VP9 decoder
* Update Documentation for control id definitions
* Update computation of min scratch buffer size requirement for V8 onwards
Changes since v4:
- Addressed review comments by Sylwester Nawrocki.
- Addressed review comments by Hans Verkuil.
- Rebased on latest git://linuxtv.org/snawrocki/samsung.git
for-v4.13/media/next and for-v4.12/media/next-2 branches,
the same series of patches applies on both branches.
- Applied r-o-b from Andrzej on respective patches.
- Built and checked the Documentation.
Smitha T Murthy (12):
[media] s5p-mfc: Rename IS_MFCV8 macro
[media] s5p-mfc: Adding initial support for MFC v10.10
[media] s5p-mfc: Use min scratch buffer size as provided by F/W
[media] s5p-mfc: Support MFCv10.10 buffer requirements
[media] videodev2.h: Add v4l2 definition for HEVC
[media] v4l2-ioctl: add HEVC format description
Documentation: v4l: Documentation for HEVC v4l2 definition
[media] s5p-mfc: Add support for HEVC decoder
[media] s5p-mfc: Add VP9 decoder support
[media] v4l2: Add v4l2 control IDs for HEVC encoder
[media] s5p-mfc: Add support for HEVC encoder
Documention: v4l: Documentation for HEVC CIDs
.../devicetree/bindings/media/s5p-mfc.txt | 1 +
Documentation/media/uapi/v4l/extended-controls.rst | 364 ++++++++++++++
Documentation/media/uapi/v4l/pixfmt-013.rst | 5 +
drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 88 ++++
drivers/media/platform/s5p-mfc/regs-mfc-v8.h | 2 +
drivers/media/platform/s5p-mfc/s5p_mfc.c | 28 ++
drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c | 9 +
drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 67 ++-
drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c | 6 +-
drivers/media/platform/s5p-mfc/s5p_mfc_dec.c | 48 +-
drivers/media/platform/s5p-mfc/s5p_mfc_enc.c | 542 ++++++++++++++++++++-
drivers/media/platform/s5p-mfc/s5p_mfc_opr.h | 14 +
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 383 +++++++++++++--
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 15 +
drivers/media/v4l2-core/v4l2-ctrls.c | 103 ++++
drivers/media/v4l2-core/v4l2-ioctl.c | 1 +
include/uapi/linux/v4l2-controls.h | 84 ++++
include/uapi/linux/videodev2.h | 1 +
18 files changed, 1684 insertions(+), 77 deletions(-)
create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v10.h
--
2.7.4
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 01/12] [media] s5p-mfc: Rename IS_MFCV8 macro
[not found] ` <CGME20170619052455epcas5p3b0c71e840af3b9022bf69d1058cc94e5@epcas5p3.samsung.com>
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki, Smitha T Murthy
This patch renames macro IS_MFCV8 to IS_MFCV8_PLUS so that the MFCv8
code can be resued for MFCv10.10 support. Since the MFCv8 specific code
holds good for MFC v10.10 also.
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Acked-by: Andrzej Hajda <a.hajda@samsung.com>
---
drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 2 +-
drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c | 2 +-
drivers/media/platform/s5p-mfc/s5p_mfc_dec.c | 2 +-
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 18 +++++++++---------
4 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 4220914..5fb2684 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -711,7 +711,7 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq);
#define IS_TWOPORT(dev) (dev->variant->port_num == 2 ? 1 : 0)
#define IS_MFCV6_PLUS(dev) (dev->variant->version >= 0x60 ? 1 : 0)
#define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70 ? 1 : 0)
-#define IS_MFCV8(dev) (dev->variant->version >= 0x80 ? 1 : 0)
+#define IS_MFCV8_PLUS(dev) (dev->variant->version >= 0x80 ? 1 : 0)
#define MFC_V5_BIT BIT(0)
#define MFC_V6_BIT BIT(1)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
index 69ef9c2..3769d22 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
@@ -399,7 +399,7 @@ int s5p_mfc_wakeup(struct s5p_mfc_dev *dev)
s5p_mfc_clear_cmds(dev);
s5p_mfc_clean_dev_int_flags(dev);
/* 3. Send MFC wakeup command and wait for completion*/
- if (IS_MFCV8(dev))
+ if (IS_MFCV8_PLUS(dev))
ret = s5p_mfc_v8_wait_wakeup(dev);
else
ret = s5p_mfc_wait_wakeup(dev);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 8937b0a..42e9351 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -1177,7 +1177,7 @@ void s5p_mfc_dec_init(struct s5p_mfc_ctx *ctx)
struct v4l2_format f;
f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264;
ctx->src_fmt = find_format(&f, MFC_FMT_DEC);
- if (IS_MFCV8(ctx->dev))
+ if (IS_MFCV8_PLUS(ctx->dev))
f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12M;
else if (IS_MFCV6_PLUS(ctx->dev))
f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12MT_16X16;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 88dbb9c..fe14479 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -74,7 +74,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->luma_size, ctx->chroma_size, ctx->mv_size);
mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
} else if (ctx->type == MFCINST_ENCODER) {
- if (IS_MFCV8(dev))
+ if (IS_MFCV8_PLUS(dev))
ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
S5P_FIMV_TMV_BUFFER_ALIGN_V6);
@@ -89,7 +89,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
- if (IS_MFCV8(dev))
+ if (IS_MFCV8_PLUS(dev))
ctx->me_buffer_size = ALIGN(S5P_FIMV_ME_BUFFER_SIZE_V8(
ctx->img_width, ctx->img_height,
mb_width, mb_height),
@@ -110,7 +110,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
switch (ctx->codec_mode) {
case S5P_MFC_CODEC_H264_DEC:
case S5P_MFC_CODEC_H264_MVC_DEC:
- if (IS_MFCV8(dev))
+ if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_H264_DEC_V8(
mb_width,
@@ -167,7 +167,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->bank1.size = ctx->scratch_buf_size;
break;
case S5P_MFC_CODEC_VP8_DEC:
- if (IS_MFCV8(dev))
+ if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_VP8_DEC_V8(
mb_width,
@@ -182,7 +182,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->bank1.size = ctx->scratch_buf_size;
break;
case S5P_MFC_CODEC_H264_ENC:
- if (IS_MFCV8(dev))
+ if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8(
mb_width,
@@ -215,7 +215,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->bank2.size = 0;
break;
case S5P_MFC_CODEC_VP8_ENC:
- if (IS_MFCV8(dev))
+ if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8(
mb_width,
@@ -364,7 +364,7 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
ctx->luma_size = calc_plane(ctx->img_width, ctx->img_height);
ctx->chroma_size = calc_plane(ctx->img_width, (ctx->img_height >> 1));
- if (IS_MFCV8(ctx->dev)) {
+ if (IS_MFCV8_PLUS(ctx->dev)) {
/* MFCv8 needs additional 64 bytes for luma,chroma dpb*/
ctx->luma_size += S5P_FIMV_D_ALIGN_PLANE_SIZE_V8;
ctx->chroma_size += S5P_FIMV_D_ALIGN_PLANE_SIZE_V8;
@@ -445,7 +445,7 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
writel(buf_addr1, mfc_regs->d_scratch_buffer_addr);
writel(ctx->scratch_buf_size, mfc_regs->d_scratch_buffer_size);
- if (IS_MFCV8(dev)) {
+ if (IS_MFCV8_PLUS(dev)) {
writel(ctx->img_width,
mfc_regs->d_first_plane_dpb_stride_size);
writel(ctx->img_width,
@@ -2109,7 +2109,7 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
S5P_FIMV_E_ENCODED_SOURCE_SECOND_ADDR_V7);
R(e_vp8_options, S5P_FIMV_E_VP8_OPTIONS_V7);
- if (!IS_MFCV8(dev))
+ if (!IS_MFCV8_PLUS(dev))
goto done;
/* Initialize registers used in MFC v8 only.
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 01/12] [media] s5p-mfc: Rename IS_MFCV8 macro
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel
This patch renames macro IS_MFCV8 to IS_MFCV8_PLUS so that the MFCv8
code can be resued for MFCv10.10 support. Since the MFCv8 specific code
holds good for MFC v10.10 also.
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Acked-by: Andrzej Hajda <a.hajda@samsung.com>
---
drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 2 +-
drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c | 2 +-
drivers/media/platform/s5p-mfc/s5p_mfc_dec.c | 2 +-
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 18 +++++++++---------
4 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 4220914..5fb2684 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -711,7 +711,7 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq);
#define IS_TWOPORT(dev) (dev->variant->port_num == 2 ? 1 : 0)
#define IS_MFCV6_PLUS(dev) (dev->variant->version >= 0x60 ? 1 : 0)
#define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70 ? 1 : 0)
-#define IS_MFCV8(dev) (dev->variant->version >= 0x80 ? 1 : 0)
+#define IS_MFCV8_PLUS(dev) (dev->variant->version >= 0x80 ? 1 : 0)
#define MFC_V5_BIT BIT(0)
#define MFC_V6_BIT BIT(1)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
index 69ef9c2..3769d22 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
@@ -399,7 +399,7 @@ int s5p_mfc_wakeup(struct s5p_mfc_dev *dev)
s5p_mfc_clear_cmds(dev);
s5p_mfc_clean_dev_int_flags(dev);
/* 3. Send MFC wakeup command and wait for completion*/
- if (IS_MFCV8(dev))
+ if (IS_MFCV8_PLUS(dev))
ret = s5p_mfc_v8_wait_wakeup(dev);
else
ret = s5p_mfc_wait_wakeup(dev);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 8937b0a..42e9351 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -1177,7 +1177,7 @@ void s5p_mfc_dec_init(struct s5p_mfc_ctx *ctx)
struct v4l2_format f;
f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264;
ctx->src_fmt = find_format(&f, MFC_FMT_DEC);
- if (IS_MFCV8(ctx->dev))
+ if (IS_MFCV8_PLUS(ctx->dev))
f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12M;
else if (IS_MFCV6_PLUS(ctx->dev))
f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12MT_16X16;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 88dbb9c..fe14479 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -74,7 +74,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->luma_size, ctx->chroma_size, ctx->mv_size);
mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
} else if (ctx->type == MFCINST_ENCODER) {
- if (IS_MFCV8(dev))
+ if (IS_MFCV8_PLUS(dev))
ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
S5P_FIMV_TMV_BUFFER_ALIGN_V6);
@@ -89,7 +89,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
- if (IS_MFCV8(dev))
+ if (IS_MFCV8_PLUS(dev))
ctx->me_buffer_size = ALIGN(S5P_FIMV_ME_BUFFER_SIZE_V8(
ctx->img_width, ctx->img_height,
mb_width, mb_height),
@@ -110,7 +110,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
switch (ctx->codec_mode) {
case S5P_MFC_CODEC_H264_DEC:
case S5P_MFC_CODEC_H264_MVC_DEC:
- if (IS_MFCV8(dev))
+ if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_H264_DEC_V8(
mb_width,
@@ -167,7 +167,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->bank1.size = ctx->scratch_buf_size;
break;
case S5P_MFC_CODEC_VP8_DEC:
- if (IS_MFCV8(dev))
+ if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_VP8_DEC_V8(
mb_width,
@@ -182,7 +182,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->bank1.size = ctx->scratch_buf_size;
break;
case S5P_MFC_CODEC_H264_ENC:
- if (IS_MFCV8(dev))
+ if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8(
mb_width,
@@ -215,7 +215,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->bank2.size = 0;
break;
case S5P_MFC_CODEC_VP8_ENC:
- if (IS_MFCV8(dev))
+ if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8(
mb_width,
@@ -364,7 +364,7 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
ctx->luma_size = calc_plane(ctx->img_width, ctx->img_height);
ctx->chroma_size = calc_plane(ctx->img_width, (ctx->img_height >> 1));
- if (IS_MFCV8(ctx->dev)) {
+ if (IS_MFCV8_PLUS(ctx->dev)) {
/* MFCv8 needs additional 64 bytes for luma,chroma dpb*/
ctx->luma_size += S5P_FIMV_D_ALIGN_PLANE_SIZE_V8;
ctx->chroma_size += S5P_FIMV_D_ALIGN_PLANE_SIZE_V8;
@@ -445,7 +445,7 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
writel(buf_addr1, mfc_regs->d_scratch_buffer_addr);
writel(ctx->scratch_buf_size, mfc_regs->d_scratch_buffer_size);
- if (IS_MFCV8(dev)) {
+ if (IS_MFCV8_PLUS(dev)) {
writel(ctx->img_width,
mfc_regs->d_first_plane_dpb_stride_size);
writel(ctx->img_width,
@@ -2109,7 +2109,7 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
S5P_FIMV_E_ENCODED_SOURCE_SECOND_ADDR_V7);
R(e_vp8_options, S5P_FIMV_E_VP8_OPTIONS_V7);
- if (!IS_MFCV8(dev))
+ if (!IS_MFCV8_PLUS(dev))
goto done;
/* Initialize registers used in MFC v8 only.
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 02/12] [media] s5p-mfc: Adding initial support for MFC v10.10
[not found] ` <CGME20170619052458epcas5p3ffbe45cb390e87df6bb11980cd7498aa@epcas5p3.samsung.com>
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki, Smitha T Murthy, Rob Herring,
devicetree
Adding the support for MFC v10.10, with new register file and
necessary hw control, decoder, encoder and structural changes.
CC: Rob Herring <robh+dt@kernel.org>
CC: devicetree@vger.kernel.org
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/media/s5p-mfc.txt | 1 +
drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 36 ++++++++++++++++++++++
drivers/media/platform/s5p-mfc/s5p_mfc.c | 25 +++++++++++++++
drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 9 +++++-
drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c | 4 +++
drivers/media/platform/s5p-mfc/s5p_mfc_dec.c | 32 ++++++++-----------
drivers/media/platform/s5p-mfc/s5p_mfc_enc.c | 16 ++++------
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 9 ++++--
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 2 ++
9 files changed, 101 insertions(+), 33 deletions(-)
create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v10.h
diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt b/Documentation/devicetree/bindings/media/s5p-mfc.txt
index d3404b5..aa54c81 100644
--- a/Documentation/devicetree/bindings/media/s5p-mfc.txt
+++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt
@@ -13,6 +13,7 @@ Required properties:
(c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
(d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC
(e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC
+ (f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC
- reg : Physical base address of the IP registers and length of memory
mapped region.
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
new file mode 100644
index 0000000..1ca09d6
--- /dev/null
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -0,0 +1,36 @@
+/*
+ * Register definition file for Samsung MFC V10.x Interface (FIMV) driver
+ *
+ * Copyright (c) 2017 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _REGS_MFC_V10_H
+#define _REGS_MFC_V10_H
+
+#include <linux/sizes.h>
+#include "regs-mfc-v8.h"
+
+/* MFCv10 register definitions*/
+#define S5P_FIMV_MFC_CLOCK_OFF_V10 0x7120
+#define S5P_FIMV_MFC_STATE_V10 0x7124
+
+/* MFCv10 Context buffer sizes */
+#define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
+#define MFC_H264_DEC_CTX_BUF_SIZE_V10 (2 * SZ_1M)
+#define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)
+#define MFC_H264_ENC_CTX_BUF_SIZE_V10 (100 * SZ_1K)
+#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
+
+/* MFCv10 variant defines */
+#define MAX_FW_SIZE_V10 (SZ_1M)
+#define MAX_CPB_SIZE_V10 (3 * SZ_1M)
+#define MFC_VERSION_V10 0xA0
+#define MFC_NUM_PORTS_V10 1
+
+#endif /*_REGS_MFC_V10_H*/
+
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 43ca572..1b032f8 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -1614,6 +1614,28 @@ static struct s5p_mfc_variant mfc_drvdata_v8_5433 = {
.num_clocks = 3,
};
+static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
+ .dev_ctx = MFC_CTX_BUF_SIZE_V10,
+ .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V10,
+ .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
+ .h264_enc_ctx = MFC_H264_ENC_CTX_BUF_SIZE_V10,
+ .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
+};
+
+static struct s5p_mfc_buf_size buf_size_v10 = {
+ .fw = MAX_FW_SIZE_V10,
+ .cpb = MAX_CPB_SIZE_V10,
+ .priv = &mfc_buf_size_v10,
+};
+
+static struct s5p_mfc_variant mfc_drvdata_v10 = {
+ .version = MFC_VERSION_V10,
+ .version_bit = MFC_V10_BIT,
+ .port_num = MFC_NUM_PORTS_V10,
+ .buf_size = &buf_size_v10,
+ .fw_name[0] = "s5p-mfc-v10.fw",
+};
+
static const struct of_device_id exynos_mfc_match[] = {
{
.compatible = "samsung,mfc-v5",
@@ -1630,6 +1652,9 @@ static const struct of_device_id exynos_mfc_match[] = {
}, {
.compatible = "samsung,exynos5433-mfc",
.data = &mfc_drvdata_v8_5433,
+ }, {
+ .compatible = "samsung,mfc-v10",
+ .data = &mfc_drvdata_v10,
},
{},
};
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 5fb2684..eb0cf5e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -23,7 +23,7 @@
#include <media/v4l2-ioctl.h>
#include <media/videobuf2-v4l2.h>
#include "regs-mfc.h"
-#include "regs-mfc-v8.h"
+#include "regs-mfc-v10.h"
#define S5P_MFC_NAME "s5p-mfc"
@@ -712,11 +712,18 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq);
#define IS_MFCV6_PLUS(dev) (dev->variant->version >= 0x60 ? 1 : 0)
#define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70 ? 1 : 0)
#define IS_MFCV8_PLUS(dev) (dev->variant->version >= 0x80 ? 1 : 0)
+#define IS_MFCV10(dev) (dev->variant->version >= 0xA0 ? 1 : 0)
#define MFC_V5_BIT BIT(0)
#define MFC_V6_BIT BIT(1)
#define MFC_V7_BIT BIT(2)
#define MFC_V8_BIT BIT(3)
+#define MFC_V10_BIT BIT(5)
+#define MFC_V5PLUS_BITS (MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT | \
+ MFC_V8_BIT | MFC_V10_BIT)
+#define MFC_V6PLUS_BITS (MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT | \
+ MFC_V10_BIT)
+#define MFC_V7PLUS_BITS (MFC_V7_BIT | MFC_V8_BIT | MFC_V10_BIT)
#endif /* S5P_MFC_COMMON_H_ */
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
index 3769d22..3a3dd6d 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
@@ -239,6 +239,10 @@ int s5p_mfc_init_hw(struct s5p_mfc_dev *dev)
}
else
mfc_write(dev, 0x3ff, S5P_FIMV_SW_RESET);
+
+ if (IS_MFCV10(dev))
+ mfc_write(dev, 0x0, S5P_FIMV_MFC_CLOCK_OFF_V10);
+
mfc_debug(2, "Will now wait for completion of firmware transfer\n");
if (s5p_mfc_wait_for_done_dev(dev, S5P_MFC_R2H_CMD_FW_STATUS_RET)) {
mfc_err("Failed to load firmware\n");
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 42e9351..81de3029 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -54,7 +54,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_NONE,
.type = MFC_FMT_RAW,
.num_planes = 2,
- .versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+ .versions = MFC_V6PLUS_BITS,
},
{
.name = "4:2:0 2 Planes Y/CrCb",
@@ -62,7 +62,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_NONE,
.type = MFC_FMT_RAW,
.num_planes = 2,
- .versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+ .versions = MFC_V6PLUS_BITS,
},
{
.name = "H264 Encoded Stream",
@@ -70,8 +70,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_H264_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "H264/MVC Encoded Stream",
@@ -79,7 +78,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_H264_MVC_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+ .versions = MFC_V6PLUS_BITS,
},
{
.name = "H263 Encoded Stream",
@@ -87,8 +86,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_H263_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "MPEG1 Encoded Stream",
@@ -96,8 +94,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_MPEG2_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "MPEG2 Encoded Stream",
@@ -105,8 +102,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_MPEG2_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "MPEG4 Encoded Stream",
@@ -114,8 +110,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_MPEG4_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "XviD Encoded Stream",
@@ -123,8 +118,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_MPEG4_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "VC1 Encoded Stream",
@@ -132,8 +126,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_VC1_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "VC1 RCV Encoded Stream",
@@ -141,8 +134,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_VC1RCV_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "VP8 Encoded Stream",
@@ -150,7 +142,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_VP8_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+ .versions = MFC_V6PLUS_BITS,
},
};
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index 2a5fd7c..64b6b6d 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -57,8 +57,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_NONE,
.type = MFC_FMT_RAW,
.num_planes = 2,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "4:2:0 2 Planes Y/CrCb",
@@ -66,7 +65,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_NONE,
.type = MFC_FMT_RAW,
.num_planes = 2,
- .versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+ .versions = MFC_V6PLUS_BITS,
},
{
.name = "H264 Encoded Stream",
@@ -74,8 +73,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_H264_ENC,
.type = MFC_FMT_ENC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "MPEG4 Encoded Stream",
@@ -83,8 +81,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_MPEG4_ENC,
.type = MFC_FMT_ENC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "H263 Encoded Stream",
@@ -92,8 +89,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_H263_ENC,
.type = MFC_FMT_ENC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "VP8 Encoded Stream",
@@ -101,7 +97,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_VP8_ENC,
.type = MFC_FMT_ENC,
.num_planes = 1,
- .versions = MFC_V7_BIT | MFC_V8_BIT,
+ .versions = MFC_V7PLUS_BITS,
},
};
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index fe14479..2041d81 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -356,6 +356,7 @@ static int calc_plane(int width, int height)
static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
{
+ struct s5p_mfc_dev *dev = ctx->dev;
ctx->buf_width = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN_V6);
ctx->buf_height = ALIGN(ctx->img_height, S5P_FIMV_NV12MT_VALIGN_V6);
mfc_debug(2, "SEQ Done: Movie dimensions %dx%d,\n"
@@ -372,8 +373,12 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
- ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
- ctx->img_height);
+ if (IS_MFCV10(dev))
+ ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width,
+ ctx->img_height);
+ else
+ ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
+ ctx->img_height);
ctx->mv_size = ALIGN(ctx->mv_size, 16);
} else {
ctx->mv_size = 0;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
index 8055848..021b8db 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
@@ -24,6 +24,8 @@
#define MB_HEIGHT(y_size) DIV_ROUND_UP(y_size, 16)
#define S5P_MFC_DEC_MV_SIZE_V6(x, y) (MB_WIDTH(x) * \
(((MB_HEIGHT(y)+1)/2)*2) * 64 + 128)
+#define S5P_MFC_DEC_MV_SIZE_V10(x, y) (MB_WIDTH(x) * \
+ (((MB_HEIGHT(y)+1)/2)*2) * 64 + 512)
/* Definition */
#define ENC_MULTI_SLICE_MB_MAX ((1 << 30) - 1)
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 02/12] [media] s5p-mfc: Adding initial support for MFC v10.10
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel
Adding the support for MFC v10.10, with new register file and
necessary hw control, decoder, encoder and structural changes.
CC: Rob Herring <robh+dt@kernel.org>
CC: devicetree at vger.kernel.org
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/media/s5p-mfc.txt | 1 +
drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 36 ++++++++++++++++++++++
drivers/media/platform/s5p-mfc/s5p_mfc.c | 25 +++++++++++++++
drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 9 +++++-
drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c | 4 +++
drivers/media/platform/s5p-mfc/s5p_mfc_dec.c | 32 ++++++++-----------
drivers/media/platform/s5p-mfc/s5p_mfc_enc.c | 16 ++++------
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 9 ++++--
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 2 ++
9 files changed, 101 insertions(+), 33 deletions(-)
create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v10.h
diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt b/Documentation/devicetree/bindings/media/s5p-mfc.txt
index d3404b5..aa54c81 100644
--- a/Documentation/devicetree/bindings/media/s5p-mfc.txt
+++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt
@@ -13,6 +13,7 @@ Required properties:
(c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
(d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC
(e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC
+ (f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC
- reg : Physical base address of the IP registers and length of memory
mapped region.
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
new file mode 100644
index 0000000..1ca09d6
--- /dev/null
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -0,0 +1,36 @@
+/*
+ * Register definition file for Samsung MFC V10.x Interface (FIMV) driver
+ *
+ * Copyright (c) 2017 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _REGS_MFC_V10_H
+#define _REGS_MFC_V10_H
+
+#include <linux/sizes.h>
+#include "regs-mfc-v8.h"
+
+/* MFCv10 register definitions*/
+#define S5P_FIMV_MFC_CLOCK_OFF_V10 0x7120
+#define S5P_FIMV_MFC_STATE_V10 0x7124
+
+/* MFCv10 Context buffer sizes */
+#define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
+#define MFC_H264_DEC_CTX_BUF_SIZE_V10 (2 * SZ_1M)
+#define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)
+#define MFC_H264_ENC_CTX_BUF_SIZE_V10 (100 * SZ_1K)
+#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
+
+/* MFCv10 variant defines */
+#define MAX_FW_SIZE_V10 (SZ_1M)
+#define MAX_CPB_SIZE_V10 (3 * SZ_1M)
+#define MFC_VERSION_V10 0xA0
+#define MFC_NUM_PORTS_V10 1
+
+#endif /*_REGS_MFC_V10_H*/
+
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 43ca572..1b032f8 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -1614,6 +1614,28 @@ static struct s5p_mfc_variant mfc_drvdata_v8_5433 = {
.num_clocks = 3,
};
+static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
+ .dev_ctx = MFC_CTX_BUF_SIZE_V10,
+ .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V10,
+ .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
+ .h264_enc_ctx = MFC_H264_ENC_CTX_BUF_SIZE_V10,
+ .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
+};
+
+static struct s5p_mfc_buf_size buf_size_v10 = {
+ .fw = MAX_FW_SIZE_V10,
+ .cpb = MAX_CPB_SIZE_V10,
+ .priv = &mfc_buf_size_v10,
+};
+
+static struct s5p_mfc_variant mfc_drvdata_v10 = {
+ .version = MFC_VERSION_V10,
+ .version_bit = MFC_V10_BIT,
+ .port_num = MFC_NUM_PORTS_V10,
+ .buf_size = &buf_size_v10,
+ .fw_name[0] = "s5p-mfc-v10.fw",
+};
+
static const struct of_device_id exynos_mfc_match[] = {
{
.compatible = "samsung,mfc-v5",
@@ -1630,6 +1652,9 @@ static const struct of_device_id exynos_mfc_match[] = {
}, {
.compatible = "samsung,exynos5433-mfc",
.data = &mfc_drvdata_v8_5433,
+ }, {
+ .compatible = "samsung,mfc-v10",
+ .data = &mfc_drvdata_v10,
},
{},
};
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 5fb2684..eb0cf5e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -23,7 +23,7 @@
#include <media/v4l2-ioctl.h>
#include <media/videobuf2-v4l2.h>
#include "regs-mfc.h"
-#include "regs-mfc-v8.h"
+#include "regs-mfc-v10.h"
#define S5P_MFC_NAME "s5p-mfc"
@@ -712,11 +712,18 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq);
#define IS_MFCV6_PLUS(dev) (dev->variant->version >= 0x60 ? 1 : 0)
#define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70 ? 1 : 0)
#define IS_MFCV8_PLUS(dev) (dev->variant->version >= 0x80 ? 1 : 0)
+#define IS_MFCV10(dev) (dev->variant->version >= 0xA0 ? 1 : 0)
#define MFC_V5_BIT BIT(0)
#define MFC_V6_BIT BIT(1)
#define MFC_V7_BIT BIT(2)
#define MFC_V8_BIT BIT(3)
+#define MFC_V10_BIT BIT(5)
+#define MFC_V5PLUS_BITS (MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT | \
+ MFC_V8_BIT | MFC_V10_BIT)
+#define MFC_V6PLUS_BITS (MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT | \
+ MFC_V10_BIT)
+#define MFC_V7PLUS_BITS (MFC_V7_BIT | MFC_V8_BIT | MFC_V10_BIT)
#endif /* S5P_MFC_COMMON_H_ */
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
index 3769d22..3a3dd6d 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
@@ -239,6 +239,10 @@ int s5p_mfc_init_hw(struct s5p_mfc_dev *dev)
}
else
mfc_write(dev, 0x3ff, S5P_FIMV_SW_RESET);
+
+ if (IS_MFCV10(dev))
+ mfc_write(dev, 0x0, S5P_FIMV_MFC_CLOCK_OFF_V10);
+
mfc_debug(2, "Will now wait for completion of firmware transfer\n");
if (s5p_mfc_wait_for_done_dev(dev, S5P_MFC_R2H_CMD_FW_STATUS_RET)) {
mfc_err("Failed to load firmware\n");
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 42e9351..81de3029 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -54,7 +54,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_NONE,
.type = MFC_FMT_RAW,
.num_planes = 2,
- .versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+ .versions = MFC_V6PLUS_BITS,
},
{
.name = "4:2:0 2 Planes Y/CrCb",
@@ -62,7 +62,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_NONE,
.type = MFC_FMT_RAW,
.num_planes = 2,
- .versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+ .versions = MFC_V6PLUS_BITS,
},
{
.name = "H264 Encoded Stream",
@@ -70,8 +70,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_H264_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "H264/MVC Encoded Stream",
@@ -79,7 +78,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_H264_MVC_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+ .versions = MFC_V6PLUS_BITS,
},
{
.name = "H263 Encoded Stream",
@@ -87,8 +86,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_H263_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "MPEG1 Encoded Stream",
@@ -96,8 +94,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_MPEG2_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "MPEG2 Encoded Stream",
@@ -105,8 +102,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_MPEG2_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "MPEG4 Encoded Stream",
@@ -114,8 +110,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_MPEG4_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "XviD Encoded Stream",
@@ -123,8 +118,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_MPEG4_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "VC1 Encoded Stream",
@@ -132,8 +126,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_VC1_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "VC1 RCV Encoded Stream",
@@ -141,8 +134,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_VC1RCV_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "VP8 Encoded Stream",
@@ -150,7 +142,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_VP8_DEC,
.type = MFC_FMT_DEC,
.num_planes = 1,
- .versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+ .versions = MFC_V6PLUS_BITS,
},
};
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index 2a5fd7c..64b6b6d 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -57,8 +57,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_NONE,
.type = MFC_FMT_RAW,
.num_planes = 2,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "4:2:0 2 Planes Y/CrCb",
@@ -66,7 +65,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_NONE,
.type = MFC_FMT_RAW,
.num_planes = 2,
- .versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
+ .versions = MFC_V6PLUS_BITS,
},
{
.name = "H264 Encoded Stream",
@@ -74,8 +73,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_H264_ENC,
.type = MFC_FMT_ENC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "MPEG4 Encoded Stream",
@@ -83,8 +81,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_MPEG4_ENC,
.type = MFC_FMT_ENC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "H263 Encoded Stream",
@@ -92,8 +89,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_H263_ENC,
.type = MFC_FMT_ENC,
.num_planes = 1,
- .versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
- MFC_V8_BIT,
+ .versions = MFC_V5PLUS_BITS,
},
{
.name = "VP8 Encoded Stream",
@@ -101,7 +97,7 @@ static struct s5p_mfc_fmt formats[] = {
.codec_mode = S5P_MFC_CODEC_VP8_ENC,
.type = MFC_FMT_ENC,
.num_planes = 1,
- .versions = MFC_V7_BIT | MFC_V8_BIT,
+ .versions = MFC_V7PLUS_BITS,
},
};
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index fe14479..2041d81 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -356,6 +356,7 @@ static int calc_plane(int width, int height)
static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
{
+ struct s5p_mfc_dev *dev = ctx->dev;
ctx->buf_width = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN_V6);
ctx->buf_height = ALIGN(ctx->img_height, S5P_FIMV_NV12MT_VALIGN_V6);
mfc_debug(2, "SEQ Done: Movie dimensions %dx%d,\n"
@@ -372,8 +373,12 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
- ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
- ctx->img_height);
+ if (IS_MFCV10(dev))
+ ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width,
+ ctx->img_height);
+ else
+ ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
+ ctx->img_height);
ctx->mv_size = ALIGN(ctx->mv_size, 16);
} else {
ctx->mv_size = 0;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
index 8055848..021b8db 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
@@ -24,6 +24,8 @@
#define MB_HEIGHT(y_size) DIV_ROUND_UP(y_size, 16)
#define S5P_MFC_DEC_MV_SIZE_V6(x, y) (MB_WIDTH(x) * \
(((MB_HEIGHT(y)+1)/2)*2) * 64 + 128)
+#define S5P_MFC_DEC_MV_SIZE_V10(x, y) (MB_WIDTH(x) * \
+ (((MB_HEIGHT(y)+1)/2)*2) * 64 + 512)
/* Definition */
#define ENC_MULTI_SLICE_MB_MAX ((1 << 30) - 1)
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 03/12] [media] s5p-mfc: Use min scratch buffer size as provided by F/W
[not found] ` <CGME20170619052500epcas1p477df788aee11a5a0d3e2defac97e9ae3@epcas1p4.samsung.com>
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki, Smitha T Murthy
After MFC v8.0, mfc f/w lets the driver know how much scratch buffer
size is required for decoder. If mfc f/w has the functionality,
E_MIN_SCRATCH_BUFFER_SIZE, driver can know how much scratch buffer size
is required for encoder too.
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
drivers/media/platform/s5p-mfc/regs-mfc-v8.h | 2 +
drivers/media/platform/s5p-mfc/s5p_mfc.c | 2 +
drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 1 +
drivers/media/platform/s5p-mfc/s5p_mfc_enc.c | 5 ++
drivers/media/platform/s5p-mfc/s5p_mfc_opr.h | 4 ++
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 68 ++++++++++++++++++-------
6 files changed, 65 insertions(+), 17 deletions(-)
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v8.h b/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
index 75f5f75..bd639ae 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
@@ -17,6 +17,7 @@
/* Additional registers for v8 */
#define S5P_FIMV_D_MVC_NUM_VIEWS_V8 0xf104
+#define S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8 0xf108
#define S5P_FIMV_D_FIRST_PLANE_DPB_SIZE_V8 0xf144
#define S5P_FIMV_D_SECOND_PLANE_DPB_SIZE_V8 0xf148
#define S5P_FIMV_D_MV_BUFFER_SIZE_V8 0xf150
@@ -84,6 +85,7 @@
#define S5P_FIMV_E_VBV_BUFFER_SIZE_V8 0xf78c
#define S5P_FIMV_E_VBV_INIT_DELAY_V8 0xf790
+#define S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8 0xf894
#define S5P_FIMV_E_ASPECT_RATIO_V8 0xfb4c
#define S5P_FIMV_E_EXTENDED_SAR_V8 0xfb50
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 1b032f8..efc36b0 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -526,6 +526,8 @@ static void s5p_mfc_handle_seq_done(struct s5p_mfc_ctx *ctx,
dev);
ctx->mv_count = s5p_mfc_hw_call(dev->mfc_ops, get_mv_count,
dev);
+ ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops,
+ get_min_scratch_buf_size, dev);
if (ctx->img_width == 0 || ctx->img_height == 0)
ctx->state = MFCINST_ERROR;
else
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index eb0cf5e..e65e1c3 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -713,6 +713,7 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq);
#define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70 ? 1 : 0)
#define IS_MFCV8_PLUS(dev) (dev->variant->version >= 0x80 ? 1 : 0)
#define IS_MFCV10(dev) (dev->variant->version >= 0xA0 ? 1 : 0)
+#define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10(dev))
#define MFC_V5_BIT BIT(0)
#define MFC_V6_BIT BIT(1)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index 64b6b6d..eb5352a 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -813,6 +813,11 @@ static int enc_post_seq_start(struct s5p_mfc_ctx *ctx)
get_enc_dpb_count, dev);
if (ctx->pb_count < enc_pb_count)
ctx->pb_count = enc_pb_count;
+ if (FW_HAS_E_MIN_SCRATCH_BUF(dev)) {
+ ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops,
+ get_e_min_scratch_buf_size, dev);
+ ctx->bank1.size += ctx->scratch_buf_size;
+ }
ctx->state = MFCINST_HEAD_PRODUCED;
}
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index 16d553f..e7a2d46 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -169,6 +169,7 @@ struct s5p_mfc_regs {
void __iomem *d_decoded_third_addr;/* only v7 */
void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */
void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */
+ void __iomem *d_min_scratch_buffer_size; /* v10 */
/* encoder registers */
void __iomem *e_frame_width;
@@ -268,6 +269,7 @@ struct s5p_mfc_regs {
void __iomem *e_vp8_hierarchical_qp_layer0;/* v7 and v8 */
void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */
void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */
+ void __iomem *e_min_scratch_buffer_size; /* v10 */
};
struct s5p_mfc_hw_ops {
@@ -311,6 +313,8 @@ struct s5p_mfc_hw_ops {
unsigned int (*get_pic_type_bot)(struct s5p_mfc_ctx *ctx);
unsigned int (*get_crop_info_h)(struct s5p_mfc_ctx *ctx);
unsigned int (*get_crop_info_v)(struct s5p_mfc_ctx *ctx);
+ int (*get_min_scratch_buf_size)(struct s5p_mfc_dev *dev);
+ int (*get_e_min_scratch_buf_size)(struct s5p_mfc_dev *dev);
};
void s5p_mfc_init_hw_ops(struct s5p_mfc_dev *dev);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 2041d81..f1a8c53 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -110,7 +110,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
switch (ctx->codec_mode) {
case S5P_MFC_CODEC_H264_DEC:
case S5P_MFC_CODEC_H264_MVC_DEC:
- if (IS_MFCV8_PLUS(dev))
+ if (IS_MFCV10(dev))
+ mfc_debug(2, "Use min scratch buffer size\n");
+ else if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_H264_DEC_V8(
mb_width,
@@ -127,7 +129,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
(ctx->mv_count * ctx->mv_size);
break;
case S5P_MFC_CODEC_MPEG4_DEC:
- if (IS_MFCV7_PLUS(dev)) {
+ if (IS_MFCV10(dev))
+ mfc_debug(2, "Use min scratch buffer size\n");
+ else if (IS_MFCV7_PLUS(dev)) {
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V7(
mb_width,
@@ -145,10 +149,14 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
break;
case S5P_MFC_CODEC_VC1RCV_DEC:
case S5P_MFC_CODEC_VC1_DEC:
- ctx->scratch_buf_size =
- S5P_FIMV_SCRATCH_BUF_SIZE_VC1_DEC_V6(
- mb_width,
- mb_height);
+ if (IS_MFCV10(dev))
+ mfc_debug(2, "Use min scratch buffer size\n");
+ else
+ ctx->scratch_buf_size =
+ S5P_FIMV_SCRATCH_BUF_SIZE_VC1_DEC_V6(
+ mb_width,
+ mb_height);
+
ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
ctx->bank1.size = ctx->scratch_buf_size;
@@ -158,16 +166,21 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->bank2.size = 0;
break;
case S5P_MFC_CODEC_H263_DEC:
- ctx->scratch_buf_size =
- S5P_FIMV_SCRATCH_BUF_SIZE_H263_DEC_V6(
- mb_width,
- mb_height);
+ if (IS_MFCV10(dev))
+ mfc_debug(2, "Use min scratch buffer size\n");
+ else
+ ctx->scratch_buf_size =
+ S5P_FIMV_SCRATCH_BUF_SIZE_H263_DEC_V6(
+ mb_width,
+ mb_height);
ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
ctx->bank1.size = ctx->scratch_buf_size;
break;
case S5P_MFC_CODEC_VP8_DEC:
- if (IS_MFCV8_PLUS(dev))
+ if (IS_MFCV10(dev))
+ mfc_debug(2, "Use min scratch buffer size\n");
+ else if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_VP8_DEC_V8(
mb_width,
@@ -182,7 +195,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->bank1.size = ctx->scratch_buf_size;
break;
case S5P_MFC_CODEC_H264_ENC:
- if (IS_MFCV8_PLUS(dev))
+ if (IS_MFCV10(dev)) {
+ mfc_debug(2, "Use min scratch buffer size\n");
+ } else if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8(
mb_width,
@@ -202,10 +217,13 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
break;
case S5P_MFC_CODEC_MPEG4_ENC:
case S5P_MFC_CODEC_H263_ENC:
- ctx->scratch_buf_size =
- S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(
- mb_width,
- mb_height);
+ if (IS_MFCV10(dev)) {
+ mfc_debug(2, "Use min scratch buffer size\n");
+ } else
+ ctx->scratch_buf_size =
+ S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(
+ mb_width,
+ mb_height);
ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
ctx->bank1.size =
@@ -215,7 +233,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->bank2.size = 0;
break;
case S5P_MFC_CODEC_VP8_ENC:
- if (IS_MFCV8_PLUS(dev))
+ if (IS_MFCV10(dev)) {
+ mfc_debug(2, "Use min scratch buffer size\n");
+ } else if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8(
mb_width,
@@ -1900,6 +1920,16 @@ static int s5p_mfc_get_mv_count_v6(struct s5p_mfc_dev *dev)
return readl(dev->mfc_regs->d_min_num_mv);
}
+static int s5p_mfc_get_min_scratch_buf_size(struct s5p_mfc_dev *dev)
+{
+ return readl(dev->mfc_regs->d_min_scratch_buffer_size);
+}
+
+static int s5p_mfc_get_e_min_scratch_buf_size(struct s5p_mfc_dev *dev)
+{
+ return readl(dev->mfc_regs->e_min_scratch_buffer_size);
+}
+
static int s5p_mfc_get_inst_no_v6(struct s5p_mfc_dev *dev)
{
return readl(dev->mfc_regs->ret_instance_id);
@@ -2158,6 +2188,7 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
R(d_ret_picture_tag_bot, S5P_FIMV_D_RET_PICTURE_TAG_BOT_V8);
R(d_display_crop_info1, S5P_FIMV_D_DISPLAY_CROP_INFO1_V8);
R(d_display_crop_info2, S5P_FIMV_D_DISPLAY_CROP_INFO2_V8);
+ R(d_min_scratch_buffer_size, S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8);
/* encoder registers */
R(e_padding_ctrl, S5P_FIMV_E_PADDING_CTRL_V8);
@@ -2173,6 +2204,7 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
R(e_aspect_ratio, S5P_FIMV_E_ASPECT_RATIO_V8);
R(e_extended_sar, S5P_FIMV_E_EXTENDED_SAR_V8);
R(e_h264_options, S5P_FIMV_E_H264_OPTIONS_V8);
+ R(e_min_scratch_buffer_size, S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8);
done:
return &mfc_regs;
@@ -2221,6 +2253,8 @@ static struct s5p_mfc_hw_ops s5p_mfc_ops_v6 = {
.get_pic_type_bot = s5p_mfc_get_pic_type_bot_v6,
.get_crop_info_h = s5p_mfc_get_crop_info_h_v6,
.get_crop_info_v = s5p_mfc_get_crop_info_v_v6,
+ .get_min_scratch_buf_size = s5p_mfc_get_min_scratch_buf_size,
+ .get_e_min_scratch_buf_size = s5p_mfc_get_e_min_scratch_buf_size,
};
struct s5p_mfc_hw_ops *s5p_mfc_init_hw_ops_v6(void)
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 03/12] [media] s5p-mfc: Use min scratch buffer size as provided by F/W
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel
After MFC v8.0, mfc f/w lets the driver know how much scratch buffer
size is required for decoder. If mfc f/w has the functionality,
E_MIN_SCRATCH_BUFFER_SIZE, driver can know how much scratch buffer size
is required for encoder too.
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
drivers/media/platform/s5p-mfc/regs-mfc-v8.h | 2 +
drivers/media/platform/s5p-mfc/s5p_mfc.c | 2 +
drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 1 +
drivers/media/platform/s5p-mfc/s5p_mfc_enc.c | 5 ++
drivers/media/platform/s5p-mfc/s5p_mfc_opr.h | 4 ++
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 68 ++++++++++++++++++-------
6 files changed, 65 insertions(+), 17 deletions(-)
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v8.h b/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
index 75f5f75..bd639ae 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
@@ -17,6 +17,7 @@
/* Additional registers for v8 */
#define S5P_FIMV_D_MVC_NUM_VIEWS_V8 0xf104
+#define S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8 0xf108
#define S5P_FIMV_D_FIRST_PLANE_DPB_SIZE_V8 0xf144
#define S5P_FIMV_D_SECOND_PLANE_DPB_SIZE_V8 0xf148
#define S5P_FIMV_D_MV_BUFFER_SIZE_V8 0xf150
@@ -84,6 +85,7 @@
#define S5P_FIMV_E_VBV_BUFFER_SIZE_V8 0xf78c
#define S5P_FIMV_E_VBV_INIT_DELAY_V8 0xf790
+#define S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8 0xf894
#define S5P_FIMV_E_ASPECT_RATIO_V8 0xfb4c
#define S5P_FIMV_E_EXTENDED_SAR_V8 0xfb50
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 1b032f8..efc36b0 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -526,6 +526,8 @@ static void s5p_mfc_handle_seq_done(struct s5p_mfc_ctx *ctx,
dev);
ctx->mv_count = s5p_mfc_hw_call(dev->mfc_ops, get_mv_count,
dev);
+ ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops,
+ get_min_scratch_buf_size, dev);
if (ctx->img_width == 0 || ctx->img_height == 0)
ctx->state = MFCINST_ERROR;
else
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index eb0cf5e..e65e1c3 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -713,6 +713,7 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq);
#define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70 ? 1 : 0)
#define IS_MFCV8_PLUS(dev) (dev->variant->version >= 0x80 ? 1 : 0)
#define IS_MFCV10(dev) (dev->variant->version >= 0xA0 ? 1 : 0)
+#define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10(dev))
#define MFC_V5_BIT BIT(0)
#define MFC_V6_BIT BIT(1)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index 64b6b6d..eb5352a 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -813,6 +813,11 @@ static int enc_post_seq_start(struct s5p_mfc_ctx *ctx)
get_enc_dpb_count, dev);
if (ctx->pb_count < enc_pb_count)
ctx->pb_count = enc_pb_count;
+ if (FW_HAS_E_MIN_SCRATCH_BUF(dev)) {
+ ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops,
+ get_e_min_scratch_buf_size, dev);
+ ctx->bank1.size += ctx->scratch_buf_size;
+ }
ctx->state = MFCINST_HEAD_PRODUCED;
}
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index 16d553f..e7a2d46 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -169,6 +169,7 @@ struct s5p_mfc_regs {
void __iomem *d_decoded_third_addr;/* only v7 */
void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */
void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */
+ void __iomem *d_min_scratch_buffer_size; /* v10 */
/* encoder registers */
void __iomem *e_frame_width;
@@ -268,6 +269,7 @@ struct s5p_mfc_regs {
void __iomem *e_vp8_hierarchical_qp_layer0;/* v7 and v8 */
void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */
void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */
+ void __iomem *e_min_scratch_buffer_size; /* v10 */
};
struct s5p_mfc_hw_ops {
@@ -311,6 +313,8 @@ struct s5p_mfc_hw_ops {
unsigned int (*get_pic_type_bot)(struct s5p_mfc_ctx *ctx);
unsigned int (*get_crop_info_h)(struct s5p_mfc_ctx *ctx);
unsigned int (*get_crop_info_v)(struct s5p_mfc_ctx *ctx);
+ int (*get_min_scratch_buf_size)(struct s5p_mfc_dev *dev);
+ int (*get_e_min_scratch_buf_size)(struct s5p_mfc_dev *dev);
};
void s5p_mfc_init_hw_ops(struct s5p_mfc_dev *dev);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 2041d81..f1a8c53 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -110,7 +110,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
switch (ctx->codec_mode) {
case S5P_MFC_CODEC_H264_DEC:
case S5P_MFC_CODEC_H264_MVC_DEC:
- if (IS_MFCV8_PLUS(dev))
+ if (IS_MFCV10(dev))
+ mfc_debug(2, "Use min scratch buffer size\n");
+ else if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_H264_DEC_V8(
mb_width,
@@ -127,7 +129,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
(ctx->mv_count * ctx->mv_size);
break;
case S5P_MFC_CODEC_MPEG4_DEC:
- if (IS_MFCV7_PLUS(dev)) {
+ if (IS_MFCV10(dev))
+ mfc_debug(2, "Use min scratch buffer size\n");
+ else if (IS_MFCV7_PLUS(dev)) {
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V7(
mb_width,
@@ -145,10 +149,14 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
break;
case S5P_MFC_CODEC_VC1RCV_DEC:
case S5P_MFC_CODEC_VC1_DEC:
- ctx->scratch_buf_size =
- S5P_FIMV_SCRATCH_BUF_SIZE_VC1_DEC_V6(
- mb_width,
- mb_height);
+ if (IS_MFCV10(dev))
+ mfc_debug(2, "Use min scratch buffer size\n");
+ else
+ ctx->scratch_buf_size =
+ S5P_FIMV_SCRATCH_BUF_SIZE_VC1_DEC_V6(
+ mb_width,
+ mb_height);
+
ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
ctx->bank1.size = ctx->scratch_buf_size;
@@ -158,16 +166,21 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->bank2.size = 0;
break;
case S5P_MFC_CODEC_H263_DEC:
- ctx->scratch_buf_size =
- S5P_FIMV_SCRATCH_BUF_SIZE_H263_DEC_V6(
- mb_width,
- mb_height);
+ if (IS_MFCV10(dev))
+ mfc_debug(2, "Use min scratch buffer size\n");
+ else
+ ctx->scratch_buf_size =
+ S5P_FIMV_SCRATCH_BUF_SIZE_H263_DEC_V6(
+ mb_width,
+ mb_height);
ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
ctx->bank1.size = ctx->scratch_buf_size;
break;
case S5P_MFC_CODEC_VP8_DEC:
- if (IS_MFCV8_PLUS(dev))
+ if (IS_MFCV10(dev))
+ mfc_debug(2, "Use min scratch buffer size\n");
+ else if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_VP8_DEC_V8(
mb_width,
@@ -182,7 +195,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->bank1.size = ctx->scratch_buf_size;
break;
case S5P_MFC_CODEC_H264_ENC:
- if (IS_MFCV8_PLUS(dev))
+ if (IS_MFCV10(dev)) {
+ mfc_debug(2, "Use min scratch buffer size\n");
+ } else if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8(
mb_width,
@@ -202,10 +217,13 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
break;
case S5P_MFC_CODEC_MPEG4_ENC:
case S5P_MFC_CODEC_H263_ENC:
- ctx->scratch_buf_size =
- S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(
- mb_width,
- mb_height);
+ if (IS_MFCV10(dev)) {
+ mfc_debug(2, "Use min scratch buffer size\n");
+ } else
+ ctx->scratch_buf_size =
+ S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(
+ mb_width,
+ mb_height);
ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
ctx->bank1.size =
@@ -215,7 +233,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->bank2.size = 0;
break;
case S5P_MFC_CODEC_VP8_ENC:
- if (IS_MFCV8_PLUS(dev))
+ if (IS_MFCV10(dev)) {
+ mfc_debug(2, "Use min scratch buffer size\n");
+ } else if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8(
mb_width,
@@ -1900,6 +1920,16 @@ static int s5p_mfc_get_mv_count_v6(struct s5p_mfc_dev *dev)
return readl(dev->mfc_regs->d_min_num_mv);
}
+static int s5p_mfc_get_min_scratch_buf_size(struct s5p_mfc_dev *dev)
+{
+ return readl(dev->mfc_regs->d_min_scratch_buffer_size);
+}
+
+static int s5p_mfc_get_e_min_scratch_buf_size(struct s5p_mfc_dev *dev)
+{
+ return readl(dev->mfc_regs->e_min_scratch_buffer_size);
+}
+
static int s5p_mfc_get_inst_no_v6(struct s5p_mfc_dev *dev)
{
return readl(dev->mfc_regs->ret_instance_id);
@@ -2158,6 +2188,7 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
R(d_ret_picture_tag_bot, S5P_FIMV_D_RET_PICTURE_TAG_BOT_V8);
R(d_display_crop_info1, S5P_FIMV_D_DISPLAY_CROP_INFO1_V8);
R(d_display_crop_info2, S5P_FIMV_D_DISPLAY_CROP_INFO2_V8);
+ R(d_min_scratch_buffer_size, S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8);
/* encoder registers */
R(e_padding_ctrl, S5P_FIMV_E_PADDING_CTRL_V8);
@@ -2173,6 +2204,7 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
R(e_aspect_ratio, S5P_FIMV_E_ASPECT_RATIO_V8);
R(e_extended_sar, S5P_FIMV_E_EXTENDED_SAR_V8);
R(e_h264_options, S5P_FIMV_E_H264_OPTIONS_V8);
+ R(e_min_scratch_buffer_size, S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8);
done:
return &mfc_regs;
@@ -2221,6 +2253,8 @@ static struct s5p_mfc_hw_ops s5p_mfc_ops_v6 = {
.get_pic_type_bot = s5p_mfc_get_pic_type_bot_v6,
.get_crop_info_h = s5p_mfc_get_crop_info_h_v6,
.get_crop_info_v = s5p_mfc_get_crop_info_v_v6,
+ .get_min_scratch_buf_size = s5p_mfc_get_min_scratch_buf_size,
+ .get_e_min_scratch_buf_size = s5p_mfc_get_e_min_scratch_buf_size,
};
struct s5p_mfc_hw_ops *s5p_mfc_init_hw_ops_v6(void)
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 04/12] [media] s5p-mfc: Support MFCv10.10 buffer requirements
[not found] ` <CGME20170619052502epcas1p41e0ba072755ca63278f2d4cfdc03ed06@epcas1p4.samsung.com>
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki, Smitha T Murthy
Aligning the luma_dpb_size, chroma_dpb_size, mv_size and me_buffer_size
for MFCv10.10.
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 19 +++++
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 95 +++++++++++++++++++------
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 2 +
3 files changed, 95 insertions(+), 21 deletions(-)
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 1ca09d6..3f0dab3 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -32,5 +32,24 @@
#define MFC_VERSION_V10 0xA0
#define MFC_NUM_PORTS_V10 1
+/* MFCv10 codec defines*/
+#define S5P_FIMV_CODEC_HEVC_ENC 26
+
+/* Encoder buffer size for MFC v10.0 */
+#define ENC_V100_BASE_SIZE(x, y) \
+ (((x + 3) * (y + 3) * 8) \
+ + ((y * 64) + 1280) * DIV_ROUND_UP(x, 8))
+
+#define ENC_V100_H264_ME_SIZE(x, y) \
+ (ENC_V100_BASE_SIZE(x, y) \
+ + (DIV_ROUND_UP(x * y, 64) * 32))
+
+#define ENC_V100_MPEG4_ME_SIZE(x, y) \
+ (ENC_V100_BASE_SIZE(x, y) \
+ + (DIV_ROUND_UP(x * y, 128) * 16))
+
+#define ENC_V100_VP8_ME_SIZE(x, y) \
+ ENC_V100_BASE_SIZE(x, y)
+
#endif /*_REGS_MFC_V10_H*/
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index f1a8c53..83ea733 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -64,6 +64,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
{
struct s5p_mfc_dev *dev = ctx->dev;
unsigned int mb_width, mb_height;
+ unsigned int lcu_width = 0, lcu_height = 0;
int ret;
mb_width = MB_WIDTH(ctx->img_width);
@@ -74,7 +75,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->luma_size, ctx->chroma_size, ctx->mv_size);
mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
} else if (ctx->type == MFCINST_ENCODER) {
- if (IS_MFCV8_PLUS(dev))
+ if (IS_MFCV10(dev)) {
+ ctx->tmv_buffer_size = 0;
+ } else if (IS_MFCV8_PLUS(dev))
ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
S5P_FIMV_TMV_BUFFER_ALIGN_V6);
@@ -82,13 +85,36 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V6(mb_width, mb_height),
S5P_FIMV_TMV_BUFFER_ALIGN_V6);
-
- ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
- S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
- S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
- ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
- S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
- S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
+ if (IS_MFCV10(dev)) {
+ lcu_width = enc_lcu_width(ctx->img_width);
+ lcu_height = enc_lcu_height(ctx->img_height);
+ if (ctx->codec_mode != S5P_FIMV_CODEC_HEVC_ENC) {
+ ctx->luma_dpb_size =
+ ALIGN((mb_width * 16), 64)
+ * ALIGN((mb_height * 16), 32)
+ + 64;
+ ctx->chroma_dpb_size =
+ ALIGN((mb_width * 16), 64)
+ * (mb_height * 8)
+ + 64;
+ } else {
+ ctx->luma_dpb_size =
+ ALIGN((lcu_width * 32), 64)
+ * ALIGN((lcu_height * 32), 32)
+ + 64;
+ ctx->chroma_dpb_size =
+ ALIGN((lcu_width * 32), 64)
+ * (lcu_height * 16)
+ + 64;
+ }
+ } else {
+ ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
+ S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
+ S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
+ ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
+ S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
+ S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
+ }
if (IS_MFCV8_PLUS(dev))
ctx->me_buffer_size = ALIGN(S5P_FIMV_ME_BUFFER_SIZE_V8(
ctx->img_width, ctx->img_height,
@@ -197,6 +223,8 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_H264_ENC:
if (IS_MFCV10(dev)) {
mfc_debug(2, "Use min scratch buffer size\n");
+ ctx->me_buffer_size =
+ ALIGN(ENC_V100_H264_ME_SIZE(mb_width, mb_height), 16);
} else if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8(
@@ -219,6 +247,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_H263_ENC:
if (IS_MFCV10(dev)) {
mfc_debug(2, "Use min scratch buffer size\n");
+ ctx->me_buffer_size =
+ ALIGN(ENC_V100_MPEG4_ME_SIZE(mb_width,
+ mb_height), 16);
} else
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(
@@ -235,7 +266,10 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_VP8_ENC:
if (IS_MFCV10(dev)) {
mfc_debug(2, "Use min scratch buffer size\n");
- } else if (IS_MFCV8_PLUS(dev))
+ ctx->me_buffer_size =
+ ALIGN(ENC_V100_VP8_ME_SIZE(mb_width, mb_height),
+ 16);
+ } else if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8(
mb_width,
@@ -393,13 +427,13 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
- if (IS_MFCV10(dev))
+ if (IS_MFCV10(dev)) {
ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width,
ctx->img_height);
- else
+ } else {
ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
ctx->img_height);
- ctx->mv_size = ALIGN(ctx->mv_size, 16);
+ }
} else {
ctx->mv_size = 0;
}
@@ -596,15 +630,34 @@ static int s5p_mfc_set_enc_ref_buffer_v6(struct s5p_mfc_ctx *ctx)
mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1);
- for (i = 0; i < ctx->pb_count; i++) {
- writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
- buf_addr1 += ctx->luma_dpb_size;
- writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
- buf_addr1 += ctx->chroma_dpb_size;
- writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
- buf_addr1 += ctx->me_buffer_size;
- buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size +
- ctx->me_buffer_size);
+ if (IS_MFCV10(dev)) {
+ /* start address of per buffer is aligned */
+ for (i = 0; i < ctx->pb_count; i++) {
+ writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
+ buf_addr1 += ctx->luma_dpb_size;
+ buf_size1 -= ctx->luma_dpb_size;
+ }
+ for (i = 0; i < ctx->pb_count; i++) {
+ writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
+ buf_addr1 += ctx->chroma_dpb_size;
+ buf_size1 -= ctx->chroma_dpb_size;
+ }
+ for (i = 0; i < ctx->pb_count; i++) {
+ writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
+ buf_addr1 += ctx->me_buffer_size;
+ buf_size1 -= ctx->me_buffer_size;
+ }
+ } else {
+ for (i = 0; i < ctx->pb_count; i++) {
+ writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
+ buf_addr1 += ctx->luma_dpb_size;
+ writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
+ buf_addr1 += ctx->chroma_dpb_size;
+ writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
+ buf_addr1 += ctx->me_buffer_size;
+ buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size
+ + ctx->me_buffer_size);
+ }
}
writel(buf_addr1, mfc_regs->e_scratch_buffer_addr);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
index 021b8db..975bbc5 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
@@ -26,6 +26,8 @@
(((MB_HEIGHT(y)+1)/2)*2) * 64 + 128)
#define S5P_MFC_DEC_MV_SIZE_V10(x, y) (MB_WIDTH(x) * \
(((MB_HEIGHT(y)+1)/2)*2) * 64 + 512)
+#define enc_lcu_width(x_size) DIV_ROUND_UP(x_size, 32)
+#define enc_lcu_height(y_size) DIV_ROUND_UP(y_size, 32)
/* Definition */
#define ENC_MULTI_SLICE_MB_MAX ((1 << 30) - 1)
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 04/12] [media] s5p-mfc: Support MFCv10.10 buffer requirements
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel
Aligning the luma_dpb_size, chroma_dpb_size, mv_size and me_buffer_size
for MFCv10.10.
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 19 +++++
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 95 +++++++++++++++++++------
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 2 +
3 files changed, 95 insertions(+), 21 deletions(-)
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 1ca09d6..3f0dab3 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -32,5 +32,24 @@
#define MFC_VERSION_V10 0xA0
#define MFC_NUM_PORTS_V10 1
+/* MFCv10 codec defines*/
+#define S5P_FIMV_CODEC_HEVC_ENC 26
+
+/* Encoder buffer size for MFC v10.0 */
+#define ENC_V100_BASE_SIZE(x, y) \
+ (((x + 3) * (y + 3) * 8) \
+ + ((y * 64) + 1280) * DIV_ROUND_UP(x, 8))
+
+#define ENC_V100_H264_ME_SIZE(x, y) \
+ (ENC_V100_BASE_SIZE(x, y) \
+ + (DIV_ROUND_UP(x * y, 64) * 32))
+
+#define ENC_V100_MPEG4_ME_SIZE(x, y) \
+ (ENC_V100_BASE_SIZE(x, y) \
+ + (DIV_ROUND_UP(x * y, 128) * 16))
+
+#define ENC_V100_VP8_ME_SIZE(x, y) \
+ ENC_V100_BASE_SIZE(x, y)
+
#endif /*_REGS_MFC_V10_H*/
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index f1a8c53..83ea733 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -64,6 +64,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
{
struct s5p_mfc_dev *dev = ctx->dev;
unsigned int mb_width, mb_height;
+ unsigned int lcu_width = 0, lcu_height = 0;
int ret;
mb_width = MB_WIDTH(ctx->img_width);
@@ -74,7 +75,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->luma_size, ctx->chroma_size, ctx->mv_size);
mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
} else if (ctx->type == MFCINST_ENCODER) {
- if (IS_MFCV8_PLUS(dev))
+ if (IS_MFCV10(dev)) {
+ ctx->tmv_buffer_size = 0;
+ } else if (IS_MFCV8_PLUS(dev))
ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
S5P_FIMV_TMV_BUFFER_ALIGN_V6);
@@ -82,13 +85,36 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V6(mb_width, mb_height),
S5P_FIMV_TMV_BUFFER_ALIGN_V6);
-
- ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
- S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
- S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
- ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
- S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
- S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
+ if (IS_MFCV10(dev)) {
+ lcu_width = enc_lcu_width(ctx->img_width);
+ lcu_height = enc_lcu_height(ctx->img_height);
+ if (ctx->codec_mode != S5P_FIMV_CODEC_HEVC_ENC) {
+ ctx->luma_dpb_size =
+ ALIGN((mb_width * 16), 64)
+ * ALIGN((mb_height * 16), 32)
+ + 64;
+ ctx->chroma_dpb_size =
+ ALIGN((mb_width * 16), 64)
+ * (mb_height * 8)
+ + 64;
+ } else {
+ ctx->luma_dpb_size =
+ ALIGN((lcu_width * 32), 64)
+ * ALIGN((lcu_height * 32), 32)
+ + 64;
+ ctx->chroma_dpb_size =
+ ALIGN((lcu_width * 32), 64)
+ * (lcu_height * 16)
+ + 64;
+ }
+ } else {
+ ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
+ S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
+ S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
+ ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
+ S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
+ S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
+ }
if (IS_MFCV8_PLUS(dev))
ctx->me_buffer_size = ALIGN(S5P_FIMV_ME_BUFFER_SIZE_V8(
ctx->img_width, ctx->img_height,
@@ -197,6 +223,8 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_H264_ENC:
if (IS_MFCV10(dev)) {
mfc_debug(2, "Use min scratch buffer size\n");
+ ctx->me_buffer_size =
+ ALIGN(ENC_V100_H264_ME_SIZE(mb_width, mb_height), 16);
} else if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8(
@@ -219,6 +247,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_H263_ENC:
if (IS_MFCV10(dev)) {
mfc_debug(2, "Use min scratch buffer size\n");
+ ctx->me_buffer_size =
+ ALIGN(ENC_V100_MPEG4_ME_SIZE(mb_width,
+ mb_height), 16);
} else
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(
@@ -235,7 +266,10 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_VP8_ENC:
if (IS_MFCV10(dev)) {
mfc_debug(2, "Use min scratch buffer size\n");
- } else if (IS_MFCV8_PLUS(dev))
+ ctx->me_buffer_size =
+ ALIGN(ENC_V100_VP8_ME_SIZE(mb_width, mb_height),
+ 16);
+ } else if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8(
mb_width,
@@ -393,13 +427,13 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
- if (IS_MFCV10(dev))
+ if (IS_MFCV10(dev)) {
ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width,
ctx->img_height);
- else
+ } else {
ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
ctx->img_height);
- ctx->mv_size = ALIGN(ctx->mv_size, 16);
+ }
} else {
ctx->mv_size = 0;
}
@@ -596,15 +630,34 @@ static int s5p_mfc_set_enc_ref_buffer_v6(struct s5p_mfc_ctx *ctx)
mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1);
- for (i = 0; i < ctx->pb_count; i++) {
- writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
- buf_addr1 += ctx->luma_dpb_size;
- writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
- buf_addr1 += ctx->chroma_dpb_size;
- writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
- buf_addr1 += ctx->me_buffer_size;
- buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size +
- ctx->me_buffer_size);
+ if (IS_MFCV10(dev)) {
+ /* start address of per buffer is aligned */
+ for (i = 0; i < ctx->pb_count; i++) {
+ writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
+ buf_addr1 += ctx->luma_dpb_size;
+ buf_size1 -= ctx->luma_dpb_size;
+ }
+ for (i = 0; i < ctx->pb_count; i++) {
+ writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
+ buf_addr1 += ctx->chroma_dpb_size;
+ buf_size1 -= ctx->chroma_dpb_size;
+ }
+ for (i = 0; i < ctx->pb_count; i++) {
+ writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
+ buf_addr1 += ctx->me_buffer_size;
+ buf_size1 -= ctx->me_buffer_size;
+ }
+ } else {
+ for (i = 0; i < ctx->pb_count; i++) {
+ writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
+ buf_addr1 += ctx->luma_dpb_size;
+ writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
+ buf_addr1 += ctx->chroma_dpb_size;
+ writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
+ buf_addr1 += ctx->me_buffer_size;
+ buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size
+ + ctx->me_buffer_size);
+ }
}
writel(buf_addr1, mfc_regs->e_scratch_buffer_addr);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
index 021b8db..975bbc5 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
@@ -26,6 +26,8 @@
(((MB_HEIGHT(y)+1)/2)*2) * 64 + 128)
#define S5P_MFC_DEC_MV_SIZE_V10(x, y) (MB_WIDTH(x) * \
(((MB_HEIGHT(y)+1)/2)*2) * 64 + 512)
+#define enc_lcu_width(x_size) DIV_ROUND_UP(x_size, 32)
+#define enc_lcu_height(y_size) DIV_ROUND_UP(y_size, 32)
/* Definition */
#define ENC_MULTI_SLICE_MB_MAX ((1 << 30) - 1)
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 05/12] [media] videodev2.h: Add v4l2 definition for HEVC
[not found] ` <CGME20170619052505epcas5p33a78ee709263cc9ae33cd9383794ca06@epcas5p3.samsung.com>
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki, Smitha T Murthy
Add V4L2 definition for HEVC compressed format
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
include/uapi/linux/videodev2.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 2b8feb8..488de3d 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -629,6 +629,7 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
#define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
#define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
+#define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
/* Vendor-specific formats */
#define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 05/12] [media] videodev2.h: Add v4l2 definition for HEVC
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel
Add V4L2 definition for HEVC compressed format
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
include/uapi/linux/videodev2.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 2b8feb8..488de3d 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -629,6 +629,7 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
#define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
#define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
+#define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
/* Vendor-specific formats */
#define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 06/12] [media] v4l2-ioctl: add HEVC format description
[not found] ` <CGME20170619052507epcas1p406fa9f6d84baa9c11050b1998021788a@epcas1p4.samsung.com>
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki, Smitha T Murthy
HEVC is a video coding format
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
---
drivers/media/v4l2-core/v4l2-ioctl.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index e5a2187..4f6f8d9 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1257,6 +1257,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
case V4L2_PIX_FMT_VC1_ANNEX_L: descr = "VC-1 (SMPTE 412M Annex L)"; break;
case V4L2_PIX_FMT_VP8: descr = "VP8"; break;
case V4L2_PIX_FMT_VP9: descr = "VP9"; break;
+ case V4L2_PIX_FMT_HEVC: descr = "HEVC"; break;
case V4L2_PIX_FMT_CPIA1: descr = "GSPCA CPiA YUV"; break;
case V4L2_PIX_FMT_WNVA: descr = "WNVA"; break;
case V4L2_PIX_FMT_SN9C10X: descr = "GSPCA SN9C10X"; break;
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 06/12] [media] v4l2-ioctl: add HEVC format description
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel
HEVC is a video coding format
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
---
drivers/media/v4l2-core/v4l2-ioctl.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index e5a2187..4f6f8d9 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1257,6 +1257,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
case V4L2_PIX_FMT_VC1_ANNEX_L: descr = "VC-1 (SMPTE 412M Annex L)"; break;
case V4L2_PIX_FMT_VP8: descr = "VP8"; break;
case V4L2_PIX_FMT_VP9: descr = "VP9"; break;
+ case V4L2_PIX_FMT_HEVC: descr = "HEVC"; break;
case V4L2_PIX_FMT_CPIA1: descr = "GSPCA CPiA YUV"; break;
case V4L2_PIX_FMT_WNVA: descr = "WNVA"; break;
case V4L2_PIX_FMT_SN9C10X: descr = "GSPCA SN9C10X"; break;
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 07/12] Documentation: v4l: Documentation for HEVC v4l2 definition
[not found] ` <CGME20170619052509epcas1p4841f9c3733280a232d35c8624fe80576@epcas1p4.samsung.com>
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki, Smitha T Murthy
Add V4L2 definition for HEVC compressed format which is also
known as H.265.
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
Documentation/media/uapi/v4l/pixfmt-013.rst | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/media/uapi/v4l/pixfmt-013.rst b/Documentation/media/uapi/v4l/pixfmt-013.rst
index 728d7ed..abec039 100644
--- a/Documentation/media/uapi/v4l/pixfmt-013.rst
+++ b/Documentation/media/uapi/v4l/pixfmt-013.rst
@@ -90,3 +90,8 @@ Compressed Formats
- ``V4L2_PIX_FMT_VP9``
- 'VP90'
- VP9 video elementary stream.
+ * .. _V4L2-PIX-FMT-HEVC:
+
+ - ``V4L2_PIX_FMT_HEVC``
+ - 'HEVC'
+ - HEVC/H.265 video elementary stream.
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 07/12] Documentation: v4l: Documentation for HEVC v4l2 definition
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel
Add V4L2 definition for HEVC compressed format which is also
known as H.265.
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
Documentation/media/uapi/v4l/pixfmt-013.rst | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/media/uapi/v4l/pixfmt-013.rst b/Documentation/media/uapi/v4l/pixfmt-013.rst
index 728d7ed..abec039 100644
--- a/Documentation/media/uapi/v4l/pixfmt-013.rst
+++ b/Documentation/media/uapi/v4l/pixfmt-013.rst
@@ -90,3 +90,8 @@ Compressed Formats
- ``V4L2_PIX_FMT_VP9``
- 'VP90'
- VP9 video elementary stream.
+ * .. _V4L2-PIX-FMT-HEVC:
+
+ - ``V4L2_PIX_FMT_HEVC``
+ - 'HEVC'
+ - HEVC/H.265 video elementary stream.
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 08/12] [media] s5p-mfc: Add support for HEVC decoder
[not found] ` <CGME20170619052511epcas1p4e79efd3c9f0f8062eeac1ab4884b709e@epcas1p4.samsung.com>
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki, Smitha T Murthy
Add support for codec definition and corresponding buffer
requirements for HEVC decoder.
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 1 +
drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c | 3 +++
drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 1 +
drivers/media/platform/s5p-mfc/s5p_mfc_dec.c | 7 +++++++
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 17 +++++++++++++++--
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 3 +++
6 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 3f0dab3..953a073 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -33,6 +33,7 @@
#define MFC_NUM_PORTS_V10 1
/* MFCv10 codec defines*/
+#define S5P_FIMV_CODEC_HEVC_DEC 17
#define S5P_FIMV_CODEC_HEVC_ENC 26
/* Encoder buffer size for MFC v10.0 */
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index b1b1491..76eca67 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -101,6 +101,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_VP8_DEC:
codec_type = S5P_FIMV_CODEC_VP8_DEC_V6;
break;
+ case S5P_MFC_CODEC_HEVC_DEC:
+ codec_type = S5P_FIMV_CODEC_HEVC_DEC;
+ break;
case S5P_MFC_CODEC_H264_ENC:
codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
break;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index e65e1c3..828e07e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -72,6 +72,7 @@
#define S5P_MFC_CODEC_H263_DEC 5
#define S5P_MFC_CODEC_VC1RCV_DEC 6
#define S5P_MFC_CODEC_VP8_DEC 7
+#define S5P_MFC_CODEC_HEVC_DEC 17
#define S5P_MFC_CODEC_H264_ENC 20
#define S5P_MFC_CODEC_H264_MVC_ENC 21
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 81de3029..4749355 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -144,6 +144,13 @@ static struct s5p_mfc_fmt formats[] = {
.num_planes = 1,
.versions = MFC_V6PLUS_BITS,
},
+ {
+ .fourcc = V4L2_PIX_FMT_HEVC,
+ .codec_mode = S5P_FIMV_CODEC_HEVC_DEC,
+ .type = MFC_FMT_DEC,
+ .num_planes = 1,
+ .versions = MFC_V10_BIT,
+ },
};
#define NUM_FORMATS ARRAY_SIZE(formats)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 83ea733..ed725db 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -220,6 +220,12 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
ctx->bank1.size = ctx->scratch_buf_size;
break;
+ case S5P_MFC_CODEC_HEVC_DEC:
+ mfc_debug(2, "Use min scratch buffer size\n");
+ ctx->bank1.size =
+ ctx->scratch_buf_size +
+ (ctx->mv_count * ctx->mv_size);
+ break;
case S5P_MFC_CODEC_H264_ENC:
if (IS_MFCV10(dev)) {
mfc_debug(2, "Use min scratch buffer size\n");
@@ -321,6 +327,7 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
switch (ctx->codec_mode) {
case S5P_MFC_CODEC_H264_DEC:
case S5P_MFC_CODEC_H264_MVC_DEC:
+ case S5P_MFC_CODEC_HEVC_DEC:
ctx->ctx.size = buf_size->h264_dec_ctx;
break;
case S5P_MFC_CODEC_MPEG4_DEC:
@@ -434,6 +441,10 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
ctx->img_height);
}
+ } else if (ctx->codec_mode == S5P_MFC_CODEC_HEVC_DEC) {
+ ctx->mv_size = s5p_mfc_dec_hevc_mv_size(ctx->img_width,
+ ctx->img_height);
+ ctx->mv_size = ALIGN(ctx->mv_size, 32);
} else {
ctx->mv_size = 0;
}
@@ -515,7 +526,8 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
buf_size1 -= ctx->scratch_buf_size;
if (ctx->codec_mode == S5P_FIMV_CODEC_H264_DEC ||
- ctx->codec_mode == S5P_FIMV_CODEC_H264_MVC_DEC){
+ ctx->codec_mode == S5P_FIMV_CODEC_H264_MVC_DEC ||
+ ctx->codec_mode == S5P_FIMV_CODEC_HEVC_DEC) {
writel(ctx->mv_size, mfc_regs->d_mv_buffer_size);
writel(ctx->mv_count, mfc_regs->d_num_mv);
}
@@ -538,7 +550,8 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
mfc_regs->d_second_plane_dpb + i * 4);
}
if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
- ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
+ ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC ||
+ ctx->codec_mode == S5P_MFC_CODEC_HEVC_DEC) {
for (i = 0; i < ctx->mv_count; i++) {
/* To test alignment */
align_gap = buf_addr1;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
index 975bbc5..2290f7e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
@@ -29,6 +29,9 @@
#define enc_lcu_width(x_size) DIV_ROUND_UP(x_size, 32)
#define enc_lcu_height(y_size) DIV_ROUND_UP(y_size, 32)
+#define s5p_mfc_dec_hevc_mv_size(x, y) \
+ (DIV_ROUND_UP(x, 64) * DIV_ROUND_UP(y, 64) * 256 + 512)
+
/* Definition */
#define ENC_MULTI_SLICE_MB_MAX ((1 << 30) - 1)
#define ENC_MULTI_SLICE_BIT_MIN 2800
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 08/12] [media] s5p-mfc: Add support for HEVC decoder
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel
Add support for codec definition and corresponding buffer
requirements for HEVC decoder.
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 1 +
drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c | 3 +++
drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 1 +
drivers/media/platform/s5p-mfc/s5p_mfc_dec.c | 7 +++++++
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 17 +++++++++++++++--
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 3 +++
6 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 3f0dab3..953a073 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -33,6 +33,7 @@
#define MFC_NUM_PORTS_V10 1
/* MFCv10 codec defines*/
+#define S5P_FIMV_CODEC_HEVC_DEC 17
#define S5P_FIMV_CODEC_HEVC_ENC 26
/* Encoder buffer size for MFC v10.0 */
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index b1b1491..76eca67 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -101,6 +101,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_VP8_DEC:
codec_type = S5P_FIMV_CODEC_VP8_DEC_V6;
break;
+ case S5P_MFC_CODEC_HEVC_DEC:
+ codec_type = S5P_FIMV_CODEC_HEVC_DEC;
+ break;
case S5P_MFC_CODEC_H264_ENC:
codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
break;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index e65e1c3..828e07e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -72,6 +72,7 @@
#define S5P_MFC_CODEC_H263_DEC 5
#define S5P_MFC_CODEC_VC1RCV_DEC 6
#define S5P_MFC_CODEC_VP8_DEC 7
+#define S5P_MFC_CODEC_HEVC_DEC 17
#define S5P_MFC_CODEC_H264_ENC 20
#define S5P_MFC_CODEC_H264_MVC_ENC 21
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 81de3029..4749355 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -144,6 +144,13 @@ static struct s5p_mfc_fmt formats[] = {
.num_planes = 1,
.versions = MFC_V6PLUS_BITS,
},
+ {
+ .fourcc = V4L2_PIX_FMT_HEVC,
+ .codec_mode = S5P_FIMV_CODEC_HEVC_DEC,
+ .type = MFC_FMT_DEC,
+ .num_planes = 1,
+ .versions = MFC_V10_BIT,
+ },
};
#define NUM_FORMATS ARRAY_SIZE(formats)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 83ea733..ed725db 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -220,6 +220,12 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
ctx->bank1.size = ctx->scratch_buf_size;
break;
+ case S5P_MFC_CODEC_HEVC_DEC:
+ mfc_debug(2, "Use min scratch buffer size\n");
+ ctx->bank1.size =
+ ctx->scratch_buf_size +
+ (ctx->mv_count * ctx->mv_size);
+ break;
case S5P_MFC_CODEC_H264_ENC:
if (IS_MFCV10(dev)) {
mfc_debug(2, "Use min scratch buffer size\n");
@@ -321,6 +327,7 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
switch (ctx->codec_mode) {
case S5P_MFC_CODEC_H264_DEC:
case S5P_MFC_CODEC_H264_MVC_DEC:
+ case S5P_MFC_CODEC_HEVC_DEC:
ctx->ctx.size = buf_size->h264_dec_ctx;
break;
case S5P_MFC_CODEC_MPEG4_DEC:
@@ -434,6 +441,10 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
ctx->img_height);
}
+ } else if (ctx->codec_mode == S5P_MFC_CODEC_HEVC_DEC) {
+ ctx->mv_size = s5p_mfc_dec_hevc_mv_size(ctx->img_width,
+ ctx->img_height);
+ ctx->mv_size = ALIGN(ctx->mv_size, 32);
} else {
ctx->mv_size = 0;
}
@@ -515,7 +526,8 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
buf_size1 -= ctx->scratch_buf_size;
if (ctx->codec_mode == S5P_FIMV_CODEC_H264_DEC ||
- ctx->codec_mode == S5P_FIMV_CODEC_H264_MVC_DEC){
+ ctx->codec_mode == S5P_FIMV_CODEC_H264_MVC_DEC ||
+ ctx->codec_mode == S5P_FIMV_CODEC_HEVC_DEC) {
writel(ctx->mv_size, mfc_regs->d_mv_buffer_size);
writel(ctx->mv_count, mfc_regs->d_num_mv);
}
@@ -538,7 +550,8 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
mfc_regs->d_second_plane_dpb + i * 4);
}
if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
- ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
+ ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC ||
+ ctx->codec_mode == S5P_MFC_CODEC_HEVC_DEC) {
for (i = 0; i < ctx->mv_count; i++) {
/* To test alignment */
align_gap = buf_addr1;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
index 975bbc5..2290f7e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
@@ -29,6 +29,9 @@
#define enc_lcu_width(x_size) DIV_ROUND_UP(x_size, 32)
#define enc_lcu_height(y_size) DIV_ROUND_UP(y_size, 32)
+#define s5p_mfc_dec_hevc_mv_size(x, y) \
+ (DIV_ROUND_UP(x, 64) * DIV_ROUND_UP(y, 64) * 256 + 512)
+
/* Definition */
#define ENC_MULTI_SLICE_MB_MAX ((1 << 30) - 1)
#define ENC_MULTI_SLICE_BIT_MIN 2800
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 09/12] [media] s5p-mfc: Add VP9 decoder support
[not found] ` <CGME20170619052514epcas1p45d4b590d673a0ff2a3cf0117d55e656a@epcas1p4.samsung.com>
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki, Smitha T Murthy
Add support for codec definition and corresponding buffer
requirements for VP9 decoder.
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 6 ++++++
drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c | 3 +++
drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 1 +
drivers/media/platform/s5p-mfc/s5p_mfc_dec.c | 7 +++++++
drivers/media/platform/s5p-mfc/s5p_mfc_opr.h | 2 ++
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 26 +++++++++++++++++++++++++
6 files changed, 45 insertions(+)
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 953a073..6754477 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -18,6 +18,8 @@
/* MFCv10 register definitions*/
#define S5P_FIMV_MFC_CLOCK_OFF_V10 0x7120
#define S5P_FIMV_MFC_STATE_V10 0x7124
+#define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10 0xF570
+#define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10 0xF574
/* MFCv10 Context buffer sizes */
#define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
@@ -34,8 +36,12 @@
/* MFCv10 codec defines*/
#define S5P_FIMV_CODEC_HEVC_DEC 17
+#define S5P_FIMV_CODEC_VP9_DEC 18
#define S5P_FIMV_CODEC_HEVC_ENC 26
+/* Decoder buffer size for MFC v10 */
+#define DEC_VP9_STATIC_BUFFER_SIZE 20480
+
/* Encoder buffer size for MFC v10.0 */
#define ENC_V100_BASE_SIZE(x, y) \
(((x + 3) * (y + 3) * 8) \
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index 76eca67..102b47e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -104,6 +104,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_HEVC_DEC:
codec_type = S5P_FIMV_CODEC_HEVC_DEC;
break;
+ case S5P_MFC_CODEC_VP9_DEC:
+ codec_type = S5P_FIMV_CODEC_VP9_DEC;
+ break;
case S5P_MFC_CODEC_H264_ENC:
codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
break;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 828e07e..b49f220 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -73,6 +73,7 @@
#define S5P_MFC_CODEC_VC1RCV_DEC 6
#define S5P_MFC_CODEC_VP8_DEC 7
#define S5P_MFC_CODEC_HEVC_DEC 17
+#define S5P_MFC_CODEC_VP9_DEC 18
#define S5P_MFC_CODEC_H264_ENC 20
#define S5P_MFC_CODEC_H264_MVC_ENC 21
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 4749355..5cf4d99 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -151,6 +151,13 @@ static struct s5p_mfc_fmt formats[] = {
.num_planes = 1,
.versions = MFC_V10_BIT,
},
+ {
+ .fourcc = V4L2_PIX_FMT_VP9,
+ .codec_mode = S5P_FIMV_CODEC_VP9_DEC,
+ .type = MFC_FMT_DEC,
+ .num_planes = 1,
+ .versions = MFC_V10_BIT,
+ },
};
#define NUM_FORMATS ARRAY_SIZE(formats)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index e7a2d46..57f4560 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -170,6 +170,8 @@ struct s5p_mfc_regs {
void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */
void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */
void __iomem *d_min_scratch_buffer_size; /* v10 */
+ void __iomem *d_static_buffer_addr; /* v10 */
+ void __iomem *d_static_buffer_size; /* v10 */
/* encoder registers */
void __iomem *e_frame_width;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index ed725db..f3d0a6f 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -226,6 +226,12 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->scratch_buf_size +
(ctx->mv_count * ctx->mv_size);
break;
+ case S5P_MFC_CODEC_VP9_DEC:
+ mfc_debug(2, "Use min scratch buffer size\n");
+ ctx->bank1.size =
+ ctx->scratch_buf_size +
+ DEC_VP9_STATIC_BUFFER_SIZE;
+ break;
case S5P_MFC_CODEC_H264_ENC:
if (IS_MFCV10(dev)) {
mfc_debug(2, "Use min scratch buffer size\n");
@@ -336,6 +342,7 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_VC1_DEC:
case S5P_MFC_CODEC_MPEG2_DEC:
case S5P_MFC_CODEC_VP8_DEC:
+ case S5P_MFC_CODEC_VP9_DEC:
ctx->ctx.size = buf_size->other_dec_ctx;
break;
case S5P_MFC_CODEC_H264_ENC:
@@ -566,6 +573,13 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
buf_size1 -= frame_size_mv;
}
}
+ if (ctx->codec_mode == S5P_FIMV_CODEC_VP9_DEC) {
+ writel(buf_addr1, mfc_regs->d_static_buffer_addr);
+ writel(DEC_VP9_STATIC_BUFFER_SIZE,
+ mfc_regs->d_static_buffer_size);
+ buf_addr1 += DEC_VP9_STATIC_BUFFER_SIZE;
+ buf_size1 -= DEC_VP9_STATIC_BUFFER_SIZE;
+ }
mfc_debug(2, "Buf1: %zx, buf_size1: %d (frames %d)\n",
buf_addr1, buf_size1, ctx->total_dpb_count);
@@ -2272,6 +2286,18 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
R(e_h264_options, S5P_FIMV_E_H264_OPTIONS_V8);
R(e_min_scratch_buffer_size, S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8);
+ if (!IS_MFCV10(dev))
+ goto done;
+
+ /* Initialize registers used in MFC v10 only.
+ * Also, over-write the registers which have
+ * a different offset for MFC v10.
+ */
+
+ /* decoder registers */
+ R(d_static_buffer_addr, S5P_FIMV_D_STATIC_BUFFER_ADDR_V10);
+ R(d_static_buffer_size, S5P_FIMV_D_STATIC_BUFFER_SIZE_V10);
+
done:
return &mfc_regs;
#undef S5P_MFC_REG_ADDR
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 09/12] [media] s5p-mfc: Add VP9 decoder support
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel
Add support for codec definition and corresponding buffer
requirements for VP9 decoder.
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 6 ++++++
drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c | 3 +++
drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 1 +
drivers/media/platform/s5p-mfc/s5p_mfc_dec.c | 7 +++++++
drivers/media/platform/s5p-mfc/s5p_mfc_opr.h | 2 ++
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 26 +++++++++++++++++++++++++
6 files changed, 45 insertions(+)
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 953a073..6754477 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -18,6 +18,8 @@
/* MFCv10 register definitions*/
#define S5P_FIMV_MFC_CLOCK_OFF_V10 0x7120
#define S5P_FIMV_MFC_STATE_V10 0x7124
+#define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10 0xF570
+#define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10 0xF574
/* MFCv10 Context buffer sizes */
#define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
@@ -34,8 +36,12 @@
/* MFCv10 codec defines*/
#define S5P_FIMV_CODEC_HEVC_DEC 17
+#define S5P_FIMV_CODEC_VP9_DEC 18
#define S5P_FIMV_CODEC_HEVC_ENC 26
+/* Decoder buffer size for MFC v10 */
+#define DEC_VP9_STATIC_BUFFER_SIZE 20480
+
/* Encoder buffer size for MFC v10.0 */
#define ENC_V100_BASE_SIZE(x, y) \
(((x + 3) * (y + 3) * 8) \
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index 76eca67..102b47e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -104,6 +104,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_HEVC_DEC:
codec_type = S5P_FIMV_CODEC_HEVC_DEC;
break;
+ case S5P_MFC_CODEC_VP9_DEC:
+ codec_type = S5P_FIMV_CODEC_VP9_DEC;
+ break;
case S5P_MFC_CODEC_H264_ENC:
codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
break;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 828e07e..b49f220 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -73,6 +73,7 @@
#define S5P_MFC_CODEC_VC1RCV_DEC 6
#define S5P_MFC_CODEC_VP8_DEC 7
#define S5P_MFC_CODEC_HEVC_DEC 17
+#define S5P_MFC_CODEC_VP9_DEC 18
#define S5P_MFC_CODEC_H264_ENC 20
#define S5P_MFC_CODEC_H264_MVC_ENC 21
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 4749355..5cf4d99 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -151,6 +151,13 @@ static struct s5p_mfc_fmt formats[] = {
.num_planes = 1,
.versions = MFC_V10_BIT,
},
+ {
+ .fourcc = V4L2_PIX_FMT_VP9,
+ .codec_mode = S5P_FIMV_CODEC_VP9_DEC,
+ .type = MFC_FMT_DEC,
+ .num_planes = 1,
+ .versions = MFC_V10_BIT,
+ },
};
#define NUM_FORMATS ARRAY_SIZE(formats)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index e7a2d46..57f4560 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -170,6 +170,8 @@ struct s5p_mfc_regs {
void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */
void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */
void __iomem *d_min_scratch_buffer_size; /* v10 */
+ void __iomem *d_static_buffer_addr; /* v10 */
+ void __iomem *d_static_buffer_size; /* v10 */
/* encoder registers */
void __iomem *e_frame_width;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index ed725db..f3d0a6f 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -226,6 +226,12 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->scratch_buf_size +
(ctx->mv_count * ctx->mv_size);
break;
+ case S5P_MFC_CODEC_VP9_DEC:
+ mfc_debug(2, "Use min scratch buffer size\n");
+ ctx->bank1.size =
+ ctx->scratch_buf_size +
+ DEC_VP9_STATIC_BUFFER_SIZE;
+ break;
case S5P_MFC_CODEC_H264_ENC:
if (IS_MFCV10(dev)) {
mfc_debug(2, "Use min scratch buffer size\n");
@@ -336,6 +342,7 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_VC1_DEC:
case S5P_MFC_CODEC_MPEG2_DEC:
case S5P_MFC_CODEC_VP8_DEC:
+ case S5P_MFC_CODEC_VP9_DEC:
ctx->ctx.size = buf_size->other_dec_ctx;
break;
case S5P_MFC_CODEC_H264_ENC:
@@ -566,6 +573,13 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
buf_size1 -= frame_size_mv;
}
}
+ if (ctx->codec_mode == S5P_FIMV_CODEC_VP9_DEC) {
+ writel(buf_addr1, mfc_regs->d_static_buffer_addr);
+ writel(DEC_VP9_STATIC_BUFFER_SIZE,
+ mfc_regs->d_static_buffer_size);
+ buf_addr1 += DEC_VP9_STATIC_BUFFER_SIZE;
+ buf_size1 -= DEC_VP9_STATIC_BUFFER_SIZE;
+ }
mfc_debug(2, "Buf1: %zx, buf_size1: %d (frames %d)\n",
buf_addr1, buf_size1, ctx->total_dpb_count);
@@ -2272,6 +2286,18 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
R(e_h264_options, S5P_FIMV_E_H264_OPTIONS_V8);
R(e_min_scratch_buffer_size, S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8);
+ if (!IS_MFCV10(dev))
+ goto done;
+
+ /* Initialize registers used in MFC v10 only.
+ * Also, over-write the registers which have
+ * a different offset for MFC v10.
+ */
+
+ /* decoder registers */
+ R(d_static_buffer_addr, S5P_FIMV_D_STATIC_BUFFER_ADDR_V10);
+ R(d_static_buffer_size, S5P_FIMV_D_STATIC_BUFFER_SIZE_V10);
+
done:
return &mfc_regs;
#undef S5P_MFC_REG_ADDR
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 10/12] [media] v4l2: Add v4l2 control IDs for HEVC encoder
[not found] ` <CGME20170619052516epcas5p349b080cc6c242444d2db1f3c0e1c6f68@epcas5p3.samsung.com>
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki, Smitha T Murthy
Add v4l2 controls for HEVC encoder
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
drivers/media/v4l2-core/v4l2-ctrls.c | 103 +++++++++++++++++++++++++++++++++++
include/uapi/linux/v4l2-controls.h | 84 ++++++++++++++++++++++++++++
2 files changed, 187 insertions(+)
diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
index ec42872..6a7e732 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
@@ -479,6 +479,51 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
NULL,
};
+ static const char * const hevc_profile[] = {
+ "Main",
+ "Main Still Picture",
+ NULL,
+ };
+ static const char * const hevc_level[] = {
+ "1",
+ "2",
+ "2.1",
+ "3",
+ "3.1",
+ "4",
+ "4.1",
+ "5",
+ "5.1",
+ "5.2",
+ "6",
+ "6.1",
+ "6.2",
+ NULL,
+ };
+ static const char * const hevc_hierarchial_coding_type[] = {
+ "B",
+ "P",
+ NULL,
+ };
+ static const char * const hevc_refresh_type[] = {
+ "None",
+ "CRA",
+ "IDR",
+ NULL,
+ };
+ static const char * const hevc_size_of_length_field[] = {
+ "0",
+ "1",
+ "2",
+ "4",
+ NULL,
+ };
+ static const char * const hevc_tier_flag[] = {
+ "Main",
+ "High",
+ NULL,
+ };
+
switch (id) {
case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
@@ -574,6 +619,18 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
return dv_it_content_type;
case V4L2_CID_DETECT_MD_MODE:
return detect_md_mode;
+ case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
+ return hevc_profile;
+ case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
+ return hevc_level;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
+ return hevc_hierarchial_coding_type;
+ case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
+ return hevc_refresh_type;
+ case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
+ return hevc_size_of_length_field;
+ case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
+ return hevc_tier_flag;
default:
return NULL;
@@ -775,6 +832,46 @@ const char *v4l2_ctrl_get_name(u32 id)
case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP: return "VPX P-Frame QP Value";
case V4L2_CID_MPEG_VIDEO_VPX_PROFILE: return "VPX Profile";
+ /* HEVC controls */
+ case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: return "HEVC I-Frame QP Value";
+ case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP: return "HEVC P-Frame QP Value";
+ case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP: return "HEVC B-Frame QP Value";
+ case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP: return "HEVC Minimum QP Value";
+ case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP: return "HEVC Maximum QP Value";
+ case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: return "HEVC Profile";
+ case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL: return "HEVC Level";
+ case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG: return "HEVC Tier_flag";
+ case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION: return "HEVC Frame Rate Resolution";
+ case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH: return "HEVC Maximum Coding Unit Depth";
+ case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE: return "HEVC Refresh Type";
+ case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED: return "HEVC Constant Intra Prediction";
+ case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU: return "HEVC Lossless Encoding";
+ case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT: return "HEVC Wavefront";
+ case V4L2_CID_MPEG_VIDEO_HEVC_LF: return "HEVC Loop Filter";
+ case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY: return "HEVC LF Across Slice Boundary";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP: return "HEVC QP Values";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE: return "HEVC Hierarchical Coding Type";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER: return "HEVC Hierarchical Coding Layer";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP: return "HEVC Hierarchical Layer QP";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR: return "HEVC Hierarchical Lay 0 Bit Rate";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR: return "HEVC Hierarchical Lay 1 Bit Rate";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR: return "HEVC Hierarchical Lay 2 Bit Rate";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR: return "HEVC Hierarchical Lay 3 Bit Rate";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR: return "HEVC Hierarchical Lay 4 Bit Rate";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR: return "HEVC Hierarchical Lay 5 Bit Rate";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR: return "HEVC Hierarchical Lay 6 Bit Rate";
+ case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB: return "HEVC General PB";
+ case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID: return "HEVC Temporal ID";
+ case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING: return "HEVC Strong Intra Smoothing";
+ case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT: return "HEVC Intra PU Split";
+ case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION: return "HEVC TMV Prediction";
+ case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1: return "HEVC Max Number of Candidate MVs";
+ case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE: return "HEVC ENC Without Startcode";
+ case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD: return "HEVC Num of I Frame b/w 2 IDR";
+ case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2: return "HEVC Loop Filter Beta Offset";
+ case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2: return "HEVC Loop Filter TC Offset";
+ case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: return "HEVC Size of Length Field";
+
/* CAMERA controls */
/* Keep the order of the 'case's the same as in v4l2-controls.h! */
case V4L2_CID_CAMERA_CLASS: return "Camera Controls";
@@ -1067,6 +1164,12 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
case V4L2_CID_TUNE_DEEMPHASIS:
case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL:
case V4L2_CID_DETECT_MD_MODE:
+ case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
+ case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
+ case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
+ case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
+ case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
*type = V4L2_CTRL_TYPE_MENU;
break;
case V4L2_CID_LINK_FREQ:
diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
index 0d2e1e0..9c32a55 100644
--- a/include/uapi/linux/v4l2-controls.h
+++ b/include/uapi/linux/v4l2-controls.h
@@ -579,6 +579,85 @@ enum v4l2_vp8_golden_frame_sel {
#define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP (V4L2_CID_MPEG_BASE+510)
#define V4L2_CID_MPEG_VIDEO_VPX_PROFILE (V4L2_CID_MPEG_BASE+511)
+/* CIDs for HEVC encoding. Number gaps are for compatibility */
+
+#define V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP (V4L2_CID_MPEG_BASE + 512)
+#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP (V4L2_CID_MPEG_BASE + 513)
+#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP (V4L2_CID_MPEG_BASE + 514)
+#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP (V4L2_CID_MPEG_BASE + 515)
+#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP (V4L2_CID_MPEG_BASE + 516)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP (V4L2_CID_MPEG_BASE + 517)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE (V4L2_CID_MPEG_BASE + 518)
+enum v4l2_mpeg_video_hevc_hier_coding_type {
+ V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B = 0,
+ V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P = 1,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (V4L2_CID_MPEG_BASE + 519)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP (V4L2_CID_MPEG_BASE + 520)
+#define V4L2_CID_MPEG_VIDEO_HEVC_PROFILE (V4L2_CID_MPEG_BASE + 521)
+enum v4l2_mpeg_video_hevc_profile {
+ V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN = 0,
+ V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE = 1,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_LEVEL (V4L2_CID_MPEG_BASE + 522)
+enum v4l2_mpeg_video_hevc_level {
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_1 = 0,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_2 = 1,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1 = 2,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_3 = 3,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1 = 4,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_4 = 5,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1 = 6,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_5 = 7,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1 = 8,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2 = 9,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_6 = 10,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1 = 11,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 = 12,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION (V4L2_CID_MPEG_BASE + 523)
+#define V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG (V4L2_CID_MPEG_BASE + 524)
+enum v4l2_mpeg_video_hevc_tier_flag {
+ V4L2_MPEG_VIDEO_HEVC_TIER_MAIN = 0,
+ V4L2_MPEG_VIDEO_HEVC_TIER_HIGH = 1,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH (V4L2_CID_MPEG_BASE + 525)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LF (V4L2_CID_MPEG_BASE + 526)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY (V4L2_CID_MPEG_BASE + 527)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (V4L2_CID_MPEG_BASE + 528)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (V4L2_CID_MPEG_BASE + 529)
+#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE (V4L2_CID_MPEG_BASE + 530)
+enum v4l2_cid_mpeg_video_hevc_refresh_type {
+ V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE = 0,
+ V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA = 1,
+ V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR = 2,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD (V4L2_CID_MPEG_BASE + 531)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU (V4L2_CID_MPEG_BASE + 532)
+#define V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED (V4L2_CID_MPEG_BASE + 533)
+#define V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT (V4L2_CID_MPEG_BASE + 534)
+#define V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB (V4L2_CID_MPEG_BASE + 535)
+#define V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID (V4L2_CID_MPEG_BASE + 536)
+#define V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING (V4L2_CID_MPEG_BASE + 537)
+#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1 (V4L2_CID_MPEG_BASE + 538)
+#define V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT (V4L2_CID_MPEG_BASE + 539)
+#define V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION (V4L2_CID_MPEG_BASE + 540)
+#define V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE (V4L2_CID_MPEG_BASE + 541)
+#define V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD (V4L2_CID_MPEG_BASE + 542)
+enum v4l2_cid_mpeg_video_hevc_size_of_length_field {
+ V4L2_MPEG_VIDEO_HEVC_SIZE_0 = 0,
+ V4L2_MPEG_VIDEO_HEVC_SIZE_1 = 1,
+ V4L2_MPEG_VIDEO_HEVC_SIZE_2 = 2,
+ V4L2_MPEG_VIDEO_HEVC_SIZE_4 = 3,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR (V4L2_CID_MPEG_BASE + 543)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR (V4L2_CID_MPEG_BASE + 544)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR (V4L2_CID_MPEG_BASE + 545)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR (V4L2_CID_MPEG_BASE + 546)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR (V4L2_CID_MPEG_BASE + 547)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR (V4L2_CID_MPEG_BASE + 548)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR (V4L2_CID_MPEG_BASE + 549)
+
/* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
#define V4L2_CID_MPEG_CX2341X_BASE (V4L2_CTRL_CLASS_MPEG | 0x1000)
#define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE (V4L2_CID_MPEG_CX2341X_BASE+0)
@@ -647,6 +726,11 @@ enum v4l2_mpeg_mfc51_video_force_frame_type {
#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC (V4L2_CID_MPEG_MFC51_BASE+53)
#define V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P (V4L2_CID_MPEG_MFC51_BASE+54)
+/* MPEG-class control IDs specific to the Samsung MFC 10.10 driver as defined by V4L2 */
+#define V4L2_CID_MPEG_MFC10_BASE (V4L2_CTRL_CLASS_MPEG | 0x1200)
+
+#define V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (V4L2_CID_MPEG_MFC10_BASE+0)
+#define V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (V4L2_CID_MPEG_MFC10_BASE+1)
/* Camera class control IDs */
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 10/12] [media] v4l2: Add v4l2 control IDs for HEVC encoder
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel
Add v4l2 controls for HEVC encoder
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
---
drivers/media/v4l2-core/v4l2-ctrls.c | 103 +++++++++++++++++++++++++++++++++++
include/uapi/linux/v4l2-controls.h | 84 ++++++++++++++++++++++++++++
2 files changed, 187 insertions(+)
diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
index ec42872..6a7e732 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
@@ -479,6 +479,51 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
NULL,
};
+ static const char * const hevc_profile[] = {
+ "Main",
+ "Main Still Picture",
+ NULL,
+ };
+ static const char * const hevc_level[] = {
+ "1",
+ "2",
+ "2.1",
+ "3",
+ "3.1",
+ "4",
+ "4.1",
+ "5",
+ "5.1",
+ "5.2",
+ "6",
+ "6.1",
+ "6.2",
+ NULL,
+ };
+ static const char * const hevc_hierarchial_coding_type[] = {
+ "B",
+ "P",
+ NULL,
+ };
+ static const char * const hevc_refresh_type[] = {
+ "None",
+ "CRA",
+ "IDR",
+ NULL,
+ };
+ static const char * const hevc_size_of_length_field[] = {
+ "0",
+ "1",
+ "2",
+ "4",
+ NULL,
+ };
+ static const char * const hevc_tier_flag[] = {
+ "Main",
+ "High",
+ NULL,
+ };
+
switch (id) {
case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
@@ -574,6 +619,18 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
return dv_it_content_type;
case V4L2_CID_DETECT_MD_MODE:
return detect_md_mode;
+ case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
+ return hevc_profile;
+ case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
+ return hevc_level;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
+ return hevc_hierarchial_coding_type;
+ case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
+ return hevc_refresh_type;
+ case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
+ return hevc_size_of_length_field;
+ case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
+ return hevc_tier_flag;
default:
return NULL;
@@ -775,6 +832,46 @@ const char *v4l2_ctrl_get_name(u32 id)
case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP: return "VPX P-Frame QP Value";
case V4L2_CID_MPEG_VIDEO_VPX_PROFILE: return "VPX Profile";
+ /* HEVC controls */
+ case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: return "HEVC I-Frame QP Value";
+ case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP: return "HEVC P-Frame QP Value";
+ case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP: return "HEVC B-Frame QP Value";
+ case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP: return "HEVC Minimum QP Value";
+ case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP: return "HEVC Maximum QP Value";
+ case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: return "HEVC Profile";
+ case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL: return "HEVC Level";
+ case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG: return "HEVC Tier_flag";
+ case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION: return "HEVC Frame Rate Resolution";
+ case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH: return "HEVC Maximum Coding Unit Depth";
+ case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE: return "HEVC Refresh Type";
+ case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED: return "HEVC Constant Intra Prediction";
+ case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU: return "HEVC Lossless Encoding";
+ case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT: return "HEVC Wavefront";
+ case V4L2_CID_MPEG_VIDEO_HEVC_LF: return "HEVC Loop Filter";
+ case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY: return "HEVC LF Across Slice Boundary";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP: return "HEVC QP Values";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE: return "HEVC Hierarchical Coding Type";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER: return "HEVC Hierarchical Coding Layer";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP: return "HEVC Hierarchical Layer QP";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR: return "HEVC Hierarchical Lay 0 Bit Rate";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR: return "HEVC Hierarchical Lay 1 Bit Rate";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR: return "HEVC Hierarchical Lay 2 Bit Rate";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR: return "HEVC Hierarchical Lay 3 Bit Rate";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR: return "HEVC Hierarchical Lay 4 Bit Rate";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR: return "HEVC Hierarchical Lay 5 Bit Rate";
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR: return "HEVC Hierarchical Lay 6 Bit Rate";
+ case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB: return "HEVC General PB";
+ case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID: return "HEVC Temporal ID";
+ case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING: return "HEVC Strong Intra Smoothing";
+ case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT: return "HEVC Intra PU Split";
+ case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION: return "HEVC TMV Prediction";
+ case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1: return "HEVC Max Number of Candidate MVs";
+ case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE: return "HEVC ENC Without Startcode";
+ case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD: return "HEVC Num of I Frame b/w 2 IDR";
+ case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2: return "HEVC Loop Filter Beta Offset";
+ case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2: return "HEVC Loop Filter TC Offset";
+ case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: return "HEVC Size of Length Field";
+
/* CAMERA controls */
/* Keep the order of the 'case's the same as in v4l2-controls.h! */
case V4L2_CID_CAMERA_CLASS: return "Camera Controls";
@@ -1067,6 +1164,12 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
case V4L2_CID_TUNE_DEEMPHASIS:
case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL:
case V4L2_CID_DETECT_MD_MODE:
+ case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
+ case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
+ case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
+ case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
+ case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
*type = V4L2_CTRL_TYPE_MENU;
break;
case V4L2_CID_LINK_FREQ:
diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
index 0d2e1e0..9c32a55 100644
--- a/include/uapi/linux/v4l2-controls.h
+++ b/include/uapi/linux/v4l2-controls.h
@@ -579,6 +579,85 @@ enum v4l2_vp8_golden_frame_sel {
#define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP (V4L2_CID_MPEG_BASE+510)
#define V4L2_CID_MPEG_VIDEO_VPX_PROFILE (V4L2_CID_MPEG_BASE+511)
+/* CIDs for HEVC encoding. Number gaps are for compatibility */
+
+#define V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP (V4L2_CID_MPEG_BASE + 512)
+#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP (V4L2_CID_MPEG_BASE + 513)
+#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP (V4L2_CID_MPEG_BASE + 514)
+#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP (V4L2_CID_MPEG_BASE + 515)
+#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP (V4L2_CID_MPEG_BASE + 516)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP (V4L2_CID_MPEG_BASE + 517)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE (V4L2_CID_MPEG_BASE + 518)
+enum v4l2_mpeg_video_hevc_hier_coding_type {
+ V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B = 0,
+ V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P = 1,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (V4L2_CID_MPEG_BASE + 519)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP (V4L2_CID_MPEG_BASE + 520)
+#define V4L2_CID_MPEG_VIDEO_HEVC_PROFILE (V4L2_CID_MPEG_BASE + 521)
+enum v4l2_mpeg_video_hevc_profile {
+ V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN = 0,
+ V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE = 1,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_LEVEL (V4L2_CID_MPEG_BASE + 522)
+enum v4l2_mpeg_video_hevc_level {
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_1 = 0,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_2 = 1,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1 = 2,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_3 = 3,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1 = 4,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_4 = 5,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1 = 6,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_5 = 7,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1 = 8,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2 = 9,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_6 = 10,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1 = 11,
+ V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 = 12,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION (V4L2_CID_MPEG_BASE + 523)
+#define V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG (V4L2_CID_MPEG_BASE + 524)
+enum v4l2_mpeg_video_hevc_tier_flag {
+ V4L2_MPEG_VIDEO_HEVC_TIER_MAIN = 0,
+ V4L2_MPEG_VIDEO_HEVC_TIER_HIGH = 1,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH (V4L2_CID_MPEG_BASE + 525)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LF (V4L2_CID_MPEG_BASE + 526)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY (V4L2_CID_MPEG_BASE + 527)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (V4L2_CID_MPEG_BASE + 528)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (V4L2_CID_MPEG_BASE + 529)
+#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE (V4L2_CID_MPEG_BASE + 530)
+enum v4l2_cid_mpeg_video_hevc_refresh_type {
+ V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE = 0,
+ V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA = 1,
+ V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR = 2,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD (V4L2_CID_MPEG_BASE + 531)
+#define V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU (V4L2_CID_MPEG_BASE + 532)
+#define V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED (V4L2_CID_MPEG_BASE + 533)
+#define V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT (V4L2_CID_MPEG_BASE + 534)
+#define V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB (V4L2_CID_MPEG_BASE + 535)
+#define V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID (V4L2_CID_MPEG_BASE + 536)
+#define V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING (V4L2_CID_MPEG_BASE + 537)
+#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1 (V4L2_CID_MPEG_BASE + 538)
+#define V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT (V4L2_CID_MPEG_BASE + 539)
+#define V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION (V4L2_CID_MPEG_BASE + 540)
+#define V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE (V4L2_CID_MPEG_BASE + 541)
+#define V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD (V4L2_CID_MPEG_BASE + 542)
+enum v4l2_cid_mpeg_video_hevc_size_of_length_field {
+ V4L2_MPEG_VIDEO_HEVC_SIZE_0 = 0,
+ V4L2_MPEG_VIDEO_HEVC_SIZE_1 = 1,
+ V4L2_MPEG_VIDEO_HEVC_SIZE_2 = 2,
+ V4L2_MPEG_VIDEO_HEVC_SIZE_4 = 3,
+};
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR (V4L2_CID_MPEG_BASE + 543)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR (V4L2_CID_MPEG_BASE + 544)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR (V4L2_CID_MPEG_BASE + 545)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR (V4L2_CID_MPEG_BASE + 546)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR (V4L2_CID_MPEG_BASE + 547)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR (V4L2_CID_MPEG_BASE + 548)
+#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR (V4L2_CID_MPEG_BASE + 549)
+
/* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
#define V4L2_CID_MPEG_CX2341X_BASE (V4L2_CTRL_CLASS_MPEG | 0x1000)
#define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE (V4L2_CID_MPEG_CX2341X_BASE+0)
@@ -647,6 +726,11 @@ enum v4l2_mpeg_mfc51_video_force_frame_type {
#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC (V4L2_CID_MPEG_MFC51_BASE+53)
#define V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P (V4L2_CID_MPEG_MFC51_BASE+54)
+/* MPEG-class control IDs specific to the Samsung MFC 10.10 driver as defined by V4L2 */
+#define V4L2_CID_MPEG_MFC10_BASE (V4L2_CTRL_CLASS_MPEG | 0x1200)
+
+#define V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (V4L2_CID_MPEG_MFC10_BASE+0)
+#define V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (V4L2_CID_MPEG_MFC10_BASE+1)
/* Camera class control IDs */
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 11/12] [media] s5p-mfc: Add support for HEVC encoder
[not found] ` <CGME20170619052519epcas5p3bacba6c01bf2f135e5cd628226f8d24b@epcas5p3.samsung.com>
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki, Smitha T Murthy
Add HEVC encoder support and necessary registers, V4L2 CIDs,
and hevc encoder parameters
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
---
drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 28 +-
drivers/media/platform/s5p-mfc/s5p_mfc.c | 1 +
drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c | 3 +
drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 53 ++-
drivers/media/platform/s5p-mfc/s5p_mfc_enc.c | 521 ++++++++++++++++++++++++
drivers/media/platform/s5p-mfc/s5p_mfc_opr.h | 8 +
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 168 ++++++++
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 8 +
8 files changed, 788 insertions(+), 2 deletions(-)
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 6754477..7065b9d 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -20,13 +20,35 @@
#define S5P_FIMV_MFC_STATE_V10 0x7124
#define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10 0xF570
#define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10 0xF574
+#define S5P_FIMV_E_NUM_T_LAYER_V10 0xFBAC
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10 0xFBB0
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10 0xFBB4
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10 0xFBB8
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10 0xFBBC
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10 0xFBC0
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10 0xFBC4
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10 0xFBC8
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10 0xFD18
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V10 0xFD1C
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V10 0xFD20
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V10 0xFD24
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V10 0xFD28
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V10 0xFD2C
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V10 0xFD30
+#define S5P_FIMV_E_HEVC_OPTIONS_V10 0xFDD4
+#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10 0xFDD8
+#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10 0xFDDC
+#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10 0xFDE0
+#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10 0xFDE4
+#define S5P_FIMV_E_HEVC_NAL_CONTROL_V10 0xFDE8
/* MFCv10 Context buffer sizes */
#define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
#define MFC_H264_DEC_CTX_BUF_SIZE_V10 (2 * SZ_1M)
#define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)
#define MFC_H264_ENC_CTX_BUF_SIZE_V10 (100 * SZ_1K)
-#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
+#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
+#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
/* MFCv10 variant defines */
#define MAX_FW_SIZE_V10 (SZ_1M)
@@ -58,5 +80,9 @@
#define ENC_V100_VP8_ME_SIZE(x, y) \
ENC_V100_BASE_SIZE(x, y)
+#define ENC_V100_HEVC_ME_SIZE(x, y) \
+ (((x + 3) * (y + 3) * 32) \
+ + ((y * 128) + 1280) * DIV_ROUND_UP(x, 4))
+
#endif /*_REGS_MFC_V10_H*/
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index efc36b0..742c2b7 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -1621,6 +1621,7 @@ static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
.h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V10,
.other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
.h264_enc_ctx = MFC_H264_ENC_CTX_BUF_SIZE_V10,
+ .hevc_enc_ctx = MFC_HEVC_ENC_CTX_BUF_SIZE_V10,
.other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
};
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index 102b47e..7521fce 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_VP8_ENC:
codec_type = S5P_FIMV_CODEC_VP8_ENC_V7;
break;
+ case S5P_MFC_CODEC_HEVC_ENC:
+ codec_type = S5P_FIMV_CODEC_HEVC_ENC;
+ break;
default:
codec_type = S5P_FIMV_CODEC_NONE_V6;
}
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index b49f220..c1ae4f4 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -61,7 +61,7 @@
#define MFC_ENC_CAP_PLANE_COUNT 1
#define MFC_ENC_OUT_PLANE_COUNT 2
#define STUFF_BYTE 4
-#define MFC_MAX_CTRLS 77
+#define MFC_MAX_CTRLS 128
#define S5P_MFC_CODEC_NONE -1
#define S5P_MFC_CODEC_H264_DEC 0
@@ -80,6 +80,7 @@
#define S5P_MFC_CODEC_MPEG4_ENC 22
#define S5P_MFC_CODEC_H263_ENC 23
#define S5P_MFC_CODEC_VP8_ENC 24
+#define S5P_MFC_CODEC_HEVC_ENC 26
#define S5P_MFC_R2H_CMD_EMPTY 0
#define S5P_MFC_R2H_CMD_SYS_INIT_RET 1
@@ -215,6 +216,7 @@ struct s5p_mfc_buf_size_v6 {
unsigned int h264_dec_ctx;
unsigned int other_dec_ctx;
unsigned int h264_enc_ctx;
+ unsigned int hevc_enc_ctx;
unsigned int other_enc_ctx;
};
@@ -429,6 +431,54 @@ struct s5p_mfc_vp8_enc_params {
u8 profile;
};
+struct s5p_mfc_hevc_enc_params {
+ enum v4l2_mpeg_video_hevc_profile profile;
+ int level;
+ enum v4l2_mpeg_video_h264_level level_v4l2;
+ u8 tier_flag;
+ u32 rc_framerate;
+ u8 rc_min_qp;
+ u8 rc_max_qp;
+ u8 rc_lcu_dark;
+ u8 rc_lcu_smooth;
+ u8 rc_lcu_static;
+ u8 rc_lcu_activity;
+ u8 rc_frame_qp;
+ u8 rc_p_frame_qp;
+ u8 rc_b_frame_qp;
+ u8 max_partition_depth;
+ u8 num_refs_for_p;
+ u8 refreshtype;
+ u16 refreshperiod;
+ s32 lf_beta_offset_div2;
+ s32 lf_tc_offset_div2;
+ u8 loopfilter_disable;
+ u8 loopfilter_across;
+ u8 nal_control_length_filed;
+ u8 nal_control_user_ref;
+ u8 nal_control_store_ref;
+ u8 const_intra_period_enable;
+ u8 lossless_cu_enable;
+ u8 wavefront_enable;
+ u8 enable_ltr;
+ u8 hier_qp_enable;
+ enum v4l2_mpeg_video_hevc_hier_coding_type hier_qp_type;
+ u8 num_hier_layer;
+ u8 hier_qp_layer[7];
+ u32 hier_bit_layer[7];
+ u8 sign_data_hiding;
+ u8 general_pb_enable;
+ u8 temporal_id_enable;
+ u8 strong_intra_smooth;
+ u8 intra_pu_split_disable;
+ u8 tmv_prediction_disable;
+ u8 max_num_merge_mv;
+ u8 eco_mode_enable;
+ u8 encoding_nostartcode_enable;
+ u8 size_of_length_field;
+ u8 prepend_sps_pps_to_idr;
+};
+
/**
* struct s5p_mfc_enc_params - general encoding parameters
*/
@@ -466,6 +516,7 @@ struct s5p_mfc_enc_params {
struct s5p_mfc_h264_enc_params h264;
struct s5p_mfc_mpeg4_enc_params mpeg4;
struct s5p_mfc_vp8_enc_params vp8;
+ struct s5p_mfc_hevc_enc_params hevc;
} codec;
};
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index eb5352a..9e5b05a 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -99,6 +99,14 @@ static struct s5p_mfc_fmt formats[] = {
.num_planes = 1,
.versions = MFC_V7PLUS_BITS,
},
+ {
+ .name = "HEVC Encoded Stream",
+ .fourcc = V4L2_PIX_FMT_HEVC,
+ .codec_mode = S5P_FIMV_CODEC_HEVC_ENC,
+ .type = MFC_FMT_ENC,
+ .num_planes = 1,
+ .versions = MFC_V10_BIT,
+ },
};
#define NUM_FORMATS ARRAY_SIZE(formats)
@@ -693,6 +701,366 @@ static struct mfc_control controls[] = {
.default_value = 0,
},
{
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC I Frame QP Value",
+ .minimum = 0,
+ .maximum = 51,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC P Frame QP Value",
+ .minimum = 0,
+ .maximum = 51,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC B Frame QP Value",
+ .minimum = 0,
+ .maximum = 51,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Minimum QP Value",
+ .minimum = 0,
+ .maximum = 51,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Maximum QP Value",
+ .minimum = 0,
+ .maximum = 51,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
+ .type = V4L2_CTRL_TYPE_MENU,
+ .name = "HEVC Profile",
+ .minimum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
+ .maximum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE,
+ .step = 1,
+ .default_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
+ .type = V4L2_CTRL_TYPE_MENU,
+ .name = "HEVC Level",
+ .minimum = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
+ .maximum = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
+ .step = 1,
+ .default_value = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG,
+ .type = V4L2_CTRL_TYPE_MENU,
+ .name = "HEVC Tier_flag",
+ .minimum = V4L2_MPEG_VIDEO_HEVC_TIER_MAIN,
+ .maximum = V4L2_MPEG_VIDEO_HEVC_TIER_HIGH,
+ .step = 1,
+ .default_value = V4L2_MPEG_VIDEO_HEVC_TIER_MAIN,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Frame Rate Resolution",
+ .minimum = 1,
+ .maximum = (1 << 16) - 1,
+ .step = 1,
+ .default_value = 1,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Maximum Coding Unit Depth",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Num of Reference Pictures",
+ .minimum = 1,
+ .maximum = 2,
+ .step = 1,
+ .default_value = 1,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE,
+ .type = V4L2_CTRL_TYPE_MENU,
+ .name = "HEVC Refresh Type",
+ .minimum = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
+ .maximum = V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR,
+ .step = 1,
+ .default_value = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC Constant Intra Prediction",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC Lossless Encoding",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC Wavefront",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_LF,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC Loop Filter",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC LF Across Slice Boundary",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC QP Values",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE,
+ .type = V4L2_CTRL_TYPE_MENU,
+ .name = "HEVC Hierarchical Coding Type",
+ .minimum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
+ .maximum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P,
+ .step = 1,
+ .default_value = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Coding Layer",
+ .minimum = 0,
+ .maximum = 6,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Layer QP",
+ .minimum = INT_MIN,
+ .maximum = INT_MAX,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Lay 0 Bit Rate",
+ .minimum = INT_MIN,
+ .maximum = INT_MAX,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Lay 1 Bit Rate",
+ .minimum = INT_MIN,
+ .maximum = INT_MAX,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Lay 2 Bit Rate",
+ .minimum = INT_MIN,
+ .maximum = INT_MAX,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Lay 3 Bit Rate",
+ .minimum = INT_MIN,
+ .maximum = INT_MAX,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Lay 4 Bit Rate",
+ .minimum = INT_MIN,
+ .maximum = INT_MAX,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Lay 5 Bit Rate",
+ .minimum = INT_MIN,
+ .maximum = INT_MAX,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Lay 6 Bit Rate",
+ .minimum = INT_MIN,
+ .maximum = INT_MAX,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC General PB",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC Temporal ID",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC Strong Intra Smoothing",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC Intra PU Split",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC TMV Prediction",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Max Number of Candidate MVs",
+ .minimum = 0,
+ .maximum = 4,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC ENC Without Startcode",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Num of I Frames b/w 2 IDR",
+ .minimum = 0,
+ .maximum = (1 << 16) - 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Loop Filter Beta Offset",
+ .minimum = -6,
+ .maximum = 6,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Loop Filter TC Offset",
+ .minimum = -6,
+ .maximum = 6,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD,
+ .type = V4L2_CTRL_TYPE_MENU,
+ .name = "HEVC Size of Length Field",
+ .minimum = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
+ .maximum = V4L2_MPEG_VIDEO_HEVC_SIZE_4,
+ .step = 1,
+ .default_value = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
+ },
+ {
+ .id = V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "Prepend SPS/PPS to IDR",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
.id = V4L2_CID_MIN_BUFFERS_FOR_OUTPUT,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Minimum number of output bufs",
@@ -1359,6 +1727,26 @@ static inline int mpeg4_level(enum v4l2_mpeg_video_mpeg4_level lvl)
return t[lvl];
}
+static inline int hevc_level(enum v4l2_mpeg_video_hevc_level lvl)
+{
+ static unsigned int t[] = {
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_1 */ 10,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_2 */ 20,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1 */ 21,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_3 */ 30,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1 */ 31,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_4 */ 40,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1 */ 41,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5 */ 50,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1 */ 51,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2 */ 52,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6 */ 60,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1 */ 61,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 */ 62,
+ };
+ return t[lvl];
+}
+
static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar)
{
static unsigned int t[V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED + 1] = {
@@ -1635,6 +2023,139 @@ static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl)
case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:
p->codec.vp8.profile = ctrl->val;
break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:
+ p->codec.hevc.rc_frame_qp = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:
+ p->codec.hevc.rc_p_frame_qp = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:
+ p->codec.hevc.rc_b_frame_qp = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:
+ p->codec.hevc.rc_framerate = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:
+ p->codec.hevc.rc_min_qp = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:
+ p->codec.hevc.rc_max_qp = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
+ p->codec.hevc.level_v4l2 = ctrl->val;
+ p->codec.hevc.level = hevc_level(ctrl->val);
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
+ switch (ctrl->val) {
+ case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN:
+ p->codec.hevc.profile =
+ V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN;
+ break;
+ case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE:
+ p->codec.hevc.profile =
+ V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE;
+ break;
+ default:
+ ret = -EINVAL;
+ }
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
+ p->codec.hevc.tier_flag = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:
+ p->codec.hevc.max_partition_depth = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:
+ p->codec.hevc.num_refs_for_p = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
+ p->codec.hevc.refreshtype = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:
+ p->codec.hevc.const_intra_period_enable = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:
+ p->codec.hevc.lossless_cu_enable = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:
+ p->codec.hevc.wavefront_enable = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_LF:
+ p->codec.hevc.loopfilter_disable = (ctrl->val ^ 1);
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:
+ p->codec.hevc.loopfilter_across = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP:
+ p->codec.hevc.hier_qp_enable = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
+ p->codec.hevc.hier_qp_type = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER:
+ p->codec.hevc.num_hier_layer = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP:
+ p->codec.hevc.hier_qp_layer[(ctrl->val >> 16) & 0x7]
+ = ctrl->val & 0xFF;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR:
+ p->codec.hevc.hier_bit_layer[0] = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR:
+ p->codec.hevc.hier_bit_layer[1] = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR:
+ p->codec.hevc.hier_bit_layer[2] = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR:
+ p->codec.hevc.hier_bit_layer[3] = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR:
+ p->codec.hevc.hier_bit_layer[4] = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR:
+ p->codec.hevc.hier_bit_layer[5] = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR:
+ p->codec.hevc.hier_bit_layer[6] = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:
+ p->codec.hevc.general_pb_enable = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:
+ p->codec.hevc.temporal_id_enable = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:
+ p->codec.hevc.strong_intra_smooth = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:
+ p->codec.hevc.intra_pu_split_disable = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:
+ p->codec.hevc.tmv_prediction_disable = (ctrl->val ^ 1);
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:
+ p->codec.hevc.max_num_merge_mv = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:
+ p->codec.hevc.encoding_nostartcode_enable = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:
+ p->codec.hevc.refreshperiod = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:
+ p->codec.hevc.lf_beta_offset_div2 = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:
+ p->codec.hevc.lf_tc_offset_div2 = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
+ p->codec.hevc.size_of_length_field = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:
+ p->codec.hevc.prepend_sps_pps_to_idr = ctrl->val;
+ break;
default:
v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n",
ctrl->id, ctrl->val);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index 57f4560..8c295f0 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -272,6 +272,14 @@ struct s5p_mfc_regs {
void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */
void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */
void __iomem *e_min_scratch_buffer_size; /* v10 */
+ void __iomem *e_num_t_layer; /* v10 */
+ void __iomem *e_hier_qp_layer0; /* v10 */
+ void __iomem *e_hier_bit_rate_layer0; /* v10 */
+ void __iomem *e_hevc_options; /* v10 */
+ void __iomem *e_hevc_refresh_period; /* v10 */
+ void __iomem *e_hevc_lf_beta_offset_div2; /* v10 */
+ void __iomem *e_hevc_lf_tc_offset_div2; /* v10 */
+ void __iomem *e_hevc_nal_control; /* v10 */
};
struct s5p_mfc_hw_ops {
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index f3d0a6f..347a133 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -299,6 +299,17 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->chroma_dpb_size + ctx->me_buffer_size));
ctx->bank2.size = 0;
break;
+ case S5P_MFC_CODEC_HEVC_ENC:
+ mfc_debug(2, "Use min scratch buffer size\n");
+ ctx->me_buffer_size =
+ ALIGN(ENC_V100_HEVC_ME_SIZE(lcu_width, lcu_height), 16);
+ ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 256);
+ ctx->bank1.size =
+ ctx->scratch_buf_size + ctx->tmv_buffer_size +
+ (ctx->pb_count * (ctx->luma_dpb_size +
+ ctx->chroma_dpb_size + ctx->me_buffer_size));
+ ctx->bank2.size = 0;
+ break;
default:
break;
}
@@ -348,6 +359,9 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_H264_ENC:
ctx->ctx.size = buf_size->h264_enc_ctx;
break;
+ case S5P_MFC_CODEC_HEVC_ENC:
+ ctx->ctx.size = buf_size->hevc_enc_ctx;
+ break;
case S5P_MFC_CODEC_MPEG4_ENC:
case S5P_MFC_CODEC_H263_ENC:
case S5P_MFC_CODEC_VP8_ENC:
@@ -1426,6 +1440,148 @@ static int s5p_mfc_set_enc_params_vp8(struct s5p_mfc_ctx *ctx)
return 0;
}
+static int s5p_mfc_set_enc_params_hevc(struct s5p_mfc_ctx *ctx)
+{
+ struct s5p_mfc_dev *dev = ctx->dev;
+ const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs;
+ struct s5p_mfc_enc_params *p = &ctx->enc_params;
+ struct s5p_mfc_hevc_enc_params *p_hevc = &p->codec.hevc;
+ unsigned int reg = 0;
+ int i;
+
+ mfc_debug_enter();
+
+ s5p_mfc_set_enc_params(ctx);
+
+ /* pictype : number of B */
+ reg = readl(mfc_regs->e_gop_config);
+ /* num_b_frame - 0 ~ 2 */
+ reg &= ~(0x3 << 16);
+ reg |= (p->num_b_frame << 16);
+ writel(reg, mfc_regs->e_gop_config);
+
+ /* UHD encoding case */
+ if ((ctx->img_width == 3840) && (ctx->img_height == 2160)) {
+ p_hevc->level = 51;
+ p_hevc->tier_flag = 0;
+ /* this tier_flag can be changed */
+ }
+
+ /* tier_flag & level */
+ reg = 0;
+ /* profile */
+ reg |= p_hevc->profile & 0x3;
+ /* level */
+ reg &= ~(0xFF << 8);
+ reg |= (p_hevc->level << 8);
+ /* tier_flag - 0 ~ 1 */
+ reg |= (p_hevc->tier_flag << 16);
+ writel(reg, mfc_regs->e_picture_profile);
+
+ /* max partition depth */
+ reg = 0;
+ reg |= (p_hevc->max_partition_depth & 0x1);
+ reg |= (p_hevc->num_refs_for_p-1) << 2;
+ reg |= (p_hevc->refreshtype & 0x3) << 3;
+ reg |= (p_hevc->const_intra_period_enable & 0x1) << 5;
+ reg |= (p_hevc->lossless_cu_enable & 0x1) << 6;
+ reg |= (p_hevc->wavefront_enable & 0x1) << 7;
+ reg |= (p_hevc->loopfilter_disable & 0x1) << 8;
+ reg |= (p_hevc->loopfilter_across & 0x1) << 9;
+ reg |= (p_hevc->enable_ltr & 0x1) << 10;
+ reg |= (p_hevc->hier_qp_enable & 0x1) << 11;
+ reg |= (p_hevc->general_pb_enable & 0x1) << 13;
+ reg |= (p_hevc->temporal_id_enable & 0x1) << 14;
+ reg |= (p_hevc->strong_intra_smooth & 0x1) << 15;
+ reg |= (p_hevc->intra_pu_split_disable & 0x1) << 16;
+ reg |= (p_hevc->tmv_prediction_disable & 0x1) << 17;
+ reg |= (p_hevc->max_num_merge_mv & 0x7) << 18;
+ reg |= (p_hevc->encoding_nostartcode_enable & 0x1) << 23;
+ reg |= (p_hevc->prepend_sps_pps_to_idr << 26);
+
+ writel(reg, mfc_regs->e_hevc_options);
+ /* refresh period */
+ if (p_hevc->refreshtype) {
+ reg = 0;
+ reg |= (p_hevc->refreshperiod & 0xFFFF);
+ writel(reg, mfc_regs->e_hevc_refresh_period);
+ }
+ /* loop filter setting */
+ if (!(p_hevc->loopfilter_disable & 0x1)) {
+ reg = 0;
+ reg |= (p_hevc->lf_beta_offset_div2);
+ writel(reg, mfc_regs->e_hevc_lf_beta_offset_div2);
+ reg = 0;
+ reg |= (p_hevc->lf_tc_offset_div2);
+ writel(reg, mfc_regs->e_hevc_lf_tc_offset_div2);
+ }
+ /* hier qp enable */
+ if (p_hevc->num_hier_layer) {
+ reg = 0;
+ reg |= (p_hevc->hier_qp_type & 0x1) << 0x3;
+ reg |= p_hevc->num_hier_layer & 0x7;
+ writel(reg, mfc_regs->e_num_t_layer);
+ /* QP value for each layer */
+ if (p_hevc->hier_qp_enable) {
+ for (i = 0; i < 7; i++)
+ writel(p_hevc->hier_qp_layer[i],
+ mfc_regs->e_hier_qp_layer0 + i * 4);
+ }
+ if (p->rc_frame) {
+ for (i = 0; i < 7; i++)
+ writel(p_hevc->hier_bit_layer[i],
+ mfc_regs->e_hier_bit_rate_layer0
+ + i * 4);
+ }
+ }
+
+ /* rate control config. */
+ reg = readl(mfc_regs->e_rc_config);
+ /* macroblock level rate control */
+ reg &= ~(0x1 << 8);
+ reg |= (p->rc_mb << 8);
+ writel(reg, mfc_regs->e_rc_config);
+ /* frame QP */
+ reg &= ~(0xFF);
+ reg |= p_hevc->rc_frame_qp;
+ writel(reg, mfc_regs->e_rc_config);
+
+ /* frame rate */
+ if (p->rc_frame) {
+ reg = 0;
+ reg &= ~(0xFFFF << 16);
+ reg |= ((p_hevc->rc_framerate) << 16);
+ reg &= ~(0xFFFF);
+ reg |= FRAME_DELTA_DEFAULT;
+ writel(reg, mfc_regs->e_rc_frame_rate);
+ }
+
+ /* max & min value of QP */
+ reg = 0;
+ /* max QP */
+ reg &= ~(0xFF << 8);
+ reg |= (p_hevc->rc_max_qp << 8);
+ /* min QP */
+ reg &= ~(0xFF);
+ reg |= p_hevc->rc_min_qp;
+ writel(reg, mfc_regs->e_rc_qp_bound);
+
+ writel(0x0, mfc_regs->e_fixed_picture_qp);
+ if (!p->rc_frame && !p->rc_mb) {
+ reg = 0;
+ reg &= ~(0xFF << 16);
+ reg |= (p_hevc->rc_b_frame_qp << 16);
+ reg &= ~(0xFF << 8);
+ reg |= (p_hevc->rc_p_frame_qp << 8);
+ reg &= ~(0xFF);
+ reg |= p_hevc->rc_frame_qp;
+ writel(reg, mfc_regs->e_fixed_picture_qp);
+ }
+ mfc_debug_leave();
+
+ return 0;
+}
+
/* Initialize decoding */
static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx)
{
@@ -1545,6 +1701,8 @@ static int s5p_mfc_init_encode_v6(struct s5p_mfc_ctx *ctx)
s5p_mfc_set_enc_params_h263(ctx);
else if (ctx->codec_mode == S5P_MFC_CODEC_VP8_ENC)
s5p_mfc_set_enc_params_vp8(ctx);
+ else if (ctx->codec_mode == S5P_FIMV_CODEC_HEVC_ENC)
+ s5p_mfc_set_enc_params_hevc(ctx);
else {
mfc_err("Unknown codec for encoding (%x).\n",
ctx->codec_mode);
@@ -2298,6 +2456,16 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
R(d_static_buffer_addr, S5P_FIMV_D_STATIC_BUFFER_ADDR_V10);
R(d_static_buffer_size, S5P_FIMV_D_STATIC_BUFFER_SIZE_V10);
+ /* encoder registers */
+ R(e_num_t_layer, S5P_FIMV_E_NUM_T_LAYER_V10);
+ R(e_hier_qp_layer0, S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10);
+ R(e_hier_bit_rate_layer0, S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10);
+ R(e_hevc_options, S5P_FIMV_E_HEVC_OPTIONS_V10);
+ R(e_hevc_refresh_period, S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10);
+ R(e_hevc_lf_beta_offset_div2, S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10);
+ R(e_hevc_lf_tc_offset_div2, S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10);
+ R(e_hevc_nal_control, S5P_FIMV_E_HEVC_NAL_CONTROL_V10);
+
done:
return &mfc_regs;
#undef S5P_MFC_REG_ADDR
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
index 2290f7e..8a7d053 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
@@ -46,6 +46,14 @@
#define ENC_MPEG4_VOP_TIME_RES_MAX ((1 << 16) - 1)
#define FRAME_DELTA_H264_H263 1
#define TIGHT_CBR_MAX 10
+#define ENC_HEVC_RC_FRAME_RATE_MAX ((1 << 16) - 1)
+#define ENC_HEVC_QP_INDEX_MIN -12
+#define ENC_HEVC_QP_INDEX_MAX 12
+#define ENC_HEVC_LOOP_FILTER_MIN -12
+#define ENC_HEVC_LOOP_FILTER_MAX 12
+#define ENC_HEVC_LEVEL_MAX 62
+
+#define FRAME_DELTA_DEFAULT 1
struct s5p_mfc_hw_ops *s5p_mfc_init_hw_ops_v6(void);
const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev);
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 11/12] [media] s5p-mfc: Add support for HEVC encoder
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel
Add HEVC encoder support and necessary registers, V4L2 CIDs,
and hevc encoder parameters
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
---
drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 28 +-
drivers/media/platform/s5p-mfc/s5p_mfc.c | 1 +
drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c | 3 +
drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 53 ++-
drivers/media/platform/s5p-mfc/s5p_mfc_enc.c | 521 ++++++++++++++++++++++++
drivers/media/platform/s5p-mfc/s5p_mfc_opr.h | 8 +
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 168 ++++++++
drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 8 +
8 files changed, 788 insertions(+), 2 deletions(-)
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 6754477..7065b9d 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -20,13 +20,35 @@
#define S5P_FIMV_MFC_STATE_V10 0x7124
#define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10 0xF570
#define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10 0xF574
+#define S5P_FIMV_E_NUM_T_LAYER_V10 0xFBAC
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10 0xFBB0
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10 0xFBB4
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10 0xFBB8
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10 0xFBBC
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10 0xFBC0
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10 0xFBC4
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10 0xFBC8
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10 0xFD18
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V10 0xFD1C
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V10 0xFD20
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V10 0xFD24
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V10 0xFD28
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V10 0xFD2C
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V10 0xFD30
+#define S5P_FIMV_E_HEVC_OPTIONS_V10 0xFDD4
+#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10 0xFDD8
+#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10 0xFDDC
+#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10 0xFDE0
+#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10 0xFDE4
+#define S5P_FIMV_E_HEVC_NAL_CONTROL_V10 0xFDE8
/* MFCv10 Context buffer sizes */
#define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
#define MFC_H264_DEC_CTX_BUF_SIZE_V10 (2 * SZ_1M)
#define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)
#define MFC_H264_ENC_CTX_BUF_SIZE_V10 (100 * SZ_1K)
-#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
+#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
+#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
/* MFCv10 variant defines */
#define MAX_FW_SIZE_V10 (SZ_1M)
@@ -58,5 +80,9 @@
#define ENC_V100_VP8_ME_SIZE(x, y) \
ENC_V100_BASE_SIZE(x, y)
+#define ENC_V100_HEVC_ME_SIZE(x, y) \
+ (((x + 3) * (y + 3) * 32) \
+ + ((y * 128) + 1280) * DIV_ROUND_UP(x, 4))
+
#endif /*_REGS_MFC_V10_H*/
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index efc36b0..742c2b7 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -1621,6 +1621,7 @@ static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
.h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V10,
.other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
.h264_enc_ctx = MFC_H264_ENC_CTX_BUF_SIZE_V10,
+ .hevc_enc_ctx = MFC_HEVC_ENC_CTX_BUF_SIZE_V10,
.other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
};
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index 102b47e..7521fce 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_VP8_ENC:
codec_type = S5P_FIMV_CODEC_VP8_ENC_V7;
break;
+ case S5P_MFC_CODEC_HEVC_ENC:
+ codec_type = S5P_FIMV_CODEC_HEVC_ENC;
+ break;
default:
codec_type = S5P_FIMV_CODEC_NONE_V6;
}
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index b49f220..c1ae4f4 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -61,7 +61,7 @@
#define MFC_ENC_CAP_PLANE_COUNT 1
#define MFC_ENC_OUT_PLANE_COUNT 2
#define STUFF_BYTE 4
-#define MFC_MAX_CTRLS 77
+#define MFC_MAX_CTRLS 128
#define S5P_MFC_CODEC_NONE -1
#define S5P_MFC_CODEC_H264_DEC 0
@@ -80,6 +80,7 @@
#define S5P_MFC_CODEC_MPEG4_ENC 22
#define S5P_MFC_CODEC_H263_ENC 23
#define S5P_MFC_CODEC_VP8_ENC 24
+#define S5P_MFC_CODEC_HEVC_ENC 26
#define S5P_MFC_R2H_CMD_EMPTY 0
#define S5P_MFC_R2H_CMD_SYS_INIT_RET 1
@@ -215,6 +216,7 @@ struct s5p_mfc_buf_size_v6 {
unsigned int h264_dec_ctx;
unsigned int other_dec_ctx;
unsigned int h264_enc_ctx;
+ unsigned int hevc_enc_ctx;
unsigned int other_enc_ctx;
};
@@ -429,6 +431,54 @@ struct s5p_mfc_vp8_enc_params {
u8 profile;
};
+struct s5p_mfc_hevc_enc_params {
+ enum v4l2_mpeg_video_hevc_profile profile;
+ int level;
+ enum v4l2_mpeg_video_h264_level level_v4l2;
+ u8 tier_flag;
+ u32 rc_framerate;
+ u8 rc_min_qp;
+ u8 rc_max_qp;
+ u8 rc_lcu_dark;
+ u8 rc_lcu_smooth;
+ u8 rc_lcu_static;
+ u8 rc_lcu_activity;
+ u8 rc_frame_qp;
+ u8 rc_p_frame_qp;
+ u8 rc_b_frame_qp;
+ u8 max_partition_depth;
+ u8 num_refs_for_p;
+ u8 refreshtype;
+ u16 refreshperiod;
+ s32 lf_beta_offset_div2;
+ s32 lf_tc_offset_div2;
+ u8 loopfilter_disable;
+ u8 loopfilter_across;
+ u8 nal_control_length_filed;
+ u8 nal_control_user_ref;
+ u8 nal_control_store_ref;
+ u8 const_intra_period_enable;
+ u8 lossless_cu_enable;
+ u8 wavefront_enable;
+ u8 enable_ltr;
+ u8 hier_qp_enable;
+ enum v4l2_mpeg_video_hevc_hier_coding_type hier_qp_type;
+ u8 num_hier_layer;
+ u8 hier_qp_layer[7];
+ u32 hier_bit_layer[7];
+ u8 sign_data_hiding;
+ u8 general_pb_enable;
+ u8 temporal_id_enable;
+ u8 strong_intra_smooth;
+ u8 intra_pu_split_disable;
+ u8 tmv_prediction_disable;
+ u8 max_num_merge_mv;
+ u8 eco_mode_enable;
+ u8 encoding_nostartcode_enable;
+ u8 size_of_length_field;
+ u8 prepend_sps_pps_to_idr;
+};
+
/**
* struct s5p_mfc_enc_params - general encoding parameters
*/
@@ -466,6 +516,7 @@ struct s5p_mfc_enc_params {
struct s5p_mfc_h264_enc_params h264;
struct s5p_mfc_mpeg4_enc_params mpeg4;
struct s5p_mfc_vp8_enc_params vp8;
+ struct s5p_mfc_hevc_enc_params hevc;
} codec;
};
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index eb5352a..9e5b05a 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -99,6 +99,14 @@ static struct s5p_mfc_fmt formats[] = {
.num_planes = 1,
.versions = MFC_V7PLUS_BITS,
},
+ {
+ .name = "HEVC Encoded Stream",
+ .fourcc = V4L2_PIX_FMT_HEVC,
+ .codec_mode = S5P_FIMV_CODEC_HEVC_ENC,
+ .type = MFC_FMT_ENC,
+ .num_planes = 1,
+ .versions = MFC_V10_BIT,
+ },
};
#define NUM_FORMATS ARRAY_SIZE(formats)
@@ -693,6 +701,366 @@ static struct mfc_control controls[] = {
.default_value = 0,
},
{
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC I Frame QP Value",
+ .minimum = 0,
+ .maximum = 51,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC P Frame QP Value",
+ .minimum = 0,
+ .maximum = 51,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC B Frame QP Value",
+ .minimum = 0,
+ .maximum = 51,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Minimum QP Value",
+ .minimum = 0,
+ .maximum = 51,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Maximum QP Value",
+ .minimum = 0,
+ .maximum = 51,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
+ .type = V4L2_CTRL_TYPE_MENU,
+ .name = "HEVC Profile",
+ .minimum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
+ .maximum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE,
+ .step = 1,
+ .default_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
+ .type = V4L2_CTRL_TYPE_MENU,
+ .name = "HEVC Level",
+ .minimum = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
+ .maximum = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
+ .step = 1,
+ .default_value = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG,
+ .type = V4L2_CTRL_TYPE_MENU,
+ .name = "HEVC Tier_flag",
+ .minimum = V4L2_MPEG_VIDEO_HEVC_TIER_MAIN,
+ .maximum = V4L2_MPEG_VIDEO_HEVC_TIER_HIGH,
+ .step = 1,
+ .default_value = V4L2_MPEG_VIDEO_HEVC_TIER_MAIN,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Frame Rate Resolution",
+ .minimum = 1,
+ .maximum = (1 << 16) - 1,
+ .step = 1,
+ .default_value = 1,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Maximum Coding Unit Depth",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Num of Reference Pictures",
+ .minimum = 1,
+ .maximum = 2,
+ .step = 1,
+ .default_value = 1,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE,
+ .type = V4L2_CTRL_TYPE_MENU,
+ .name = "HEVC Refresh Type",
+ .minimum = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
+ .maximum = V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR,
+ .step = 1,
+ .default_value = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC Constant Intra Prediction",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC Lossless Encoding",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC Wavefront",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_LF,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC Loop Filter",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC LF Across Slice Boundary",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC QP Values",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE,
+ .type = V4L2_CTRL_TYPE_MENU,
+ .name = "HEVC Hierarchical Coding Type",
+ .minimum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
+ .maximum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P,
+ .step = 1,
+ .default_value = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Coding Layer",
+ .minimum = 0,
+ .maximum = 6,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Layer QP",
+ .minimum = INT_MIN,
+ .maximum = INT_MAX,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Lay 0 Bit Rate",
+ .minimum = INT_MIN,
+ .maximum = INT_MAX,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Lay 1 Bit Rate",
+ .minimum = INT_MIN,
+ .maximum = INT_MAX,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Lay 2 Bit Rate",
+ .minimum = INT_MIN,
+ .maximum = INT_MAX,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Lay 3 Bit Rate",
+ .minimum = INT_MIN,
+ .maximum = INT_MAX,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Lay 4 Bit Rate",
+ .minimum = INT_MIN,
+ .maximum = INT_MAX,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Lay 5 Bit Rate",
+ .minimum = INT_MIN,
+ .maximum = INT_MAX,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Hierarchical Lay 6 Bit Rate",
+ .minimum = INT_MIN,
+ .maximum = INT_MAX,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC General PB",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC Temporal ID",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC Strong Intra Smoothing",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC Intra PU Split",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC TMV Prediction",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Max Number of Candidate MVs",
+ .minimum = 0,
+ .maximum = 4,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "HEVC ENC Without Startcode",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Num of I Frames b/w 2 IDR",
+ .minimum = 0,
+ .maximum = (1 << 16) - 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Loop Filter Beta Offset",
+ .minimum = -6,
+ .maximum = 6,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "HEVC Loop Filter TC Offset",
+ .minimum = -6,
+ .maximum = 6,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD,
+ .type = V4L2_CTRL_TYPE_MENU,
+ .name = "HEVC Size of Length Field",
+ .minimum = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
+ .maximum = V4L2_MPEG_VIDEO_HEVC_SIZE_4,
+ .step = 1,
+ .default_value = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
+ },
+ {
+ .id = V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "Prepend SPS/PPS to IDR",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+ {
.id = V4L2_CID_MIN_BUFFERS_FOR_OUTPUT,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Minimum number of output bufs",
@@ -1359,6 +1727,26 @@ static inline int mpeg4_level(enum v4l2_mpeg_video_mpeg4_level lvl)
return t[lvl];
}
+static inline int hevc_level(enum v4l2_mpeg_video_hevc_level lvl)
+{
+ static unsigned int t[] = {
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_1 */ 10,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_2 */ 20,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1 */ 21,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_3 */ 30,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1 */ 31,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_4 */ 40,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1 */ 41,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5 */ 50,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1 */ 51,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2 */ 52,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6 */ 60,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1 */ 61,
+ /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 */ 62,
+ };
+ return t[lvl];
+}
+
static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar)
{
static unsigned int t[V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED + 1] = {
@@ -1635,6 +2023,139 @@ static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl)
case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:
p->codec.vp8.profile = ctrl->val;
break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:
+ p->codec.hevc.rc_frame_qp = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:
+ p->codec.hevc.rc_p_frame_qp = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:
+ p->codec.hevc.rc_b_frame_qp = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:
+ p->codec.hevc.rc_framerate = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:
+ p->codec.hevc.rc_min_qp = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:
+ p->codec.hevc.rc_max_qp = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
+ p->codec.hevc.level_v4l2 = ctrl->val;
+ p->codec.hevc.level = hevc_level(ctrl->val);
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
+ switch (ctrl->val) {
+ case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN:
+ p->codec.hevc.profile =
+ V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN;
+ break;
+ case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE:
+ p->codec.hevc.profile =
+ V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE;
+ break;
+ default:
+ ret = -EINVAL;
+ }
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
+ p->codec.hevc.tier_flag = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:
+ p->codec.hevc.max_partition_depth = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:
+ p->codec.hevc.num_refs_for_p = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
+ p->codec.hevc.refreshtype = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:
+ p->codec.hevc.const_intra_period_enable = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:
+ p->codec.hevc.lossless_cu_enable = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:
+ p->codec.hevc.wavefront_enable = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_LF:
+ p->codec.hevc.loopfilter_disable = (ctrl->val ^ 1);
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:
+ p->codec.hevc.loopfilter_across = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP:
+ p->codec.hevc.hier_qp_enable = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
+ p->codec.hevc.hier_qp_type = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER:
+ p->codec.hevc.num_hier_layer = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP:
+ p->codec.hevc.hier_qp_layer[(ctrl->val >> 16) & 0x7]
+ = ctrl->val & 0xFF;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR:
+ p->codec.hevc.hier_bit_layer[0] = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR:
+ p->codec.hevc.hier_bit_layer[1] = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR:
+ p->codec.hevc.hier_bit_layer[2] = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR:
+ p->codec.hevc.hier_bit_layer[3] = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR:
+ p->codec.hevc.hier_bit_layer[4] = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR:
+ p->codec.hevc.hier_bit_layer[5] = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR:
+ p->codec.hevc.hier_bit_layer[6] = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:
+ p->codec.hevc.general_pb_enable = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:
+ p->codec.hevc.temporal_id_enable = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:
+ p->codec.hevc.strong_intra_smooth = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:
+ p->codec.hevc.intra_pu_split_disable = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:
+ p->codec.hevc.tmv_prediction_disable = (ctrl->val ^ 1);
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:
+ p->codec.hevc.max_num_merge_mv = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:
+ p->codec.hevc.encoding_nostartcode_enable = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:
+ p->codec.hevc.refreshperiod = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:
+ p->codec.hevc.lf_beta_offset_div2 = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:
+ p->codec.hevc.lf_tc_offset_div2 = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
+ p->codec.hevc.size_of_length_field = ctrl->val;
+ break;
+ case V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:
+ p->codec.hevc.prepend_sps_pps_to_idr = ctrl->val;
+ break;
default:
v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n",
ctrl->id, ctrl->val);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index 57f4560..8c295f0 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -272,6 +272,14 @@ struct s5p_mfc_regs {
void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */
void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */
void __iomem *e_min_scratch_buffer_size; /* v10 */
+ void __iomem *e_num_t_layer; /* v10 */
+ void __iomem *e_hier_qp_layer0; /* v10 */
+ void __iomem *e_hier_bit_rate_layer0; /* v10 */
+ void __iomem *e_hevc_options; /* v10 */
+ void __iomem *e_hevc_refresh_period; /* v10 */
+ void __iomem *e_hevc_lf_beta_offset_div2; /* v10 */
+ void __iomem *e_hevc_lf_tc_offset_div2; /* v10 */
+ void __iomem *e_hevc_nal_control; /* v10 */
};
struct s5p_mfc_hw_ops {
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index f3d0a6f..347a133 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -299,6 +299,17 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
ctx->chroma_dpb_size + ctx->me_buffer_size));
ctx->bank2.size = 0;
break;
+ case S5P_MFC_CODEC_HEVC_ENC:
+ mfc_debug(2, "Use min scratch buffer size\n");
+ ctx->me_buffer_size =
+ ALIGN(ENC_V100_HEVC_ME_SIZE(lcu_width, lcu_height), 16);
+ ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 256);
+ ctx->bank1.size =
+ ctx->scratch_buf_size + ctx->tmv_buffer_size +
+ (ctx->pb_count * (ctx->luma_dpb_size +
+ ctx->chroma_dpb_size + ctx->me_buffer_size));
+ ctx->bank2.size = 0;
+ break;
default:
break;
}
@@ -348,6 +359,9 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_H264_ENC:
ctx->ctx.size = buf_size->h264_enc_ctx;
break;
+ case S5P_MFC_CODEC_HEVC_ENC:
+ ctx->ctx.size = buf_size->hevc_enc_ctx;
+ break;
case S5P_MFC_CODEC_MPEG4_ENC:
case S5P_MFC_CODEC_H263_ENC:
case S5P_MFC_CODEC_VP8_ENC:
@@ -1426,6 +1440,148 @@ static int s5p_mfc_set_enc_params_vp8(struct s5p_mfc_ctx *ctx)
return 0;
}
+static int s5p_mfc_set_enc_params_hevc(struct s5p_mfc_ctx *ctx)
+{
+ struct s5p_mfc_dev *dev = ctx->dev;
+ const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs;
+ struct s5p_mfc_enc_params *p = &ctx->enc_params;
+ struct s5p_mfc_hevc_enc_params *p_hevc = &p->codec.hevc;
+ unsigned int reg = 0;
+ int i;
+
+ mfc_debug_enter();
+
+ s5p_mfc_set_enc_params(ctx);
+
+ /* pictype : number of B */
+ reg = readl(mfc_regs->e_gop_config);
+ /* num_b_frame - 0 ~ 2 */
+ reg &= ~(0x3 << 16);
+ reg |= (p->num_b_frame << 16);
+ writel(reg, mfc_regs->e_gop_config);
+
+ /* UHD encoding case */
+ if ((ctx->img_width == 3840) && (ctx->img_height == 2160)) {
+ p_hevc->level = 51;
+ p_hevc->tier_flag = 0;
+ /* this tier_flag can be changed */
+ }
+
+ /* tier_flag & level */
+ reg = 0;
+ /* profile */
+ reg |= p_hevc->profile & 0x3;
+ /* level */
+ reg &= ~(0xFF << 8);
+ reg |= (p_hevc->level << 8);
+ /* tier_flag - 0 ~ 1 */
+ reg |= (p_hevc->tier_flag << 16);
+ writel(reg, mfc_regs->e_picture_profile);
+
+ /* max partition depth */
+ reg = 0;
+ reg |= (p_hevc->max_partition_depth & 0x1);
+ reg |= (p_hevc->num_refs_for_p-1) << 2;
+ reg |= (p_hevc->refreshtype & 0x3) << 3;
+ reg |= (p_hevc->const_intra_period_enable & 0x1) << 5;
+ reg |= (p_hevc->lossless_cu_enable & 0x1) << 6;
+ reg |= (p_hevc->wavefront_enable & 0x1) << 7;
+ reg |= (p_hevc->loopfilter_disable & 0x1) << 8;
+ reg |= (p_hevc->loopfilter_across & 0x1) << 9;
+ reg |= (p_hevc->enable_ltr & 0x1) << 10;
+ reg |= (p_hevc->hier_qp_enable & 0x1) << 11;
+ reg |= (p_hevc->general_pb_enable & 0x1) << 13;
+ reg |= (p_hevc->temporal_id_enable & 0x1) << 14;
+ reg |= (p_hevc->strong_intra_smooth & 0x1) << 15;
+ reg |= (p_hevc->intra_pu_split_disable & 0x1) << 16;
+ reg |= (p_hevc->tmv_prediction_disable & 0x1) << 17;
+ reg |= (p_hevc->max_num_merge_mv & 0x7) << 18;
+ reg |= (p_hevc->encoding_nostartcode_enable & 0x1) << 23;
+ reg |= (p_hevc->prepend_sps_pps_to_idr << 26);
+
+ writel(reg, mfc_regs->e_hevc_options);
+ /* refresh period */
+ if (p_hevc->refreshtype) {
+ reg = 0;
+ reg |= (p_hevc->refreshperiod & 0xFFFF);
+ writel(reg, mfc_regs->e_hevc_refresh_period);
+ }
+ /* loop filter setting */
+ if (!(p_hevc->loopfilter_disable & 0x1)) {
+ reg = 0;
+ reg |= (p_hevc->lf_beta_offset_div2);
+ writel(reg, mfc_regs->e_hevc_lf_beta_offset_div2);
+ reg = 0;
+ reg |= (p_hevc->lf_tc_offset_div2);
+ writel(reg, mfc_regs->e_hevc_lf_tc_offset_div2);
+ }
+ /* hier qp enable */
+ if (p_hevc->num_hier_layer) {
+ reg = 0;
+ reg |= (p_hevc->hier_qp_type & 0x1) << 0x3;
+ reg |= p_hevc->num_hier_layer & 0x7;
+ writel(reg, mfc_regs->e_num_t_layer);
+ /* QP value for each layer */
+ if (p_hevc->hier_qp_enable) {
+ for (i = 0; i < 7; i++)
+ writel(p_hevc->hier_qp_layer[i],
+ mfc_regs->e_hier_qp_layer0 + i * 4);
+ }
+ if (p->rc_frame) {
+ for (i = 0; i < 7; i++)
+ writel(p_hevc->hier_bit_layer[i],
+ mfc_regs->e_hier_bit_rate_layer0
+ + i * 4);
+ }
+ }
+
+ /* rate control config. */
+ reg = readl(mfc_regs->e_rc_config);
+ /* macroblock level rate control */
+ reg &= ~(0x1 << 8);
+ reg |= (p->rc_mb << 8);
+ writel(reg, mfc_regs->e_rc_config);
+ /* frame QP */
+ reg &= ~(0xFF);
+ reg |= p_hevc->rc_frame_qp;
+ writel(reg, mfc_regs->e_rc_config);
+
+ /* frame rate */
+ if (p->rc_frame) {
+ reg = 0;
+ reg &= ~(0xFFFF << 16);
+ reg |= ((p_hevc->rc_framerate) << 16);
+ reg &= ~(0xFFFF);
+ reg |= FRAME_DELTA_DEFAULT;
+ writel(reg, mfc_regs->e_rc_frame_rate);
+ }
+
+ /* max & min value of QP */
+ reg = 0;
+ /* max QP */
+ reg &= ~(0xFF << 8);
+ reg |= (p_hevc->rc_max_qp << 8);
+ /* min QP */
+ reg &= ~(0xFF);
+ reg |= p_hevc->rc_min_qp;
+ writel(reg, mfc_regs->e_rc_qp_bound);
+
+ writel(0x0, mfc_regs->e_fixed_picture_qp);
+ if (!p->rc_frame && !p->rc_mb) {
+ reg = 0;
+ reg &= ~(0xFF << 16);
+ reg |= (p_hevc->rc_b_frame_qp << 16);
+ reg &= ~(0xFF << 8);
+ reg |= (p_hevc->rc_p_frame_qp << 8);
+ reg &= ~(0xFF);
+ reg |= p_hevc->rc_frame_qp;
+ writel(reg, mfc_regs->e_fixed_picture_qp);
+ }
+ mfc_debug_leave();
+
+ return 0;
+}
+
/* Initialize decoding */
static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx)
{
@@ -1545,6 +1701,8 @@ static int s5p_mfc_init_encode_v6(struct s5p_mfc_ctx *ctx)
s5p_mfc_set_enc_params_h263(ctx);
else if (ctx->codec_mode == S5P_MFC_CODEC_VP8_ENC)
s5p_mfc_set_enc_params_vp8(ctx);
+ else if (ctx->codec_mode == S5P_FIMV_CODEC_HEVC_ENC)
+ s5p_mfc_set_enc_params_hevc(ctx);
else {
mfc_err("Unknown codec for encoding (%x).\n",
ctx->codec_mode);
@@ -2298,6 +2456,16 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
R(d_static_buffer_addr, S5P_FIMV_D_STATIC_BUFFER_ADDR_V10);
R(d_static_buffer_size, S5P_FIMV_D_STATIC_BUFFER_SIZE_V10);
+ /* encoder registers */
+ R(e_num_t_layer, S5P_FIMV_E_NUM_T_LAYER_V10);
+ R(e_hier_qp_layer0, S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10);
+ R(e_hier_bit_rate_layer0, S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10);
+ R(e_hevc_options, S5P_FIMV_E_HEVC_OPTIONS_V10);
+ R(e_hevc_refresh_period, S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10);
+ R(e_hevc_lf_beta_offset_div2, S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10);
+ R(e_hevc_lf_tc_offset_div2, S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10);
+ R(e_hevc_nal_control, S5P_FIMV_E_HEVC_NAL_CONTROL_V10);
+
done:
return &mfc_regs;
#undef S5P_MFC_REG_ADDR
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
index 2290f7e..8a7d053 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
@@ -46,6 +46,14 @@
#define ENC_MPEG4_VOP_TIME_RES_MAX ((1 << 16) - 1)
#define FRAME_DELTA_H264_H263 1
#define TIGHT_CBR_MAX 10
+#define ENC_HEVC_RC_FRAME_RATE_MAX ((1 << 16) - 1)
+#define ENC_HEVC_QP_INDEX_MIN -12
+#define ENC_HEVC_QP_INDEX_MAX 12
+#define ENC_HEVC_LOOP_FILTER_MIN -12
+#define ENC_HEVC_LOOP_FILTER_MAX 12
+#define ENC_HEVC_LEVEL_MAX 62
+
+#define FRAME_DELTA_DEFAULT 1
struct s5p_mfc_hw_ops *s5p_mfc_init_hw_ops_v6(void);
const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev);
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
[not found] ` <CGME20170619052521epcas5p36a0bc384d10809dcfe775e6da87ed37b@epcas5p3.samsung.com>
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki, Smitha T Murthy
Added V4l2 controls for HEVC encoder
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
---
Documentation/media/uapi/v4l/extended-controls.rst | 364 +++++++++++++++++++++
1 file changed, 364 insertions(+)
diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
index abb1057..7767c70 100644
--- a/Documentation/media/uapi/v4l/extended-controls.rst
+++ b/Documentation/media/uapi/v4l/extended-controls.rst
@@ -1960,6 +1960,370 @@ enum v4l2_vp8_golden_frame_sel -
1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
+High Efficiency Video Coding (HEVC/H.265) Control Reference
+-----------------------------------------------------------
+
+The HEVC/H.265 controls include controls for encoding parameters of HEVC/H.265
+video codec.
+
+
+.. _hevc-control-id:
+
+HEVC/H.265 Control IDs
+^^^^^^^^^^^^^^^^^^^^^^
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP (integer)``
+ Minimum quantization parameter for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP (integer)``
+ Maximum quantization parameter for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP (integer)``
+ Quantization parameter for an I frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP (integer)``
+ Quantization parameter for a P frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP (integer)``
+ Quantization parameter for a B frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP (boolean)``
+ HIERARCHICAL_QP allows host to specify the quantization parameter values
+ for each temporal layer through HIERARCHICAL_QP_LAYER. This is valid only
+ if HIERARCHICAL_CODING_LAYER is greater than 1. Setting the control value
+ to 1 enables setting of the QP values for the layers.
+
+.. _v4l2-hevc-hier-coding-type:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE``
+ (enum)
+
+enum v4l2_mpeg_video_hevc_hier_coding_type -
+ Selects the hierarchical coding type for encoding. Possible values are:
+
+.. raw:: latex
+
+ \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+ :header-rows: 0
+ :stub-columns: 0
+
+ * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B``
+ - Use the B frame for hierarchical coding.
+ * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P``
+ - Use the P frame for hierarchical coding.
+
+.. raw:: latex
+
+ \end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (integer)``
+ Selects the hierarchical coding layer. In normal encoding
+ (non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
+ 0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
+ LAYER 1 and so on.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP (integer)``
+ Indicates the hierarchical coding layer quantization parameter.
+ For HEVC it can have a value of 0-51. Hence in the control value passed
+ the LSB 16 bits will indicate the quantization parameter. The MSB 16 bit
+ will pass the layer(0-6) it is meant for.
+
+.. _v4l2-hevc-profile:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
+ (enum)
+
+enum v4l2_mpeg_video_hevc_profile -
+ Select the desired profile for HEVC encoder.
+
+.. raw:: latex
+
+ \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+ :header-rows: 0
+ :stub-columns: 0
+
+ * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
+ - Main profile.
+ * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
+ - Main still picture profile.
+
+.. raw:: latex
+
+ \end{adjustbox}
+
+
+.. _v4l2-hevc-level:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LEVEL``
+ (enum)
+
+enum v4l2_mpeg_video_hevc_level -
+ Selects the desired level for HEVC encoder.
+
+.. raw:: latex
+
+ \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+ :header-rows: 0
+ :stub-columns: 0
+
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_1``
+ - Level 1.0
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2``
+ - Level 2.0
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1``
+ - Level 2.1
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3``
+ - Level 3.0
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1``
+ - Level 3.1
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4``
+ - Level 4.0
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1``
+ - Level 4.1
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5``
+ - Level 5.0
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1``
+ - Level 5.1
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2``
+ - Level 5.2
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6``
+ - Level 6.0
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1``
+ - Level 6.1
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2``
+ - Level 6.2
+
+.. raw:: latex
+
+ \end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION (integer)``
+ Indicates the number of evenly spaced subintervals, called ticks, within
+ one second. This is a 16bit unsigned integer and has a maximum value up to
+ 0xffff.
+
+.. _v4l2-hevc-tier-flag:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG``
+ (enum)
+
+enum v4l2_mpeg_video_hevc_tier_flag -
+ TIER_FLAG specifies tiers information of the HEVC encoded picture. Tier
+ were made to deal with applications that differ in terms of maximum bit
+ rate. Setting the flag to 0 selects HEVC tier_flag as Main tier and setting
+ this flag to 1 indicates High tier. High tier is for applications requiring
+ high bit rates.
+
+.. raw:: latex
+
+ \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+ :header-rows: 0
+ :stub-columns: 0
+
+ * - ``V4L2_MPEG_VIDEO_HEVC_TIER_MAIN``
+ - Main tier.
+ * - ``V4L2_MPEG_VIDEO_HEVC_TIER_HIGH``
+ - High tier.
+
+.. raw:: latex
+
+ \end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH (integer)``
+ Selects HEVC maximum coding unit depth.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LF (boolean)``
+ Indicates loop filtering. Control value 1 indicates loop filtering
+ is enabled and when set to 0 indicates loop filtering is disabled.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY (boolean)``
+ Selects whether to apply the loop filter across the slice boundary or not.
+ If the value is 0, loop filter will not be applied across the slice boundary.
+ If the value is 1, loop filter will be applied across the slice boundary.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (integer)``
+ Selects HEVC loop filter beta offset. The valid range is [-6, +6].
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (integer)``
+ Selects HEVC loop filter tc offset. The valid range is [-6, +6].
+
+.. _v4l2-hevc-refresh-type:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE``
+ (enum)
+
+enum v4l2_mpeg_video_hevc_hier_refresh_type -
+ Selects refresh type for HEVC encoder.
+ Host has to specify the period into
+ HEVC_REFRESH_PERIOD.
+
+.. raw:: latex
+
+ \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+ :header-rows: 0
+ :stub-columns: 0
+
+ * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE``
+ - Use the B frame for hierarchical coding.
+ * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA``
+ - Use CRA (Clean Random Access Unit) picture encoding.
+ * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR``
+ - Use IDR picture encoding.
+
+.. raw:: latex
+
+ \end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD (integer)``
+ Selects the refresh period for HEVC encoder.
+ This specifies the number of I pictures between two CRA/IDR pictures.
+ This is valid only if REFRESH_TYPE is not 0.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU (boolean)``
+ Indicates HEVC lossless encoding. Setting it to 0 disables lossless
+ encoding. Setting it to 1 enables lossless encoding.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED (boolean)``
+ Indicates constant intra prediction for HEVC encoder. Specifies the
+ constrained intra prediction in which intra largest coding unit (LCU)
+ prediction is performed by using residual data and decoded samples of
+ neighboring intra LCU only. Setting the value to 1 enables constant intra
+ prediction and setting the value to 0 disables constant inta prediction.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT (boolean)``
+ Indicates wavefront parallel processing for HEVC encoder. Setting it to 0
+ disables the feature and setting it to 1 enables the wavefront parallel
+ processing.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB (boolean)``
+ Setting the value to 1 enables combination of P and B frame for HEVC
+ encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID (boolean)``
+ Indicates temporal identifier for HEVC encoder which is enabled by
+ setting the value to 1.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING (boolean)``
+ Indicates bi-linear interpolation is conditionally used in the intra
+ prediction filtering process in the CVS when set to 1. Indicates bi-linear
+ interpolation is not used in the CVS when set to 0.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1 (integer)``
+ Indicates maximum number of merge candidate motion vectors.
+ Values are from zero to four.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION (boolean)``
+ Indicates temporal motion vector prediction for HEVC encoder. Setting it to
+ 1 enables the prediction. Setting it to 0 disables the prediction.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE (boolean)``
+ Specifies if HEVC generates a stream with a size of the length field
+ instead of start code pattern. The size of the length field is configurable
+ through the V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD control. Setting
+ the value to 0 disables encoding without startcode pattern. Setting the
+ value to 1 will enables encoding without startcode pattern.
+
+.. _v4l2-hevc-size-of-length-field:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD``
+(enum)
+
+enum v4l2_mpeg_video_hevc_size_of_length_field -
+ Indicates the size of length field.
+ This is valid when encoding WITHOUT_STARTCODE_ENABLE is enabled.
+
+.. raw:: latex
+
+ \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+ :header-rows: 0
+ :stub-columns: 0
+
+ * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_0``
+ - Generate start code pattern (Normal).
+ * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_1``
+ - Generate size of length field instead of start code pattern and length is 1.
+ * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_2``
+ - Generate size of length field instead of start code pattern and length is 2.
+ * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_4``
+ - Generate size of length field instead of start code pattern and length is 4.
+
+.. raw:: latex
+
+ \end{adjustbox}
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR (integer)``
+ Indicates bit rate for hierarchical coding layer 0 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR (integer)``
+ Indicates bit rate for hierarchical coding layer 1 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR (integer)``
+ Indicates bit rate for hierarchical coding layer 2 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR (integer)``
+ Indicates bit rate for hierarchical coding layer 3 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR (integer)``
+ Indicates bit rate for hierarchical coding layer 4 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR (integer)``
+ Indicates bit rate for hierarchical coding layer 5 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR (integer)``
+ Indicates bit rate for hierarchical coding layer 6 for HEVC encoder.
+
+
+MFC 10.10 MPEG Controls
+-----------------------
+
+The following MPEG class controls deal with MPEG decoding and encoding
+settings that are specific to the Multi Format Codec 10.10 device present
+in the S5P and Exynos family of SoCs by Samsung.
+
+
+.. _mfc1010-control-id:
+
+MFC 10.10 Control IDs
+^^^^^^^^^^^^^^^^^^^^^
+
+``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (integer)``
+ Selects number of P reference pictures required for HEVC encoder.
+ P-Frame can use 1 or 2 frames for reference.
+
+``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (integer)``
+ Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
+ disables generating SPS and PPS at every IDR. Setting it to one enables
+ generating SPS and PPS at every IDR.
+
+
.. _camera-controls:
Camera Control Reference
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
@ 2017-06-19 5:10 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-19 5:10 UTC (permalink / raw)
To: linux-arm-kernel
Added V4l2 controls for HEVC encoder
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
---
Documentation/media/uapi/v4l/extended-controls.rst | 364 +++++++++++++++++++++
1 file changed, 364 insertions(+)
diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
index abb1057..7767c70 100644
--- a/Documentation/media/uapi/v4l/extended-controls.rst
+++ b/Documentation/media/uapi/v4l/extended-controls.rst
@@ -1960,6 +1960,370 @@ enum v4l2_vp8_golden_frame_sel -
1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
+High Efficiency Video Coding (HEVC/H.265) Control Reference
+-----------------------------------------------------------
+
+The HEVC/H.265 controls include controls for encoding parameters of HEVC/H.265
+video codec.
+
+
+.. _hevc-control-id:
+
+HEVC/H.265 Control IDs
+^^^^^^^^^^^^^^^^^^^^^^
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP (integer)``
+ Minimum quantization parameter for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP (integer)``
+ Maximum quantization parameter for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP (integer)``
+ Quantization parameter for an I frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP (integer)``
+ Quantization parameter for a P frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP (integer)``
+ Quantization parameter for a B frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP (boolean)``
+ HIERARCHICAL_QP allows host to specify the quantization parameter values
+ for each temporal layer through HIERARCHICAL_QP_LAYER. This is valid only
+ if HIERARCHICAL_CODING_LAYER is greater than 1. Setting the control value
+ to 1 enables setting of the QP values for the layers.
+
+.. _v4l2-hevc-hier-coding-type:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE``
+ (enum)
+
+enum v4l2_mpeg_video_hevc_hier_coding_type -
+ Selects the hierarchical coding type for encoding. Possible values are:
+
+.. raw:: latex
+
+ \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+ :header-rows: 0
+ :stub-columns: 0
+
+ * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B``
+ - Use the B frame for hierarchical coding.
+ * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P``
+ - Use the P frame for hierarchical coding.
+
+.. raw:: latex
+
+ \end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (integer)``
+ Selects the hierarchical coding layer. In normal encoding
+ (non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
+ 0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
+ LAYER 1 and so on.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP (integer)``
+ Indicates the hierarchical coding layer quantization parameter.
+ For HEVC it can have a value of 0-51. Hence in the control value passed
+ the LSB 16 bits will indicate the quantization parameter. The MSB 16 bit
+ will pass the layer(0-6) it is meant for.
+
+.. _v4l2-hevc-profile:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
+ (enum)
+
+enum v4l2_mpeg_video_hevc_profile -
+ Select the desired profile for HEVC encoder.
+
+.. raw:: latex
+
+ \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+ :header-rows: 0
+ :stub-columns: 0
+
+ * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
+ - Main profile.
+ * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
+ - Main still picture profile.
+
+.. raw:: latex
+
+ \end{adjustbox}
+
+
+.. _v4l2-hevc-level:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LEVEL``
+ (enum)
+
+enum v4l2_mpeg_video_hevc_level -
+ Selects the desired level for HEVC encoder.
+
+.. raw:: latex
+
+ \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+ :header-rows: 0
+ :stub-columns: 0
+
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_1``
+ - Level 1.0
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2``
+ - Level 2.0
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1``
+ - Level 2.1
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3``
+ - Level 3.0
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1``
+ - Level 3.1
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4``
+ - Level 4.0
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1``
+ - Level 4.1
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5``
+ - Level 5.0
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1``
+ - Level 5.1
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2``
+ - Level 5.2
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6``
+ - Level 6.0
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1``
+ - Level 6.1
+ * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2``
+ - Level 6.2
+
+.. raw:: latex
+
+ \end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION (integer)``
+ Indicates the number of evenly spaced subintervals, called ticks, within
+ one second. This is a 16bit unsigned integer and has a maximum value up to
+ 0xffff.
+
+.. _v4l2-hevc-tier-flag:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG``
+ (enum)
+
+enum v4l2_mpeg_video_hevc_tier_flag -
+ TIER_FLAG specifies tiers information of the HEVC encoded picture. Tier
+ were made to deal with applications that differ in terms of maximum bit
+ rate. Setting the flag to 0 selects HEVC tier_flag as Main tier and setting
+ this flag to 1 indicates High tier. High tier is for applications requiring
+ high bit rates.
+
+.. raw:: latex
+
+ \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+ :header-rows: 0
+ :stub-columns: 0
+
+ * - ``V4L2_MPEG_VIDEO_HEVC_TIER_MAIN``
+ - Main tier.
+ * - ``V4L2_MPEG_VIDEO_HEVC_TIER_HIGH``
+ - High tier.
+
+.. raw:: latex
+
+ \end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH (integer)``
+ Selects HEVC maximum coding unit depth.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LF (boolean)``
+ Indicates loop filtering. Control value 1 indicates loop filtering
+ is enabled and when set to 0 indicates loop filtering is disabled.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY (boolean)``
+ Selects whether to apply the loop filter across the slice boundary or not.
+ If the value is 0, loop filter will not be applied across the slice boundary.
+ If the value is 1, loop filter will be applied across the slice boundary.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (integer)``
+ Selects HEVC loop filter beta offset. The valid range is [-6, +6].
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (integer)``
+ Selects HEVC loop filter tc offset. The valid range is [-6, +6].
+
+.. _v4l2-hevc-refresh-type:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE``
+ (enum)
+
+enum v4l2_mpeg_video_hevc_hier_refresh_type -
+ Selects refresh type for HEVC encoder.
+ Host has to specify the period into
+ HEVC_REFRESH_PERIOD.
+
+.. raw:: latex
+
+ \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+ :header-rows: 0
+ :stub-columns: 0
+
+ * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE``
+ - Use the B frame for hierarchical coding.
+ * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA``
+ - Use CRA (Clean Random Access Unit) picture encoding.
+ * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR``
+ - Use IDR picture encoding.
+
+.. raw:: latex
+
+ \end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD (integer)``
+ Selects the refresh period for HEVC encoder.
+ This specifies the number of I pictures between two CRA/IDR pictures.
+ This is valid only if REFRESH_TYPE is not 0.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU (boolean)``
+ Indicates HEVC lossless encoding. Setting it to 0 disables lossless
+ encoding. Setting it to 1 enables lossless encoding.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED (boolean)``
+ Indicates constant intra prediction for HEVC encoder. Specifies the
+ constrained intra prediction in which intra largest coding unit (LCU)
+ prediction is performed by using residual data and decoded samples of
+ neighboring intra LCU only. Setting the value to 1 enables constant intra
+ prediction and setting the value to 0 disables constant inta prediction.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT (boolean)``
+ Indicates wavefront parallel processing for HEVC encoder. Setting it to 0
+ disables the feature and setting it to 1 enables the wavefront parallel
+ processing.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB (boolean)``
+ Setting the value to 1 enables combination of P and B frame for HEVC
+ encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID (boolean)``
+ Indicates temporal identifier for HEVC encoder which is enabled by
+ setting the value to 1.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING (boolean)``
+ Indicates bi-linear interpolation is conditionally used in the intra
+ prediction filtering process in the CVS when set to 1. Indicates bi-linear
+ interpolation is not used in the CVS when set to 0.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1 (integer)``
+ Indicates maximum number of merge candidate motion vectors.
+ Values are from zero to four.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION (boolean)``
+ Indicates temporal motion vector prediction for HEVC encoder. Setting it to
+ 1 enables the prediction. Setting it to 0 disables the prediction.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE (boolean)``
+ Specifies if HEVC generates a stream with a size of the length field
+ instead of start code pattern. The size of the length field is configurable
+ through the V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD control. Setting
+ the value to 0 disables encoding without startcode pattern. Setting the
+ value to 1 will enables encoding without startcode pattern.
+
+.. _v4l2-hevc-size-of-length-field:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD``
+(enum)
+
+enum v4l2_mpeg_video_hevc_size_of_length_field -
+ Indicates the size of length field.
+ This is valid when encoding WITHOUT_STARTCODE_ENABLE is enabled.
+
+.. raw:: latex
+
+ \begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+ :header-rows: 0
+ :stub-columns: 0
+
+ * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_0``
+ - Generate start code pattern (Normal).
+ * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_1``
+ - Generate size of length field instead of start code pattern and length is 1.
+ * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_2``
+ - Generate size of length field instead of start code pattern and length is 2.
+ * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_4``
+ - Generate size of length field instead of start code pattern and length is 4.
+
+.. raw:: latex
+
+ \end{adjustbox}
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR (integer)``
+ Indicates bit rate for hierarchical coding layer 0 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR (integer)``
+ Indicates bit rate for hierarchical coding layer 1 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR (integer)``
+ Indicates bit rate for hierarchical coding layer 2 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR (integer)``
+ Indicates bit rate for hierarchical coding layer 3 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR (integer)``
+ Indicates bit rate for hierarchical coding layer 4 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR (integer)``
+ Indicates bit rate for hierarchical coding layer 5 for HEVC encoder.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR (integer)``
+ Indicates bit rate for hierarchical coding layer 6 for HEVC encoder.
+
+
+MFC 10.10 MPEG Controls
+-----------------------
+
+The following MPEG class controls deal with MPEG decoding and encoding
+settings that are specific to the Multi Format Codec 10.10 device present
+in the S5P and Exynos family of SoCs by Samsung.
+
+
+.. _mfc1010-control-id:
+
+MFC 10.10 Control IDs
+^^^^^^^^^^^^^^^^^^^^^
+
+``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (integer)``
+ Selects number of P reference pictures required for HEVC encoder.
+ P-Frame can use 1 or 2 frames for reference.
+
+``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (integer)``
+ Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
+ disables generating SPS and PPS at every IDR. Setting it to one enables
+ generating SPS and PPS at every IDR.
+
+
.. _camera-controls:
Camera Control Reference
--
2.7.4
^ permalink raw reply related [flat|nested] 68+ messages in thread
* Re: [Patch v5 04/12] [media] s5p-mfc: Support MFCv10.10 buffer requirements
2017-06-19 5:10 ` Smitha T Murthy
@ 2017-06-27 20:30 ` Kamil Debski
-1 siblings, 0 replies; 68+ messages in thread
From: Kamil Debski @ 2017-06-27 20:30 UTC (permalink / raw)
To: Smitha T Murthy
Cc: linux-arm-kernel, linux-media, linux-kernel, Kyungmin Park,
jtp.park, a.hajda, mchehab, pankaj.dubey, krzk, Marek Szyprowski,
Sylwester Nawrocki
Hi,
Please find my comments inline.
On 19 June 2017 at 07:10, Smitha T Murthy <smitha.t@samsung.com> wrote:
> Aligning the luma_dpb_size, chroma_dpb_size, mv_size and me_buffer_size
> for MFCv10.10.
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
> drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 19 +++++
> drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 95 +++++++++++++++++++------
> drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 2 +
> 3 files changed, 95 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> index 1ca09d6..3f0dab3 100644
> --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> @@ -32,5 +32,24 @@
> #define MFC_VERSION_V10 0xA0
> #define MFC_NUM_PORTS_V10 1
>
> +/* MFCv10 codec defines*/
> +#define S5P_FIMV_CODEC_HEVC_ENC 26
> +
> +/* Encoder buffer size for MFC v10.0 */
> +#define ENC_V100_BASE_SIZE(x, y) \
> + (((x + 3) * (y + 3) * 8) \
> + + ((y * 64) + 1280) * DIV_ROUND_UP(x, 8))
> +
> +#define ENC_V100_H264_ME_SIZE(x, y) \
> + (ENC_V100_BASE_SIZE(x, y) \
> + + (DIV_ROUND_UP(x * y, 64) * 32))
> +
> +#define ENC_V100_MPEG4_ME_SIZE(x, y) \
> + (ENC_V100_BASE_SIZE(x, y) \
> + + (DIV_ROUND_UP(x * y, 128) * 16))
> +
> +#define ENC_V100_VP8_ME_SIZE(x, y) \
> + ENC_V100_BASE_SIZE(x, y)
> +
> #endif /*_REGS_MFC_V10_H*/
>
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> index f1a8c53..83ea733 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> @@ -64,6 +64,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> {
> struct s5p_mfc_dev *dev = ctx->dev;
> unsigned int mb_width, mb_height;
> + unsigned int lcu_width = 0, lcu_height = 0;
> int ret;
>
> mb_width = MB_WIDTH(ctx->img_width);
> @@ -74,7 +75,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> ctx->luma_size, ctx->chroma_size, ctx->mv_size);
> mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
> } else if (ctx->type == MFCINST_ENCODER) {
> - if (IS_MFCV8_PLUS(dev))
> + if (IS_MFCV10(dev)) {IZE_V10 (15 * SZ_1K)
> + ctx->tmv_buffer_size = 0;
It would look much better to surround the above with braces, even
though it's only a single line.
> + } else if (IS_MFCV8_PLUS(dev))
> ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
> ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
> S5P_FIMV_TMV_BUFFER_ALIGN_V6);
> @@ -82,13 +85,36 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
> ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V6(mb_width, mb_height),
> S5P_FIMV_TMV_BUFFER_ALIGN_V6);
> -
> - ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
> - S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
> - S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
> - ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
> - S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
> - S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
> + if (IS_MFCV10(dev)) {
> + lcu_width = enc_lcu_width(ctx->img_width);
> + lcu_height = enc_lcu_height(ctx->img_height);
> + if (ctx->codec_mode != S5P_FIMV_CODEC_HEVC_ENC) {
> + ctx->luma_dpb_size =
> + ALIGN((mb_width * 16), 64)
> + * ALIGN((mb_height * 16), 32)
> + + 64;
> + ctx->chroma_dpb_size =
> + ALIGN((mb_width * 16), 64)
> + * (mb_height * 8)
> + + 64;
> + } else {
> + ctx->luma_dpb_size =
> + ALIGN((lcu_width * 32), 64)
> + * ALIGN((lcu_height * 32), 32)
> + + 64;
> + ctx->chroma_dpb_size =
> + ALIGN((lcu_width * 32), 64)
> + * (lcu_height * 16)
> + + 64;
> + }
> + } else {
> + ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
> + S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
> + S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
> + ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
> + S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
> + S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
> + }
> if (IS_MFCV8_PLUS(dev))
> ctx->me_buffer_size = ALIGN(S5P_FIMV_ME_BUFFER_SIZE_V8(
> ctx->img_width, ctx->img_height,
> @@ -197,6 +223,8 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> case S5P_MFC_CODEC_H264_ENC:
> if (IS_MFCV10(dev)) {
> mfc_debug(2, "Use min scratch buffer size\n");
> + ctx->me_buffer_size =
> + ALIGN(ENC_V100_H264_ME_SIZE(mb_width, mb_height), 16);
> } else if (IS_MFCV8_PLUS(dev))
> ctx->scratch_buf_size =
> S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8(
> @@ -219,6 +247,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> case S5P_MFC_CODEC_H263_ENC:
> if (IS_MFCV10(dev)) {
> mfc_debug(2, "Use min scratch buffer size\n");
> + ctx->me_buffer_size =
> + ALIGN(ENC_V100_MPEG4_ME_SIZE(mb_width,
> + mb_height), 16);
> } else
> ctx->scratch_buf_size =
> S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(
> @@ -235,7 +266,10 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> case S5P_MFC_CODEC_VP8_ENC:
> if (IS_MFCV10(dev)) {
> mfc_debug(2, "Use min scratch buffer size\n");
> - } else if (IS_MFCV8_PLUS(dev))
> + ctx->me_buffer_size =
> + ALIGN(ENC_V100_VP8_ME_SIZE(mb_width, mb_height),
> + 16);
> + } else if (IS_MFCV8_PLUS(dev))
> ctx->scratch_buf_size =
> S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8(
> mb_width,
> @@ -393,13 +427,13 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
>
> if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
> ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
> - if (IS_MFCV10(dev))
> + if (IS_MFCV10(dev)) {
> ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width,
> ctx->img_height);
> - else
> + } else {
> ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
> ctx->img_height);
> - ctx->mv_size = ALIGN(ctx->mv_size, 16);
> + }
> } else {
> ctx->mv_size = 0;
> }
> @@ -596,15 +630,34 @@ static int s5p_mfc_set_enc_ref_buffer_v6(struct s5p_mfc_ctx *ctx)
>
> mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1);
>
> - for (i = 0; i < ctx->pb_count; i++) {
> - writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
> - buf_addr1 += ctx->luma_dpb_size;
> - writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
> - buf_addr1 += ctx->chroma_dpb_size;
> - writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
> - buf_addr1 += ctx->me_buffer_size;
> - buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size +
> - ctx->me_buffer_size);
> + if (IS_MFCV10(dev)) {
> + /* start address of per buffer is aligned */
> + for (i = 0; i < ctx->pb_count; i++) {
> + writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
> + buf_addr1 += ctx->luma_dpb_size;
> + buf_size1 -= ctx->luma_dpb_size;
> + }
> + for (i = 0; i < ctx->pb_count; i++) {
> + writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
> + buf_addr1 += ctx->chroma_dpb_size;
> + buf_size1 -= ctx->chroma_dpb_size;
> + }
> + for (i = 0; i < ctx->pb_count; i++) {
> + writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
> + buf_addr1 += ctx->me_buffer_size;
> + buf_size1 -= ctx->me_buffer_size;
> + }
> + } else {
> + for (i = 0; i < ctx->pb_count; i++) {
> + writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
> + buf_addr1 += ctx->luma_dpb_size;
> + writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
> + buf_addr1 += ctx->chroma_dpb_size;
> + writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
> + buf_addr1 += ctx->me_buffer_size;
> + buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size
> + + ctx->me_buffer_size);
> + }
> }
>
> writel(buf_addr1, mfc_regs->e_scratch_buffer_addr);
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> index 021b8db..975bbc5 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> @@ -26,6 +26,8 @@
> (((MB_HEIGHT(y)+1)/2)*2) * 64 + 128)
> #define S5P_MFC_DEC_MV_SIZE_V10(x, y) (MB_WIDTH(x) * \
> (((MB_HEIGHT(y)+1)/2)*2) * 64 + 512)
> +#define enc_lcu_width(x_size) DIV_ROUND_UP(x_size, 32)
> +#define enc_lcu_height(y_size) DIV_ROUND_UP(y_size, 32)
Why is this in lower case? Maybe S5P_MFC_LCU_WIDTH/HEIGHT would be better?
>
> /* Definition */
> #define ENC_MULTI_SLICE_MB_MAX ((1 << 30) - 1)
> --
> 2.7.4
>
Apart from the above, it looks good to me.
Acked-by: Kamil Debski <kamil@wypas.org>
Best wishes,
Kamil Debski
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 04/12] [media] s5p-mfc: Support MFCv10.10 buffer requirements
@ 2017-06-27 20:30 ` Kamil Debski
0 siblings, 0 replies; 68+ messages in thread
From: Kamil Debski @ 2017-06-27 20:30 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
Please find my comments inline.
On 19 June 2017 at 07:10, Smitha T Murthy <smitha.t@samsung.com> wrote:
> Aligning the luma_dpb_size, chroma_dpb_size, mv_size and me_buffer_size
> for MFCv10.10.
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
> drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 19 +++++
> drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 95 +++++++++++++++++++------
> drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 2 +
> 3 files changed, 95 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> index 1ca09d6..3f0dab3 100644
> --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> @@ -32,5 +32,24 @@
> #define MFC_VERSION_V10 0xA0
> #define MFC_NUM_PORTS_V10 1
>
> +/* MFCv10 codec defines*/
> +#define S5P_FIMV_CODEC_HEVC_ENC 26
> +
> +/* Encoder buffer size for MFC v10.0 */
> +#define ENC_V100_BASE_SIZE(x, y) \
> + (((x + 3) * (y + 3) * 8) \
> + + ((y * 64) + 1280) * DIV_ROUND_UP(x, 8))
> +
> +#define ENC_V100_H264_ME_SIZE(x, y) \
> + (ENC_V100_BASE_SIZE(x, y) \
> + + (DIV_ROUND_UP(x * y, 64) * 32))
> +
> +#define ENC_V100_MPEG4_ME_SIZE(x, y) \
> + (ENC_V100_BASE_SIZE(x, y) \
> + + (DIV_ROUND_UP(x * y, 128) * 16))
> +
> +#define ENC_V100_VP8_ME_SIZE(x, y) \
> + ENC_V100_BASE_SIZE(x, y)
> +
> #endif /*_REGS_MFC_V10_H*/
>
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> index f1a8c53..83ea733 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> @@ -64,6 +64,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> {
> struct s5p_mfc_dev *dev = ctx->dev;
> unsigned int mb_width, mb_height;
> + unsigned int lcu_width = 0, lcu_height = 0;
> int ret;
>
> mb_width = MB_WIDTH(ctx->img_width);
> @@ -74,7 +75,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> ctx->luma_size, ctx->chroma_size, ctx->mv_size);
> mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
> } else if (ctx->type == MFCINST_ENCODER) {
> - if (IS_MFCV8_PLUS(dev))
> + if (IS_MFCV10(dev)) {IZE_V10 (15 * SZ_1K)
> + ctx->tmv_buffer_size = 0;
It would look much better to surround the above with braces, even
though it's only a single line.
> + } else if (IS_MFCV8_PLUS(dev))
> ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
> ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
> S5P_FIMV_TMV_BUFFER_ALIGN_V6);
> @@ -82,13 +85,36 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
> ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V6(mb_width, mb_height),
> S5P_FIMV_TMV_BUFFER_ALIGN_V6);
> -
> - ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
> - S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
> - S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
> - ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
> - S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
> - S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
> + if (IS_MFCV10(dev)) {
> + lcu_width = enc_lcu_width(ctx->img_width);
> + lcu_height = enc_lcu_height(ctx->img_height);
> + if (ctx->codec_mode != S5P_FIMV_CODEC_HEVC_ENC) {
> + ctx->luma_dpb_size =
> + ALIGN((mb_width * 16), 64)
> + * ALIGN((mb_height * 16), 32)
> + + 64;
> + ctx->chroma_dpb_size =
> + ALIGN((mb_width * 16), 64)
> + * (mb_height * 8)
> + + 64;
> + } else {
> + ctx->luma_dpb_size =
> + ALIGN((lcu_width * 32), 64)
> + * ALIGN((lcu_height * 32), 32)
> + + 64;
> + ctx->chroma_dpb_size =
> + ALIGN((lcu_width * 32), 64)
> + * (lcu_height * 16)
> + + 64;
> + }
> + } else {
> + ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
> + S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
> + S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
> + ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
> + S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
> + S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
> + }
> if (IS_MFCV8_PLUS(dev))
> ctx->me_buffer_size = ALIGN(S5P_FIMV_ME_BUFFER_SIZE_V8(
> ctx->img_width, ctx->img_height,
> @@ -197,6 +223,8 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> case S5P_MFC_CODEC_H264_ENC:
> if (IS_MFCV10(dev)) {
> mfc_debug(2, "Use min scratch buffer size\n");
> + ctx->me_buffer_size =
> + ALIGN(ENC_V100_H264_ME_SIZE(mb_width, mb_height), 16);
> } else if (IS_MFCV8_PLUS(dev))
> ctx->scratch_buf_size =
> S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8(
> @@ -219,6 +247,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> case S5P_MFC_CODEC_H263_ENC:
> if (IS_MFCV10(dev)) {
> mfc_debug(2, "Use min scratch buffer size\n");
> + ctx->me_buffer_size =
> + ALIGN(ENC_V100_MPEG4_ME_SIZE(mb_width,
> + mb_height), 16);
> } else
> ctx->scratch_buf_size =
> S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(
> @@ -235,7 +266,10 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> case S5P_MFC_CODEC_VP8_ENC:
> if (IS_MFCV10(dev)) {
> mfc_debug(2, "Use min scratch buffer size\n");
> - } else if (IS_MFCV8_PLUS(dev))
> + ctx->me_buffer_size =
> + ALIGN(ENC_V100_VP8_ME_SIZE(mb_width, mb_height),
> + 16);
> + } else if (IS_MFCV8_PLUS(dev))
> ctx->scratch_buf_size =
> S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8(
> mb_width,
> @@ -393,13 +427,13 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
>
> if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
> ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
> - if (IS_MFCV10(dev))
> + if (IS_MFCV10(dev)) {
> ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width,
> ctx->img_height);
> - else
> + } else {
> ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
> ctx->img_height);
> - ctx->mv_size = ALIGN(ctx->mv_size, 16);
> + }
> } else {
> ctx->mv_size = 0;
> }
> @@ -596,15 +630,34 @@ static int s5p_mfc_set_enc_ref_buffer_v6(struct s5p_mfc_ctx *ctx)
>
> mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1);
>
> - for (i = 0; i < ctx->pb_count; i++) {
> - writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
> - buf_addr1 += ctx->luma_dpb_size;
> - writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
> - buf_addr1 += ctx->chroma_dpb_size;
> - writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
> - buf_addr1 += ctx->me_buffer_size;
> - buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size +
> - ctx->me_buffer_size);
> + if (IS_MFCV10(dev)) {
> + /* start address of per buffer is aligned */
> + for (i = 0; i < ctx->pb_count; i++) {
> + writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
> + buf_addr1 += ctx->luma_dpb_size;
> + buf_size1 -= ctx->luma_dpb_size;
> + }
> + for (i = 0; i < ctx->pb_count; i++) {
> + writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
> + buf_addr1 += ctx->chroma_dpb_size;
> + buf_size1 -= ctx->chroma_dpb_size;
> + }
> + for (i = 0; i < ctx->pb_count; i++) {
> + writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
> + buf_addr1 += ctx->me_buffer_size;
> + buf_size1 -= ctx->me_buffer_size;
> + }
> + } else {
> + for (i = 0; i < ctx->pb_count; i++) {
> + writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
> + buf_addr1 += ctx->luma_dpb_size;
> + writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
> + buf_addr1 += ctx->chroma_dpb_size;
> + writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
> + buf_addr1 += ctx->me_buffer_size;
> + buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size
> + + ctx->me_buffer_size);
> + }
> }
>
> writel(buf_addr1, mfc_regs->e_scratch_buffer_addr);
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> index 021b8db..975bbc5 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> @@ -26,6 +26,8 @@
> (((MB_HEIGHT(y)+1)/2)*2) * 64 + 128)
> #define S5P_MFC_DEC_MV_SIZE_V10(x, y) (MB_WIDTH(x) * \
> (((MB_HEIGHT(y)+1)/2)*2) * 64 + 512)
> +#define enc_lcu_width(x_size) DIV_ROUND_UP(x_size, 32)
> +#define enc_lcu_height(y_size) DIV_ROUND_UP(y_size, 32)
Why is this in lower case? Maybe S5P_MFC_LCU_WIDTH/HEIGHT would be better?
>
> /* Definition */
> #define ENC_MULTI_SLICE_MB_MAX ((1 << 30) - 1)
> --
> 2.7.4
>
Apart from the above, it looks good to me.
Acked-by: Kamil Debski <kamil@wypas.org>
Best wishes,
Kamil Debski
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 04/12] [media] s5p-mfc: Support MFCv10.10 buffer requirements
2017-06-27 20:30 ` Kamil Debski
@ 2017-06-28 5:06 ` Smitha T Murthy
-1 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-28 5:06 UTC (permalink / raw)
To: Kamil Debski
Cc: linux-arm-kernel, linux-media, linux-kernel, Kyungmin Park,
jtp.park, a.hajda, mchehab, pankaj.dubey, krzk, Marek Szyprowski,
Sylwester Nawrocki
On Tue, 2017-06-27 at 22:30 +0200, Kamil Debski wrote:
> Hi,
>
> Please find my comments inline.
>
> On 19 June 2017 at 07:10, Smitha T Murthy <smitha.t@samsung.com> wrote:
> > Aligning the luma_dpb_size, chroma_dpb_size, mv_size and me_buffer_size
> > for MFCv10.10.
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> > ---
> > drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 19 +++++
> > drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 95 +++++++++++++++++++------
> > drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 2 +
> > 3 files changed, 95 insertions(+), 21 deletions(-)
> >
> > diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > index 1ca09d6..3f0dab3 100644
> > --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > @@ -32,5 +32,24 @@
> > #define MFC_VERSION_V10 0xA0
> > #define MFC_NUM_PORTS_V10 1
> >
> > +/* MFCv10 codec defines*/
> > +#define S5P_FIMV_CODEC_HEVC_ENC 26
> > +
> > +/* Encoder buffer size for MFC v10.0 */
> > +#define ENC_V100_BASE_SIZE(x, y) \
> > + (((x + 3) * (y + 3) * 8) \
> > + + ((y * 64) + 1280) * DIV_ROUND_UP(x, 8))
> > +
> > +#define ENC_V100_H264_ME_SIZE(x, y) \
> > + (ENC_V100_BASE_SIZE(x, y) \
> > + + (DIV_ROUND_UP(x * y, 64) * 32))
> > +
> > +#define ENC_V100_MPEG4_ME_SIZE(x, y) \
> > + (ENC_V100_BASE_SIZE(x, y) \
> > + + (DIV_ROUND_UP(x * y, 128) * 16))
> > +
> > +#define ENC_V100_VP8_ME_SIZE(x, y) \
> > + ENC_V100_BASE_SIZE(x, y)
> > +
> > #endif /*_REGS_MFC_V10_H*/
> >
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> > index f1a8c53..83ea733 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> > @@ -64,6 +64,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> > {
> > struct s5p_mfc_dev *dev = ctx->dev;
> > unsigned int mb_width, mb_height;
> > + unsigned int lcu_width = 0, lcu_height = 0;
> > int ret;
> >
> > mb_width = MB_WIDTH(ctx->img_width);
> > @@ -74,7 +75,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> > ctx->luma_size, ctx->chroma_size, ctx->mv_size);
> > mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
> > } else if (ctx->type == MFCINST_ENCODER) {
> > - if (IS_MFCV8_PLUS(dev))
> > + if (IS_MFCV10(dev)) {IZE_V10 (15 * SZ_1K)
> > + ctx->tmv_buffer_size = 0;
>
> It would look much better to surround the above with braces, even
> though it's only a single line.
>
I will add the braces in the next version.
> > + } else if (IS_MFCV8_PLUS(dev))
> > ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
> > ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
> > S5P_FIMV_TMV_BUFFER_ALIGN_V6);
> > @@ -82,13 +85,36 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> > ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
> > ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V6(mb_width, mb_height),
> > S5P_FIMV_TMV_BUFFER_ALIGN_V6);
> > -
> > - ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
> > - S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
> > - S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
> > - ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
> > - S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
> > - S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
> > + if (IS_MFCV10(dev)) {
> > + lcu_width = enc_lcu_width(ctx->img_width);
> > + lcu_height = enc_lcu_height(ctx->img_height);
> > + if (ctx->codec_mode != S5P_FIMV_CODEC_HEVC_ENC) {
> > + ctx->luma_dpb_size =
> > + ALIGN((mb_width * 16), 64)
> > + * ALIGN((mb_height * 16), 32)
> > + + 64;
> > + ctx->chroma_dpb_size =
> > + ALIGN((mb_width * 16), 64)
> > + * (mb_height * 8)
> > + + 64;
> > + } else {
> > + ctx->luma_dpb_size =
> > + ALIGN((lcu_width * 32), 64)
> > + * ALIGN((lcu_height * 32), 32)
> > + + 64;
> > + ctx->chroma_dpb_size =
> > + ALIGN((lcu_width * 32), 64)
> > + * (lcu_height * 16)
> > + + 64;
> > + }
> > + } else {
> > + ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
> > + S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
> > + S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
> > + ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
> > + S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
> > + S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
> > + }
> > if (IS_MFCV8_PLUS(dev))
> > ctx->me_buffer_size = ALIGN(S5P_FIMV_ME_BUFFER_SIZE_V8(
> > ctx->img_width, ctx->img_height,
> > @@ -197,6 +223,8 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> > case S5P_MFC_CODEC_H264_ENC:
> > if (IS_MFCV10(dev)) {
> > mfc_debug(2, "Use min scratch buffer size\n");
> > + ctx->me_buffer_size =
> > + ALIGN(ENC_V100_H264_ME_SIZE(mb_width, mb_height), 16);
> > } else if (IS_MFCV8_PLUS(dev))
> > ctx->scratch_buf_size =
> > S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8(
> > @@ -219,6 +247,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> > case S5P_MFC_CODEC_H263_ENC:
> > if (IS_MFCV10(dev)) {
> > mfc_debug(2, "Use min scratch buffer size\n");
> > + ctx->me_buffer_size =
> > + ALIGN(ENC_V100_MPEG4_ME_SIZE(mb_width,
> > + mb_height), 16);
> > } else
> > ctx->scratch_buf_size =
> > S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(
> > @@ -235,7 +266,10 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> > case S5P_MFC_CODEC_VP8_ENC:
> > if (IS_MFCV10(dev)) {
> > mfc_debug(2, "Use min scratch buffer size\n");
> > - } else if (IS_MFCV8_PLUS(dev))
> > + ctx->me_buffer_size =
> > + ALIGN(ENC_V100_VP8_ME_SIZE(mb_width, mb_height),
> > + 16);
> > + } else if (IS_MFCV8_PLUS(dev))
> > ctx->scratch_buf_size =
> > S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8(
> > mb_width,
> > @@ -393,13 +427,13 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
> >
> > if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
> > ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
> > - if (IS_MFCV10(dev))
> > + if (IS_MFCV10(dev)) {
> > ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width,
> > ctx->img_height);
> > - else
> > + } else {
> > ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
> > ctx->img_height);
> > - ctx->mv_size = ALIGN(ctx->mv_size, 16);
> > + }
> > } else {
> > ctx->mv_size = 0;
> > }
> > @@ -596,15 +630,34 @@ static int s5p_mfc_set_enc_ref_buffer_v6(struct s5p_mfc_ctx *ctx)
> >
> > mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1);
> >
> > - for (i = 0; i < ctx->pb_count; i++) {
> > - writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
> > - buf_addr1 += ctx->luma_dpb_size;
> > - writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
> > - buf_addr1 += ctx->chroma_dpb_size;
> > - writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
> > - buf_addr1 += ctx->me_buffer_size;
> > - buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size +
> > - ctx->me_buffer_size);
> > + if (IS_MFCV10(dev)) {
> > + /* start address of per buffer is aligned */
> > + for (i = 0; i < ctx->pb_count; i++) {
> > + writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
> > + buf_addr1 += ctx->luma_dpb_size;
> > + buf_size1 -= ctx->luma_dpb_size;
> > + }
> > + for (i = 0; i < ctx->pb_count; i++) {
> > + writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
> > + buf_addr1 += ctx->chroma_dpb_size;
> > + buf_size1 -= ctx->chroma_dpb_size;
> > + }
> > + for (i = 0; i < ctx->pb_count; i++) {
> > + writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
> > + buf_addr1 += ctx->me_buffer_size;
> > + buf_size1 -= ctx->me_buffer_size;
> > + }
> > + } else {
> > + for (i = 0; i < ctx->pb_count; i++) {
> > + writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
> > + buf_addr1 += ctx->luma_dpb_size;
> > + writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
> > + buf_addr1 += ctx->chroma_dpb_size;
> > + writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
> > + buf_addr1 += ctx->me_buffer_size;
> > + buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size
> > + + ctx->me_buffer_size);
> > + }
> > }
> >
> > writel(buf_addr1, mfc_regs->e_scratch_buffer_addr);
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> > index 021b8db..975bbc5 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> > @@ -26,6 +26,8 @@
> > (((MB_HEIGHT(y)+1)/2)*2) * 64 + 128)
> > #define S5P_MFC_DEC_MV_SIZE_V10(x, y) (MB_WIDTH(x) * \
> > (((MB_HEIGHT(y)+1)/2)*2) * 64 + 512)
> > +#define enc_lcu_width(x_size) DIV_ROUND_UP(x_size, 32)
> > +#define enc_lcu_height(y_size) DIV_ROUND_UP(y_size, 32)
>
> Why is this in lower case? Maybe S5P_MFC_LCU_WIDTH/HEIGHT would be better?
>
I will change the name to S5P_MFC_LCU_WIDTH and S5P_MFC_LCU_HEIGHT in
the next patch series.
> >
> > /* Definition */
> > #define ENC_MULTI_SLICE_MB_MAX ((1 << 30) - 1)
> > --
> > 2.7.4
> >
>
> Apart from the above, it looks good to me.
>
> Acked-by: Kamil Debski <kamil@wypas.org>
>
> Best wishes,
> Kamil Debski
>
>
Thank you for the review.
Regards,
Smitha
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 04/12] [media] s5p-mfc: Support MFCv10.10 buffer requirements
@ 2017-06-28 5:06 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-28 5:06 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, 2017-06-27 at 22:30 +0200, Kamil Debski wrote:
> Hi,
>
> Please find my comments inline.
>
> On 19 June 2017 at 07:10, Smitha T Murthy <smitha.t@samsung.com> wrote:
> > Aligning the luma_dpb_size, chroma_dpb_size, mv_size and me_buffer_size
> > for MFCv10.10.
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> > ---
> > drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 19 +++++
> > drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 95 +++++++++++++++++++------
> > drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 2 +
> > 3 files changed, 95 insertions(+), 21 deletions(-)
> >
> > diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > index 1ca09d6..3f0dab3 100644
> > --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > @@ -32,5 +32,24 @@
> > #define MFC_VERSION_V10 0xA0
> > #define MFC_NUM_PORTS_V10 1
> >
> > +/* MFCv10 codec defines*/
> > +#define S5P_FIMV_CODEC_HEVC_ENC 26
> > +
> > +/* Encoder buffer size for MFC v10.0 */
> > +#define ENC_V100_BASE_SIZE(x, y) \
> > + (((x + 3) * (y + 3) * 8) \
> > + + ((y * 64) + 1280) * DIV_ROUND_UP(x, 8))
> > +
> > +#define ENC_V100_H264_ME_SIZE(x, y) \
> > + (ENC_V100_BASE_SIZE(x, y) \
> > + + (DIV_ROUND_UP(x * y, 64) * 32))
> > +
> > +#define ENC_V100_MPEG4_ME_SIZE(x, y) \
> > + (ENC_V100_BASE_SIZE(x, y) \
> > + + (DIV_ROUND_UP(x * y, 128) * 16))
> > +
> > +#define ENC_V100_VP8_ME_SIZE(x, y) \
> > + ENC_V100_BASE_SIZE(x, y)
> > +
> > #endif /*_REGS_MFC_V10_H*/
> >
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> > index f1a8c53..83ea733 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> > @@ -64,6 +64,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> > {
> > struct s5p_mfc_dev *dev = ctx->dev;
> > unsigned int mb_width, mb_height;
> > + unsigned int lcu_width = 0, lcu_height = 0;
> > int ret;
> >
> > mb_width = MB_WIDTH(ctx->img_width);
> > @@ -74,7 +75,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> > ctx->luma_size, ctx->chroma_size, ctx->mv_size);
> > mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
> > } else if (ctx->type == MFCINST_ENCODER) {
> > - if (IS_MFCV8_PLUS(dev))
> > + if (IS_MFCV10(dev)) {IZE_V10 (15 * SZ_1K)
> > + ctx->tmv_buffer_size = 0;
>
> It would look much better to surround the above with braces, even
> though it's only a single line.
>
I will add the braces in the next version.
> > + } else if (IS_MFCV8_PLUS(dev))
> > ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
> > ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
> > S5P_FIMV_TMV_BUFFER_ALIGN_V6);
> > @@ -82,13 +85,36 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> > ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
> > ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V6(mb_width, mb_height),
> > S5P_FIMV_TMV_BUFFER_ALIGN_V6);
> > -
> > - ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
> > - S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
> > - S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
> > - ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
> > - S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
> > - S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
> > + if (IS_MFCV10(dev)) {
> > + lcu_width = enc_lcu_width(ctx->img_width);
> > + lcu_height = enc_lcu_height(ctx->img_height);
> > + if (ctx->codec_mode != S5P_FIMV_CODEC_HEVC_ENC) {
> > + ctx->luma_dpb_size =
> > + ALIGN((mb_width * 16), 64)
> > + * ALIGN((mb_height * 16), 32)
> > + + 64;
> > + ctx->chroma_dpb_size =
> > + ALIGN((mb_width * 16), 64)
> > + * (mb_height * 8)
> > + + 64;
> > + } else {
> > + ctx->luma_dpb_size =
> > + ALIGN((lcu_width * 32), 64)
> > + * ALIGN((lcu_height * 32), 32)
> > + + 64;
> > + ctx->chroma_dpb_size =
> > + ALIGN((lcu_width * 32), 64)
> > + * (lcu_height * 16)
> > + + 64;
> > + }
> > + } else {
> > + ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
> > + S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
> > + S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
> > + ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
> > + S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
> > + S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
> > + }
> > if (IS_MFCV8_PLUS(dev))
> > ctx->me_buffer_size = ALIGN(S5P_FIMV_ME_BUFFER_SIZE_V8(
> > ctx->img_width, ctx->img_height,
> > @@ -197,6 +223,8 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> > case S5P_MFC_CODEC_H264_ENC:
> > if (IS_MFCV10(dev)) {
> > mfc_debug(2, "Use min scratch buffer size\n");
> > + ctx->me_buffer_size =
> > + ALIGN(ENC_V100_H264_ME_SIZE(mb_width, mb_height), 16);
> > } else if (IS_MFCV8_PLUS(dev))
> > ctx->scratch_buf_size =
> > S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8(
> > @@ -219,6 +247,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> > case S5P_MFC_CODEC_H263_ENC:
> > if (IS_MFCV10(dev)) {
> > mfc_debug(2, "Use min scratch buffer size\n");
> > + ctx->me_buffer_size =
> > + ALIGN(ENC_V100_MPEG4_ME_SIZE(mb_width,
> > + mb_height), 16);
> > } else
> > ctx->scratch_buf_size =
> > S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(
> > @@ -235,7 +266,10 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
> > case S5P_MFC_CODEC_VP8_ENC:
> > if (IS_MFCV10(dev)) {
> > mfc_debug(2, "Use min scratch buffer size\n");
> > - } else if (IS_MFCV8_PLUS(dev))
> > + ctx->me_buffer_size =
> > + ALIGN(ENC_V100_VP8_ME_SIZE(mb_width, mb_height),
> > + 16);
> > + } else if (IS_MFCV8_PLUS(dev))
> > ctx->scratch_buf_size =
> > S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8(
> > mb_width,
> > @@ -393,13 +427,13 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
> >
> > if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
> > ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
> > - if (IS_MFCV10(dev))
> > + if (IS_MFCV10(dev)) {
> > ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width,
> > ctx->img_height);
> > - else
> > + } else {
> > ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
> > ctx->img_height);
> > - ctx->mv_size = ALIGN(ctx->mv_size, 16);
> > + }
> > } else {
> > ctx->mv_size = 0;
> > }
> > @@ -596,15 +630,34 @@ static int s5p_mfc_set_enc_ref_buffer_v6(struct s5p_mfc_ctx *ctx)
> >
> > mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1);
> >
> > - for (i = 0; i < ctx->pb_count; i++) {
> > - writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
> > - buf_addr1 += ctx->luma_dpb_size;
> > - writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
> > - buf_addr1 += ctx->chroma_dpb_size;
> > - writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
> > - buf_addr1 += ctx->me_buffer_size;
> > - buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size +
> > - ctx->me_buffer_size);
> > + if (IS_MFCV10(dev)) {
> > + /* start address of per buffer is aligned */
> > + for (i = 0; i < ctx->pb_count; i++) {
> > + writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
> > + buf_addr1 += ctx->luma_dpb_size;
> > + buf_size1 -= ctx->luma_dpb_size;
> > + }
> > + for (i = 0; i < ctx->pb_count; i++) {
> > + writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
> > + buf_addr1 += ctx->chroma_dpb_size;
> > + buf_size1 -= ctx->chroma_dpb_size;
> > + }
> > + for (i = 0; i < ctx->pb_count; i++) {
> > + writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
> > + buf_addr1 += ctx->me_buffer_size;
> > + buf_size1 -= ctx->me_buffer_size;
> > + }
> > + } else {
> > + for (i = 0; i < ctx->pb_count; i++) {
> > + writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
> > + buf_addr1 += ctx->luma_dpb_size;
> > + writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
> > + buf_addr1 += ctx->chroma_dpb_size;
> > + writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
> > + buf_addr1 += ctx->me_buffer_size;
> > + buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size
> > + + ctx->me_buffer_size);
> > + }
> > }
> >
> > writel(buf_addr1, mfc_regs->e_scratch_buffer_addr);
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> > index 021b8db..975bbc5 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h
> > @@ -26,6 +26,8 @@
> > (((MB_HEIGHT(y)+1)/2)*2) * 64 + 128)
> > #define S5P_MFC_DEC_MV_SIZE_V10(x, y) (MB_WIDTH(x) * \
> > (((MB_HEIGHT(y)+1)/2)*2) * 64 + 512)
> > +#define enc_lcu_width(x_size) DIV_ROUND_UP(x_size, 32)
> > +#define enc_lcu_height(y_size) DIV_ROUND_UP(y_size, 32)
>
> Why is this in lower case? Maybe S5P_MFC_LCU_WIDTH/HEIGHT would be better?
>
I will change the name to S5P_MFC_LCU_WIDTH and S5P_MFC_LCU_HEIGHT in
the next patch series.
> >
> > /* Definition */
> > #define ENC_MULTI_SLICE_MB_MAX ((1 << 30) - 1)
> > --
> > 2.7.4
> >
>
> Apart from the above, it looks good to me.
>
> Acked-by: Kamil Debski <kamil@wypas.org>
>
> Best wishes,
> Kamil Debski
>
>
Thank you for the review.
Regards,
Smitha
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
2017-06-19 5:10 ` Smitha T Murthy
@ 2017-06-28 20:04 ` Kamil Debski
-1 siblings, 0 replies; 68+ messages in thread
From: Kamil Debski @ 2017-06-28 20:04 UTC (permalink / raw)
To: Smitha T Murthy
Cc: linux-arm-kernel, linux-media, linux-kernel, Kyungmin Park,
jtp.park, a.hajda, mchehab, pankaj.dubey, krzk, Marek Szyprowski,
Sylwester Nawrocki
Hi,
Please find my comments inline.
On 19 June 2017 at 07:10, Smitha T Murthy <smitha.t@samsung.com> wrote:
> Added V4l2 controls for HEVC encoder
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> ---
> Documentation/media/uapi/v4l/extended-controls.rst | 364 +++++++++++++++++++++
> 1 file changed, 364 insertions(+)
>
> diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
> index abb1057..7767c70 100644
> --- a/Documentation/media/uapi/v4l/extended-controls.rst
> +++ b/Documentation/media/uapi/v4l/extended-controls.rst
> @@ -1960,6 +1960,370 @@ enum v4l2_vp8_golden_frame_sel -
> 1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
>
>
[snip]
> +
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (integer)``
> + Selects the hierarchical coding layer. In normal encoding
> + (non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
> + 0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
> + LAYER 1 and so on.
I would like the above to be more consistent. If HIER is in the name
then HIER in the description should be used as well. Aside from that,
I would recommend using full HIERARCHICAL instead of HIER in the name
of the control. Why? Because it is HIERARCHICAL in controls already
present in V4L2, such as
V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP.
[snip]
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF (boolean)``
> + Indicates loop filtering. Control value 1 indicates loop filtering
> + is enabled and when set to 0 indicates loop filtering is disabled.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY (boolean)``
> + Selects whether to apply the loop filter across the slice boundary or not.
> + If the value is 0, loop filter will not be applied across the slice boundary.
> + If the value is 1, loop filter will be applied across the slice boundary.
Just a thought. Pretty much the same fucntionality is achieved via the
V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE control. It's an enum having
three states: enabled, disabled and disabled at slice boundary. Maybe
a single control could be introduced? With another legacy define for
API compatibility. Also, I don't like that controls are not consistent
between H264 and HEVC. I would opt for the enum option.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (integer)``
> + Selects HEVC loop filter beta offset. The valid range is [-6, +6].
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (integer)``
> + Selects HEVC loop filter tc offset. The valid range is [-6, +6].
> +
> +.. _v4l2-hevc-refresh-type:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE``
> + (enum)
> +
[snip]
Best wishes,
Kamil
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
@ 2017-06-28 20:04 ` Kamil Debski
0 siblings, 0 replies; 68+ messages in thread
From: Kamil Debski @ 2017-06-28 20:04 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
Please find my comments inline.
On 19 June 2017 at 07:10, Smitha T Murthy <smitha.t@samsung.com> wrote:
> Added V4l2 controls for HEVC encoder
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> ---
> Documentation/media/uapi/v4l/extended-controls.rst | 364 +++++++++++++++++++++
> 1 file changed, 364 insertions(+)
>
> diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
> index abb1057..7767c70 100644
> --- a/Documentation/media/uapi/v4l/extended-controls.rst
> +++ b/Documentation/media/uapi/v4l/extended-controls.rst
> @@ -1960,6 +1960,370 @@ enum v4l2_vp8_golden_frame_sel -
> 1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
>
>
[snip]
> +
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (integer)``
> + Selects the hierarchical coding layer. In normal encoding
> + (non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
> + 0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
> + LAYER 1 and so on.
I would like the above to be more consistent. If HIER is in the name
then HIER in the description should be used as well. Aside from that,
I would recommend using full HIERARCHICAL instead of HIER in the name
of the control. Why? Because it is HIERARCHICAL in controls already
present in V4L2, such as
V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP.
[snip]
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF (boolean)``
> + Indicates loop filtering. Control value 1 indicates loop filtering
> + is enabled and when set to 0 indicates loop filtering is disabled.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY (boolean)``
> + Selects whether to apply the loop filter across the slice boundary or not.
> + If the value is 0, loop filter will not be applied across the slice boundary.
> + If the value is 1, loop filter will be applied across the slice boundary.
Just a thought. Pretty much the same fucntionality is achieved via the
V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE control. It's an enum having
three states: enabled, disabled and disabled at slice boundary. Maybe
a single control could be introduced? With another legacy define for
API compatibility. Also, I don't like that controls are not consistent
between H264 and HEVC. I would opt for the enum option.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (integer)``
> + Selects HEVC loop filter beta offset. The valid range is [-6, +6].
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (integer)``
> + Selects HEVC loop filter tc offset. The valid range is [-6, +6].
> +
> +.. _v4l2-hevc-refresh-type:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE``
> + (enum)
> +
[snip]
Best wishes,
Kamil
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
2017-06-28 20:04 ` Kamil Debski
@ 2017-06-30 3:24 ` Smitha T Murthy
-1 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-30 3:24 UTC (permalink / raw)
To: Kamil Debski
Cc: linux-arm-kernel, linux-media, linux-kernel, Kyungmin Park,
jtp.park, a.hajda, mchehab, pankaj.dubey, krzk, Marek Szyprowski,
Sylwester Nawrocki
On Wed, 2017-06-28 at 22:04 +0200, Kamil Debski wrote:
> Hi,
>
> Please find my comments inline.
>
> On 19 June 2017 at 07:10, Smitha T Murthy <smitha.t@samsung.com> wrote:
> > Added V4l2 controls for HEVC encoder
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > ---
> > Documentation/media/uapi/v4l/extended-controls.rst | 364 +++++++++++++++++++++
> > 1 file changed, 364 insertions(+)
> >
> > diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
> > index abb1057..7767c70 100644
> > --- a/Documentation/media/uapi/v4l/extended-controls.rst
> > +++ b/Documentation/media/uapi/v4l/extended-controls.rst
> > @@ -1960,6 +1960,370 @@ enum v4l2_vp8_golden_frame_sel -
> > 1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
> >
> >
>
> [snip]
>
> > +
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (integer)``
> > + Selects the hierarchical coding layer. In normal encoding
> > + (non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
> > + 0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
> > + LAYER 1 and so on.
>
> I would like the above to be more consistent. If HIER is in the name
> then HIER in the description should be used as well. Aside from that,
> I would recommend using full HIERARCHICAL instead of HIER in the name
> of the control. Why? Because it is HIERARCHICAL in controls already
> present in V4L2, such as
> V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP.
>
I had changed it from HIERARCHICAL to HIER as per suggestion by
Sylwester Nawrocki. Here
https://patchwork.kernel.org/patch/9666129/
> [snip]
>
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF (boolean)``
> > + Indicates loop filtering. Control value 1 indicates loop filtering
> > + is enabled and when set to 0 indicates loop filtering is disabled.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY (boolean)``
> > + Selects whether to apply the loop filter across the slice boundary or not.
> > + If the value is 0, loop filter will not be applied across the slice boundary.
> > + If the value is 1, loop filter will be applied across the slice boundary.
>
> Just a thought. Pretty much the same fucntionality is achieved via the
> V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE control. It's an enum having
> three states: enabled, disabled and disabled at slice boundary. Maybe
> a single control could be introduced? With another legacy define for
> API compatibility. Also, I don't like that controls are not consistent
> between H264 and HEVC. I would opt for the enum option.
>
I will add enum options for the above control.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (integer)``
> > + Selects HEVC loop filter beta offset. The valid range is [-6, +6].
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (integer)``
> > + Selects HEVC loop filter tc offset. The valid range is [-6, +6].
> > +
> > +.. _v4l2-hevc-refresh-type:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE``
> > + (enum)
> > +
> [snip]
>
> Best wishes,
> Kamil
>
>
Thank you for the review.
Regards,
Smitha
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
@ 2017-06-30 3:24 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-06-30 3:24 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, 2017-06-28 at 22:04 +0200, Kamil Debski wrote:
> Hi,
>
> Please find my comments inline.
>
> On 19 June 2017 at 07:10, Smitha T Murthy <smitha.t@samsung.com> wrote:
> > Added V4l2 controls for HEVC encoder
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > ---
> > Documentation/media/uapi/v4l/extended-controls.rst | 364 +++++++++++++++++++++
> > 1 file changed, 364 insertions(+)
> >
> > diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
> > index abb1057..7767c70 100644
> > --- a/Documentation/media/uapi/v4l/extended-controls.rst
> > +++ b/Documentation/media/uapi/v4l/extended-controls.rst
> > @@ -1960,6 +1960,370 @@ enum v4l2_vp8_golden_frame_sel -
> > 1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
> >
> >
>
> [snip]
>
> > +
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (integer)``
> > + Selects the hierarchical coding layer. In normal encoding
> > + (non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
> > + 0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
> > + LAYER 1 and so on.
>
> I would like the above to be more consistent. If HIER is in the name
> then HIER in the description should be used as well. Aside from that,
> I would recommend using full HIERARCHICAL instead of HIER in the name
> of the control. Why? Because it is HIERARCHICAL in controls already
> present in V4L2, such as
> V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP.
>
I had changed it from HIERARCHICAL to HIER as per suggestion by
Sylwester Nawrocki. Here
https://patchwork.kernel.org/patch/9666129/
> [snip]
>
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF (boolean)``
> > + Indicates loop filtering. Control value 1 indicates loop filtering
> > + is enabled and when set to 0 indicates loop filtering is disabled.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY (boolean)``
> > + Selects whether to apply the loop filter across the slice boundary or not.
> > + If the value is 0, loop filter will not be applied across the slice boundary.
> > + If the value is 1, loop filter will be applied across the slice boundary.
>
> Just a thought. Pretty much the same fucntionality is achieved via the
> V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE control. It's an enum having
> three states: enabled, disabled and disabled at slice boundary. Maybe
> a single control could be introduced? With another legacy define for
> API compatibility. Also, I don't like that controls are not consistent
> between H264 and HEVC. I would opt for the enum option.
>
I will add enum options for the above control.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (integer)``
> > + Selects HEVC loop filter beta offset. The valid range is [-6, +6].
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (integer)``
> > + Selects HEVC loop filter tc offset. The valid range is [-6, +6].
> > +
> > +.. _v4l2-hevc-refresh-type:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE``
> > + (enum)
> > +
> [snip]
>
> Best wishes,
> Kamil
>
>
Thank you for the review.
Regards,
Smitha
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 05/12] [media] videodev2.h: Add v4l2 definition for HEVC
2017-06-19 5:10 ` Smitha T Murthy
@ 2017-07-07 14:56 ` Stanimir Varbanov
-1 siblings, 0 replies; 68+ messages in thread
From: Stanimir Varbanov @ 2017-07-07 14:56 UTC (permalink / raw)
To: Smitha T Murthy, linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki
Hi Smitha,
On 06/19/2017 08:10 AM, Smitha T Murthy wrote:
> Add V4L2 definition for HEVC compressed format
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
> include/uapi/linux/videodev2.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
> index 2b8feb8..488de3d 100644
> --- a/include/uapi/linux/videodev2.h
> +++ b/include/uapi/linux/videodev2.h
> @@ -629,6 +629,7 @@ struct v4l2_pix_format {
> #define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
> #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
> #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
> +#define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
>
> /* Vendor-specific formats */
> #define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
>
Hans wanted the name to be H265, not sure is that valid yet.
I have tested 5/12, 6/12, and 7/12 on venus codec driver, and in case
you need it, you have my
Reviewed-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
--
regards,
Stan
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 05/12] [media] videodev2.h: Add v4l2 definition for HEVC
@ 2017-07-07 14:56 ` Stanimir Varbanov
0 siblings, 0 replies; 68+ messages in thread
From: Stanimir Varbanov @ 2017-07-07 14:56 UTC (permalink / raw)
To: linux-arm-kernel
Hi Smitha,
On 06/19/2017 08:10 AM, Smitha T Murthy wrote:
> Add V4L2 definition for HEVC compressed format
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
> include/uapi/linux/videodev2.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
> index 2b8feb8..488de3d 100644
> --- a/include/uapi/linux/videodev2.h
> +++ b/include/uapi/linux/videodev2.h
> @@ -629,6 +629,7 @@ struct v4l2_pix_format {
> #define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
> #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
> #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
> +#define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
>
> /* Vendor-specific formats */
> #define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
>
Hans wanted the name to be H265, not sure is that valid yet.
I have tested 5/12, 6/12, and 7/12 on venus codec driver, and in case
you need it, you have my
Reviewed-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
--
regards,
Stan
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
2017-06-19 5:10 ` Smitha T Murthy
@ 2017-07-07 14:59 ` Stanimir Varbanov
-1 siblings, 0 replies; 68+ messages in thread
From: Stanimir Varbanov @ 2017-07-07 14:59 UTC (permalink / raw)
To: Smitha T Murthy, linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki
Hi,
On 06/19/2017 08:10 AM, Smitha T Murthy wrote:
> Added V4l2 controls for HEVC encoder
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> ---
> Documentation/media/uapi/v4l/extended-controls.rst | 364 +++++++++++++++++++++
> 1 file changed, 364 insertions(+)
>
> diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
> index abb1057..7767c70 100644
> --- a/Documentation/media/uapi/v4l/extended-controls.rst
> +++ b/Documentation/media/uapi/v4l/extended-controls.rst
> @@ -1960,6 +1960,370 @@ enum v4l2_vp8_golden_frame_sel -
> 1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
>
>
<cut>
> +``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
> + (enum)
> +
> +enum v4l2_mpeg_video_hevc_profile -
> + Select the desired profile for HEVC encoder.
> +
> +.. raw:: latex
> +
> + \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> + :header-rows: 0
> + :stub-columns: 0
> +
> + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
> + - Main profile.
MAIN10?
> + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
> + - Main still picture profile.
> +
> +.. raw:: latex
> +
> + \end{adjustbox}
> +
> +
<cut>
> +MFC 10.10 MPEG Controls
> +-----------------------
> +
> +The following MPEG class controls deal with MPEG decoding and encoding
> +settings that are specific to the Multi Format Codec 10.10 device present
> +in the S5P and Exynos family of SoCs by Samsung.
> +
> +
> +.. _mfc1010-control-id:
> +
> +MFC 10.10 Control IDs
> +^^^^^^^^^^^^^^^^^^^^^
> +
> +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (integer)``
> + Selects number of P reference pictures required for HEVC encoder.
> + P-Frame can use 1 or 2 frames for reference.
> +
> +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (integer)``
> + Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
> + disables generating SPS and PPS at every IDR. Setting it to one enables
> + generating SPS and PPS at every IDR.
> +
I'm not sure those two should be driver specific, have to check does
venus driver has similar controls.
> +
> .. _camera-controls:
>
> Camera Control Reference
>
--
regards,
Stan
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
@ 2017-07-07 14:59 ` Stanimir Varbanov
0 siblings, 0 replies; 68+ messages in thread
From: Stanimir Varbanov @ 2017-07-07 14:59 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On 06/19/2017 08:10 AM, Smitha T Murthy wrote:
> Added V4l2 controls for HEVC encoder
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> ---
> Documentation/media/uapi/v4l/extended-controls.rst | 364 +++++++++++++++++++++
> 1 file changed, 364 insertions(+)
>
> diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
> index abb1057..7767c70 100644
> --- a/Documentation/media/uapi/v4l/extended-controls.rst
> +++ b/Documentation/media/uapi/v4l/extended-controls.rst
> @@ -1960,6 +1960,370 @@ enum v4l2_vp8_golden_frame_sel -
> 1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
>
>
<cut>
> +``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
> + (enum)
> +
> +enum v4l2_mpeg_video_hevc_profile -
> + Select the desired profile for HEVC encoder.
> +
> +.. raw:: latex
> +
> + \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> + :header-rows: 0
> + :stub-columns: 0
> +
> + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
> + - Main profile.
MAIN10?
> + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
> + - Main still picture profile.
> +
> +.. raw:: latex
> +
> + \end{adjustbox}
> +
> +
<cut>
> +MFC 10.10 MPEG Controls
> +-----------------------
> +
> +The following MPEG class controls deal with MPEG decoding and encoding
> +settings that are specific to the Multi Format Codec 10.10 device present
> +in the S5P and Exynos family of SoCs by Samsung.
> +
> +
> +.. _mfc1010-control-id:
> +
> +MFC 10.10 Control IDs
> +^^^^^^^^^^^^^^^^^^^^^
> +
> +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (integer)``
> + Selects number of P reference pictures required for HEVC encoder.
> + P-Frame can use 1 or 2 frames for reference.
> +
> +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (integer)``
> + Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
> + disables generating SPS and PPS at every IDR. Setting it to one enables
> + generating SPS and PPS at every IDR.
> +
I'm not sure those two should be driver specific, have to check does
venus driver has similar controls.
> +
> .. _camera-controls:
>
> Camera Control Reference
>
--
regards,
Stan
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 05/12] [media] videodev2.h: Add v4l2 definition for HEVC
2017-07-07 14:56 ` Stanimir Varbanov
@ 2017-07-17 11:12 ` Smitha T Murthy
-1 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-07-17 11:12 UTC (permalink / raw)
To: Stanimir Varbanov
Cc: linux-arm-kernel, linux-media, linux-kernel, kyungmin.park,
kamil, jtp.park, a.hajda, mchehab, pankaj.dubey, krzk,
m.szyprowski, s.nawrocki
On Fri, 2017-07-07 at 17:56 +0300, Stanimir Varbanov wrote:
> Hi Smitha,
>
> On 06/19/2017 08:10 AM, Smitha T Murthy wrote:
> > Add V4L2 definition for HEVC compressed format
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> > ---
> > include/uapi/linux/videodev2.h | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
> > index 2b8feb8..488de3d 100644
> > --- a/include/uapi/linux/videodev2.h
> > +++ b/include/uapi/linux/videodev2.h
> > @@ -629,6 +629,7 @@ struct v4l2_pix_format {
> > #define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
> > #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
> > #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
> > +#define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
> >
> > /* Vendor-specific formats */
> > #define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
> >
>
> Hans wanted the name to be H265, not sure is that valid yet.
>
> I have tested 5/12, 6/12, and 7/12 on venus codec driver, and in case
> you need it, you have my
>
> Reviewed-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
>
Thank you for the review.
Regards,
Smitha
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 05/12] [media] videodev2.h: Add v4l2 definition for HEVC
@ 2017-07-17 11:12 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-07-17 11:12 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, 2017-07-07 at 17:56 +0300, Stanimir Varbanov wrote:
> Hi Smitha,
>
> On 06/19/2017 08:10 AM, Smitha T Murthy wrote:
> > Add V4L2 definition for HEVC compressed format
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> > ---
> > include/uapi/linux/videodev2.h | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
> > index 2b8feb8..488de3d 100644
> > --- a/include/uapi/linux/videodev2.h
> > +++ b/include/uapi/linux/videodev2.h
> > @@ -629,6 +629,7 @@ struct v4l2_pix_format {
> > #define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
> > #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
> > #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
> > +#define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
> >
> > /* Vendor-specific formats */
> > #define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
> >
>
> Hans wanted the name to be H265, not sure is that valid yet.
>
> I have tested 5/12, 6/12, and 7/12 on venus codec driver, and in case
> you need it, you have my
>
> Reviewed-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
>
Thank you for the review.
Regards,
Smitha
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
2017-07-07 14:59 ` Stanimir Varbanov
@ 2017-07-17 11:18 ` Smitha T Murthy
-1 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-07-17 11:18 UTC (permalink / raw)
To: Stanimir Varbanov
Cc: linux-arm-kernel, linux-media, linux-kernel, kyungmin.park,
kamil, jtp.park, a.hajda, mchehab, pankaj.dubey, krzk,
m.szyprowski, s.nawrocki
On Fri, 2017-07-07 at 17:59 +0300, Stanimir Varbanov wrote:
> Hi,
>
> On 06/19/2017 08:10 AM, Smitha T Murthy wrote:
> > Added V4l2 controls for HEVC encoder
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > ---
> > Documentation/media/uapi/v4l/extended-controls.rst | 364 +++++++++++++++++++++
> > 1 file changed, 364 insertions(+)
> >
> > diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
> > index abb1057..7767c70 100644
> > --- a/Documentation/media/uapi/v4l/extended-controls.rst
> > +++ b/Documentation/media/uapi/v4l/extended-controls.rst
> > @@ -1960,6 +1960,370 @@ enum v4l2_vp8_golden_frame_sel -
> > 1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
> >
> >
>
> <cut>
>
> > +``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
> > + (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_profile -
> > + Select the desired profile for HEVC encoder.
> > +
> > +.. raw:: latex
> > +
> > + \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > + :header-rows: 0
> > + :stub-columns: 0
> > +
> > + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
> > + - Main profile.
>
> MAIN10?
>
No just MAIN.
> > + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
> > + - Main still picture profile.
> > +
> > +.. raw:: latex
> > +
> > + \end{adjustbox}
> > +
> > +
>
> <cut>
>
> > +MFC 10.10 MPEG Controls
> > +-----------------------
> > +
> > +The following MPEG class controls deal with MPEG decoding and encoding
> > +settings that are specific to the Multi Format Codec 10.10 device present
> > +in the S5P and Exynos family of SoCs by Samsung.
> > +
> > +
> > +.. _mfc1010-control-id:
> > +
> > +MFC 10.10 Control IDs
> > +^^^^^^^^^^^^^^^^^^^^^
> > +
> > +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (integer)``
> > + Selects number of P reference pictures required for HEVC encoder.
> > + P-Frame can use 1 or 2 frames for reference.
> > +
> > +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (integer)``
> > + Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
> > + disables generating SPS and PPS at every IDR. Setting it to one enables
> > + generating SPS and PPS at every IDR.
> > +
>
> I'm not sure those two should be driver specific, have to check does
> venus driver has similar controls.
>
Yes please check and let me know if you have similar controls, I will
move it out.
> > +
> > .. _camera-controls:
> >
> > Camera Control Reference
> >
>
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
@ 2017-07-17 11:18 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-07-17 11:18 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, 2017-07-07 at 17:59 +0300, Stanimir Varbanov wrote:
> Hi,
>
> On 06/19/2017 08:10 AM, Smitha T Murthy wrote:
> > Added V4l2 controls for HEVC encoder
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > ---
> > Documentation/media/uapi/v4l/extended-controls.rst | 364 +++++++++++++++++++++
> > 1 file changed, 364 insertions(+)
> >
> > diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
> > index abb1057..7767c70 100644
> > --- a/Documentation/media/uapi/v4l/extended-controls.rst
> > +++ b/Documentation/media/uapi/v4l/extended-controls.rst
> > @@ -1960,6 +1960,370 @@ enum v4l2_vp8_golden_frame_sel -
> > 1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
> >
> >
>
> <cut>
>
> > +``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
> > + (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_profile -
> > + Select the desired profile for HEVC encoder.
> > +
> > +.. raw:: latex
> > +
> > + \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > + :header-rows: 0
> > + :stub-columns: 0
> > +
> > + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
> > + - Main profile.
>
> MAIN10?
>
No just MAIN.
> > + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
> > + - Main still picture profile.
> > +
> > +.. raw:: latex
> > +
> > + \end{adjustbox}
> > +
> > +
>
> <cut>
>
> > +MFC 10.10 MPEG Controls
> > +-----------------------
> > +
> > +The following MPEG class controls deal with MPEG decoding and encoding
> > +settings that are specific to the Multi Format Codec 10.10 device present
> > +in the S5P and Exynos family of SoCs by Samsung.
> > +
> > +
> > +.. _mfc1010-control-id:
> > +
> > +MFC 10.10 Control IDs
> > +^^^^^^^^^^^^^^^^^^^^^
> > +
> > +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (integer)``
> > + Selects number of P reference pictures required for HEVC encoder.
> > + P-Frame can use 1 or 2 frames for reference.
> > +
> > +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (integer)``
> > + Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
> > + disables generating SPS and PPS at every IDR. Setting it to one enables
> > + generating SPS and PPS at every IDR.
> > +
>
> I'm not sure those two should be driver specific, have to check does
> venus driver has similar controls.
>
Yes please check and let me know if you have similar controls, I will
move it out.
> > +
> > .. _camera-controls:
> >
> > Camera Control Reference
> >
>
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 06/12] [media] v4l2-ioctl: add HEVC format description
2017-06-19 5:10 ` Smitha T Murthy
@ 2017-07-20 13:07 ` Hans Verkuil
-1 siblings, 0 replies; 68+ messages in thread
From: Hans Verkuil @ 2017-07-20 13:07 UTC (permalink / raw)
To: Smitha T Murthy, linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki
On 19/06/17 07:10, Smitha T Murthy wrote:
> HEVC is a video coding format
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> ---
> drivers/media/v4l2-core/v4l2-ioctl.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
> index e5a2187..4f6f8d9 100644
> --- a/drivers/media/v4l2-core/v4l2-ioctl.c
> +++ b/drivers/media/v4l2-core/v4l2-ioctl.c
> @@ -1257,6 +1257,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
> case V4L2_PIX_FMT_VC1_ANNEX_L: descr = "VC-1 (SMPTE 412M Annex L)"; break;
> case V4L2_PIX_FMT_VP8: descr = "VP8"; break;
> case V4L2_PIX_FMT_VP9: descr = "VP9"; break;
> + case V4L2_PIX_FMT_HEVC: descr = "HEVC"; break;
Add a little comment at the end of the line: /* aka H.265 */
After that you can add my:
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Regards,
Hans
> case V4L2_PIX_FMT_CPIA1: descr = "GSPCA CPiA YUV"; break;
> case V4L2_PIX_FMT_WNVA: descr = "WNVA"; break;
> case V4L2_PIX_FMT_SN9C10X: descr = "GSPCA SN9C10X"; break;
>
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 06/12] [media] v4l2-ioctl: add HEVC format description
@ 2017-07-20 13:07 ` Hans Verkuil
0 siblings, 0 replies; 68+ messages in thread
From: Hans Verkuil @ 2017-07-20 13:07 UTC (permalink / raw)
To: linux-arm-kernel
On 19/06/17 07:10, Smitha T Murthy wrote:
> HEVC is a video coding format
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> ---
> drivers/media/v4l2-core/v4l2-ioctl.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
> index e5a2187..4f6f8d9 100644
> --- a/drivers/media/v4l2-core/v4l2-ioctl.c
> +++ b/drivers/media/v4l2-core/v4l2-ioctl.c
> @@ -1257,6 +1257,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
> case V4L2_PIX_FMT_VC1_ANNEX_L: descr = "VC-1 (SMPTE 412M Annex L)"; break;
> case V4L2_PIX_FMT_VP8: descr = "VP8"; break;
> case V4L2_PIX_FMT_VP9: descr = "VP9"; break;
> + case V4L2_PIX_FMT_HEVC: descr = "HEVC"; break;
Add a little comment at the end of the line: /* aka H.265 */
After that you can add my:
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Regards,
Hans
> case V4L2_PIX_FMT_CPIA1: descr = "GSPCA CPiA YUV"; break;
> case V4L2_PIX_FMT_WNVA: descr = "WNVA"; break;
> case V4L2_PIX_FMT_SN9C10X: descr = "GSPCA SN9C10X"; break;
>
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 05/12] [media] videodev2.h: Add v4l2 definition for HEVC
2017-06-19 5:10 ` Smitha T Murthy
@ 2017-07-20 13:07 ` Hans Verkuil
-1 siblings, 0 replies; 68+ messages in thread
From: Hans Verkuil @ 2017-07-20 13:07 UTC (permalink / raw)
To: Smitha T Murthy, linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki
On 19/06/17 07:10, Smitha T Murthy wrote:
> Add V4L2 definition for HEVC compressed format
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
> include/uapi/linux/videodev2.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
> index 2b8feb8..488de3d 100644
> --- a/include/uapi/linux/videodev2.h
> +++ b/include/uapi/linux/videodev2.h
> @@ -629,6 +629,7 @@ struct v4l2_pix_format {
> #define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
> #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
> #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
> +#define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
Change the comment to: /* HEVC aka H.265 */
After that you can add my:
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Regards,
Hans
>
> /* Vendor-specific formats */
> #define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
>
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 05/12] [media] videodev2.h: Add v4l2 definition for HEVC
@ 2017-07-20 13:07 ` Hans Verkuil
0 siblings, 0 replies; 68+ messages in thread
From: Hans Verkuil @ 2017-07-20 13:07 UTC (permalink / raw)
To: linux-arm-kernel
On 19/06/17 07:10, Smitha T Murthy wrote:
> Add V4L2 definition for HEVC compressed format
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
> include/uapi/linux/videodev2.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
> index 2b8feb8..488de3d 100644
> --- a/include/uapi/linux/videodev2.h
> +++ b/include/uapi/linux/videodev2.h
> @@ -629,6 +629,7 @@ struct v4l2_pix_format {
> #define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
> #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
> #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
> +#define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
Change the comment to: /* HEVC aka H.265 */
After that you can add my:
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Regards,
Hans
>
> /* Vendor-specific formats */
> #define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
>
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 10/12] [media] v4l2: Add v4l2 control IDs for HEVC encoder
2017-06-19 5:10 ` Smitha T Murthy
@ 2017-07-20 13:13 ` Hans Verkuil
-1 siblings, 0 replies; 68+ messages in thread
From: Hans Verkuil @ 2017-07-20 13:13 UTC (permalink / raw)
To: Smitha T Murthy, linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki
On 19/06/17 07:10, Smitha T Murthy wrote:
> Add v4l2 controls for HEVC encoder
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
> drivers/media/v4l2-core/v4l2-ctrls.c | 103 +++++++++++++++++++++++++++++++++++
> include/uapi/linux/v4l2-controls.h | 84 ++++++++++++++++++++++++++++
> 2 files changed, 187 insertions(+)
>
> diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
> index ec42872..6a7e732 100644
> --- a/drivers/media/v4l2-core/v4l2-ctrls.c
> +++ b/drivers/media/v4l2-core/v4l2-ctrls.c
> @@ -479,6 +479,51 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
> NULL,
> };
>
> + static const char * const hevc_profile[] = {
> + "Main",
> + "Main Still Picture",
> + NULL,
> + };
> + static const char * const hevc_level[] = {
> + "1",
> + "2",
> + "2.1",
> + "3",
> + "3.1",
> + "4",
> + "4.1",
> + "5",
> + "5.1",
> + "5.2",
> + "6",
> + "6.1",
> + "6.2",
> + NULL,
> + };
> + static const char * const hevc_hierarchial_coding_type[] = {
> + "B",
> + "P",
> + NULL,
> + };
> + static const char * const hevc_refresh_type[] = {
> + "None",
> + "CRA",
> + "IDR",
> + NULL,
> + };
> + static const char * const hevc_size_of_length_field[] = {
> + "0",
> + "1",
> + "2",
> + "4",
> + NULL,
> + };
> + static const char * const hevc_tier_flag[] = {
> + "Main",
> + "High",
> + NULL,
> + };
> +
>
> switch (id) {
> case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
> @@ -574,6 +619,18 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
> return dv_it_content_type;
> case V4L2_CID_DETECT_MD_MODE:
> return detect_md_mode;
> + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> + return hevc_profile;
> + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> + return hevc_level;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
> + return hevc_hierarchial_coding_type;
> + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> + return hevc_refresh_type;
> + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> + return hevc_size_of_length_field;
> + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
> + return hevc_tier_flag;
>
> default:
> return NULL;
> @@ -775,6 +832,46 @@ const char *v4l2_ctrl_get_name(u32 id)
> case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP: return "VPX P-Frame QP Value";
> case V4L2_CID_MPEG_VIDEO_VPX_PROFILE: return "VPX Profile";
>
> + /* HEVC controls */
> + case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: return "HEVC I-Frame QP Value";
> + case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP: return "HEVC P-Frame QP Value";
> + case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP: return "HEVC B-Frame QP Value";
> + case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP: return "HEVC Minimum QP Value";
> + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP: return "HEVC Maximum QP Value";
> + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: return "HEVC Profile";
> + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL: return "HEVC Level";
> + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG: return "HEVC Tier_flag";
"HEVC Tier Flag"
> + case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION: return "HEVC Frame Rate Resolution";
> + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH: return "HEVC Maximum Coding Unit Depth";
> + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE: return "HEVC Refresh Type";
> + case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED: return "HEVC Constant Intra Prediction";
> + case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU: return "HEVC Lossless Encoding";
> + case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT: return "HEVC Wavefront";
> + case V4L2_CID_MPEG_VIDEO_HEVC_LF: return "HEVC Loop Filter";
> + case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY: return "HEVC LF Across Slice Boundary";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP: return "HEVC QP Values";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE: return "HEVC Hierarchical Coding Type";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER: return "HEVC Hierarchical Coding Layer";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP: return "HEVC Hierarchical Layer QP";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR: return "HEVC Hierarchical Lay 0 Bit Rate";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR: return "HEVC Hierarchical Lay 1 Bit Rate";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR: return "HEVC Hierarchical Lay 2 Bit Rate";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR: return "HEVC Hierarchical Lay 3 Bit Rate";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR: return "HEVC Hierarchical Lay 4 Bit Rate";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR: return "HEVC Hierarchical Lay 5 Bit Rate";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR: return "HEVC Hierarchical Lay 6 Bit Rate";
> + case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB: return "HEVC General PB";
> + case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID: return "HEVC Temporal ID";
> + case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING: return "HEVC Strong Intra Smoothing";
> + case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT: return "HEVC Intra PU Split";
> + case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION: return "HEVC TMV Prediction";
> + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1: return "HEVC Max Number of Candidate MVs";
> + case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE: return "HEVC ENC Without Startcode";
> + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD: return "HEVC Num of I Frame b/w 2 IDR";
s/I Frame/I-Frame/
> + case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2: return "HEVC Loop Filter Beta Offset";
> + case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2: return "HEVC Loop Filter TC Offset";
> + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: return "HEVC Size of Length Field";
> +
It is my understanding that all these V4L2_CID_MPEG_VIDEO_HEVC_ controls represent HEVC
parameters as defined by the HEVC standard, right? And not specific to your codec.
I'm pretty sure that's the case, I'm just double-checking.
Regards,
Hans
> /* CAMERA controls */
> /* Keep the order of the 'case's the same as in v4l2-controls.h! */
> case V4L2_CID_CAMERA_CLASS: return "Camera Controls";
> @@ -1067,6 +1164,12 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
> case V4L2_CID_TUNE_DEEMPHASIS:
> case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL:
> case V4L2_CID_DETECT_MD_MODE:
> + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
> + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
> *type = V4L2_CTRL_TYPE_MENU;
> break;
> case V4L2_CID_LINK_FREQ:
> diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
> index 0d2e1e0..9c32a55 100644
> --- a/include/uapi/linux/v4l2-controls.h
> +++ b/include/uapi/linux/v4l2-controls.h
> @@ -579,6 +579,85 @@ enum v4l2_vp8_golden_frame_sel {
> #define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP (V4L2_CID_MPEG_BASE+510)
> #define V4L2_CID_MPEG_VIDEO_VPX_PROFILE (V4L2_CID_MPEG_BASE+511)
>
> +/* CIDs for HEVC encoding. Number gaps are for compatibility */
> +
> +#define V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP (V4L2_CID_MPEG_BASE + 512)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP (V4L2_CID_MPEG_BASE + 513)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP (V4L2_CID_MPEG_BASE + 514)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP (V4L2_CID_MPEG_BASE + 515)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP (V4L2_CID_MPEG_BASE + 516)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP (V4L2_CID_MPEG_BASE + 517)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE (V4L2_CID_MPEG_BASE + 518)
> +enum v4l2_mpeg_video_hevc_hier_coding_type {
> + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B = 0,
> + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P = 1,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (V4L2_CID_MPEG_BASE + 519)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP (V4L2_CID_MPEG_BASE + 520)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_PROFILE (V4L2_CID_MPEG_BASE + 521)
> +enum v4l2_mpeg_video_hevc_profile {
> + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN = 0,
> + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE = 1,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LEVEL (V4L2_CID_MPEG_BASE + 522)
> +enum v4l2_mpeg_video_hevc_level {
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_1 = 0,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_2 = 1,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1 = 2,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_3 = 3,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1 = 4,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_4 = 5,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1 = 6,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_5 = 7,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1 = 8,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2 = 9,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_6 = 10,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1 = 11,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 = 12,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION (V4L2_CID_MPEG_BASE + 523)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG (V4L2_CID_MPEG_BASE + 524)
> +enum v4l2_mpeg_video_hevc_tier_flag {
> + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN = 0,
> + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH = 1,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH (V4L2_CID_MPEG_BASE + 525)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LF (V4L2_CID_MPEG_BASE + 526)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY (V4L2_CID_MPEG_BASE + 527)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (V4L2_CID_MPEG_BASE + 528)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (V4L2_CID_MPEG_BASE + 529)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE (V4L2_CID_MPEG_BASE + 530)
> +enum v4l2_cid_mpeg_video_hevc_refresh_type {
> + V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE = 0,
> + V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA = 1,
> + V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR = 2,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD (V4L2_CID_MPEG_BASE + 531)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU (V4L2_CID_MPEG_BASE + 532)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED (V4L2_CID_MPEG_BASE + 533)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT (V4L2_CID_MPEG_BASE + 534)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB (V4L2_CID_MPEG_BASE + 535)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID (V4L2_CID_MPEG_BASE + 536)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING (V4L2_CID_MPEG_BASE + 537)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1 (V4L2_CID_MPEG_BASE + 538)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT (V4L2_CID_MPEG_BASE + 539)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION (V4L2_CID_MPEG_BASE + 540)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE (V4L2_CID_MPEG_BASE + 541)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD (V4L2_CID_MPEG_BASE + 542)
> +enum v4l2_cid_mpeg_video_hevc_size_of_length_field {
> + V4L2_MPEG_VIDEO_HEVC_SIZE_0 = 0,
> + V4L2_MPEG_VIDEO_HEVC_SIZE_1 = 1,
> + V4L2_MPEG_VIDEO_HEVC_SIZE_2 = 2,
> + V4L2_MPEG_VIDEO_HEVC_SIZE_4 = 3,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR (V4L2_CID_MPEG_BASE + 543)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR (V4L2_CID_MPEG_BASE + 544)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR (V4L2_CID_MPEG_BASE + 545)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR (V4L2_CID_MPEG_BASE + 546)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR (V4L2_CID_MPEG_BASE + 547)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR (V4L2_CID_MPEG_BASE + 548)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR (V4L2_CID_MPEG_BASE + 549)
> +
> /* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
> #define V4L2_CID_MPEG_CX2341X_BASE (V4L2_CTRL_CLASS_MPEG | 0x1000)
> #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE (V4L2_CID_MPEG_CX2341X_BASE+0)
> @@ -647,6 +726,11 @@ enum v4l2_mpeg_mfc51_video_force_frame_type {
> #define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC (V4L2_CID_MPEG_MFC51_BASE+53)
> #define V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P (V4L2_CID_MPEG_MFC51_BASE+54)
>
> +/* MPEG-class control IDs specific to the Samsung MFC 10.10 driver as defined by V4L2 */
> +#define V4L2_CID_MPEG_MFC10_BASE (V4L2_CTRL_CLASS_MPEG | 0x1200)
> +
> +#define V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (V4L2_CID_MPEG_MFC10_BASE+0)
> +#define V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (V4L2_CID_MPEG_MFC10_BASE+1)
>
> /* Camera class control IDs */
>
>
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 10/12] [media] v4l2: Add v4l2 control IDs for HEVC encoder
@ 2017-07-20 13:13 ` Hans Verkuil
0 siblings, 0 replies; 68+ messages in thread
From: Hans Verkuil @ 2017-07-20 13:13 UTC (permalink / raw)
To: linux-arm-kernel
On 19/06/17 07:10, Smitha T Murthy wrote:
> Add v4l2 controls for HEVC encoder
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
> drivers/media/v4l2-core/v4l2-ctrls.c | 103 +++++++++++++++++++++++++++++++++++
> include/uapi/linux/v4l2-controls.h | 84 ++++++++++++++++++++++++++++
> 2 files changed, 187 insertions(+)
>
> diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
> index ec42872..6a7e732 100644
> --- a/drivers/media/v4l2-core/v4l2-ctrls.c
> +++ b/drivers/media/v4l2-core/v4l2-ctrls.c
> @@ -479,6 +479,51 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
> NULL,
> };
>
> + static const char * const hevc_profile[] = {
> + "Main",
> + "Main Still Picture",
> + NULL,
> + };
> + static const char * const hevc_level[] = {
> + "1",
> + "2",
> + "2.1",
> + "3",
> + "3.1",
> + "4",
> + "4.1",
> + "5",
> + "5.1",
> + "5.2",
> + "6",
> + "6.1",
> + "6.2",
> + NULL,
> + };
> + static const char * const hevc_hierarchial_coding_type[] = {
> + "B",
> + "P",
> + NULL,
> + };
> + static const char * const hevc_refresh_type[] = {
> + "None",
> + "CRA",
> + "IDR",
> + NULL,
> + };
> + static const char * const hevc_size_of_length_field[] = {
> + "0",
> + "1",
> + "2",
> + "4",
> + NULL,
> + };
> + static const char * const hevc_tier_flag[] = {
> + "Main",
> + "High",
> + NULL,
> + };
> +
>
> switch (id) {
> case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
> @@ -574,6 +619,18 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
> return dv_it_content_type;
> case V4L2_CID_DETECT_MD_MODE:
> return detect_md_mode;
> + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> + return hevc_profile;
> + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> + return hevc_level;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
> + return hevc_hierarchial_coding_type;
> + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> + return hevc_refresh_type;
> + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> + return hevc_size_of_length_field;
> + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
> + return hevc_tier_flag;
>
> default:
> return NULL;
> @@ -775,6 +832,46 @@ const char *v4l2_ctrl_get_name(u32 id)
> case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP: return "VPX P-Frame QP Value";
> case V4L2_CID_MPEG_VIDEO_VPX_PROFILE: return "VPX Profile";
>
> + /* HEVC controls */
> + case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: return "HEVC I-Frame QP Value";
> + case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP: return "HEVC P-Frame QP Value";
> + case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP: return "HEVC B-Frame QP Value";
> + case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP: return "HEVC Minimum QP Value";
> + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP: return "HEVC Maximum QP Value";
> + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: return "HEVC Profile";
> + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL: return "HEVC Level";
> + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG: return "HEVC Tier_flag";
"HEVC Tier Flag"
> + case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION: return "HEVC Frame Rate Resolution";
> + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH: return "HEVC Maximum Coding Unit Depth";
> + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE: return "HEVC Refresh Type";
> + case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED: return "HEVC Constant Intra Prediction";
> + case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU: return "HEVC Lossless Encoding";
> + case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT: return "HEVC Wavefront";
> + case V4L2_CID_MPEG_VIDEO_HEVC_LF: return "HEVC Loop Filter";
> + case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY: return "HEVC LF Across Slice Boundary";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP: return "HEVC QP Values";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE: return "HEVC Hierarchical Coding Type";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER: return "HEVC Hierarchical Coding Layer";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP: return "HEVC Hierarchical Layer QP";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR: return "HEVC Hierarchical Lay 0 Bit Rate";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR: return "HEVC Hierarchical Lay 1 Bit Rate";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR: return "HEVC Hierarchical Lay 2 Bit Rate";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR: return "HEVC Hierarchical Lay 3 Bit Rate";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR: return "HEVC Hierarchical Lay 4 Bit Rate";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR: return "HEVC Hierarchical Lay 5 Bit Rate";
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR: return "HEVC Hierarchical Lay 6 Bit Rate";
> + case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB: return "HEVC General PB";
> + case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID: return "HEVC Temporal ID";
> + case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING: return "HEVC Strong Intra Smoothing";
> + case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT: return "HEVC Intra PU Split";
> + case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION: return "HEVC TMV Prediction";
> + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1: return "HEVC Max Number of Candidate MVs";
> + case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE: return "HEVC ENC Without Startcode";
> + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD: return "HEVC Num of I Frame b/w 2 IDR";
s/I Frame/I-Frame/
> + case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2: return "HEVC Loop Filter Beta Offset";
> + case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2: return "HEVC Loop Filter TC Offset";
> + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: return "HEVC Size of Length Field";
> +
It is my understanding that all these V4L2_CID_MPEG_VIDEO_HEVC_ controls represent HEVC
parameters as defined by the HEVC standard, right? And not specific to your codec.
I'm pretty sure that's the case, I'm just double-checking.
Regards,
Hans
> /* CAMERA controls */
> /* Keep the order of the 'case's the same as in v4l2-controls.h! */
> case V4L2_CID_CAMERA_CLASS: return "Camera Controls";
> @@ -1067,6 +1164,12 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
> case V4L2_CID_TUNE_DEEMPHASIS:
> case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL:
> case V4L2_CID_DETECT_MD_MODE:
> + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
> + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
> *type = V4L2_CTRL_TYPE_MENU;
> break;
> case V4L2_CID_LINK_FREQ:
> diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
> index 0d2e1e0..9c32a55 100644
> --- a/include/uapi/linux/v4l2-controls.h
> +++ b/include/uapi/linux/v4l2-controls.h
> @@ -579,6 +579,85 @@ enum v4l2_vp8_golden_frame_sel {
> #define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP (V4L2_CID_MPEG_BASE+510)
> #define V4L2_CID_MPEG_VIDEO_VPX_PROFILE (V4L2_CID_MPEG_BASE+511)
>
> +/* CIDs for HEVC encoding. Number gaps are for compatibility */
> +
> +#define V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP (V4L2_CID_MPEG_BASE + 512)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP (V4L2_CID_MPEG_BASE + 513)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP (V4L2_CID_MPEG_BASE + 514)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP (V4L2_CID_MPEG_BASE + 515)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP (V4L2_CID_MPEG_BASE + 516)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP (V4L2_CID_MPEG_BASE + 517)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE (V4L2_CID_MPEG_BASE + 518)
> +enum v4l2_mpeg_video_hevc_hier_coding_type {
> + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B = 0,
> + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P = 1,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (V4L2_CID_MPEG_BASE + 519)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP (V4L2_CID_MPEG_BASE + 520)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_PROFILE (V4L2_CID_MPEG_BASE + 521)
> +enum v4l2_mpeg_video_hevc_profile {
> + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN = 0,
> + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE = 1,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LEVEL (V4L2_CID_MPEG_BASE + 522)
> +enum v4l2_mpeg_video_hevc_level {
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_1 = 0,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_2 = 1,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1 = 2,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_3 = 3,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1 = 4,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_4 = 5,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1 = 6,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_5 = 7,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1 = 8,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2 = 9,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_6 = 10,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1 = 11,
> + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 = 12,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION (V4L2_CID_MPEG_BASE + 523)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG (V4L2_CID_MPEG_BASE + 524)
> +enum v4l2_mpeg_video_hevc_tier_flag {
> + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN = 0,
> + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH = 1,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH (V4L2_CID_MPEG_BASE + 525)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LF (V4L2_CID_MPEG_BASE + 526)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY (V4L2_CID_MPEG_BASE + 527)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (V4L2_CID_MPEG_BASE + 528)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (V4L2_CID_MPEG_BASE + 529)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE (V4L2_CID_MPEG_BASE + 530)
> +enum v4l2_cid_mpeg_video_hevc_refresh_type {
> + V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE = 0,
> + V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA = 1,
> + V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR = 2,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD (V4L2_CID_MPEG_BASE + 531)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU (V4L2_CID_MPEG_BASE + 532)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED (V4L2_CID_MPEG_BASE + 533)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT (V4L2_CID_MPEG_BASE + 534)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB (V4L2_CID_MPEG_BASE + 535)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID (V4L2_CID_MPEG_BASE + 536)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING (V4L2_CID_MPEG_BASE + 537)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1 (V4L2_CID_MPEG_BASE + 538)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT (V4L2_CID_MPEG_BASE + 539)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION (V4L2_CID_MPEG_BASE + 540)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE (V4L2_CID_MPEG_BASE + 541)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD (V4L2_CID_MPEG_BASE + 542)
> +enum v4l2_cid_mpeg_video_hevc_size_of_length_field {
> + V4L2_MPEG_VIDEO_HEVC_SIZE_0 = 0,
> + V4L2_MPEG_VIDEO_HEVC_SIZE_1 = 1,
> + V4L2_MPEG_VIDEO_HEVC_SIZE_2 = 2,
> + V4L2_MPEG_VIDEO_HEVC_SIZE_4 = 3,
> +};
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR (V4L2_CID_MPEG_BASE + 543)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR (V4L2_CID_MPEG_BASE + 544)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR (V4L2_CID_MPEG_BASE + 545)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR (V4L2_CID_MPEG_BASE + 546)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR (V4L2_CID_MPEG_BASE + 547)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR (V4L2_CID_MPEG_BASE + 548)
> +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR (V4L2_CID_MPEG_BASE + 549)
> +
> /* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
> #define V4L2_CID_MPEG_CX2341X_BASE (V4L2_CTRL_CLASS_MPEG | 0x1000)
> #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE (V4L2_CID_MPEG_CX2341X_BASE+0)
> @@ -647,6 +726,11 @@ enum v4l2_mpeg_mfc51_video_force_frame_type {
> #define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC (V4L2_CID_MPEG_MFC51_BASE+53)
> #define V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P (V4L2_CID_MPEG_MFC51_BASE+54)
>
> +/* MPEG-class control IDs specific to the Samsung MFC 10.10 driver as defined by V4L2 */
> +#define V4L2_CID_MPEG_MFC10_BASE (V4L2_CTRL_CLASS_MPEG | 0x1200)
> +
> +#define V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (V4L2_CID_MPEG_MFC10_BASE+0)
> +#define V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (V4L2_CID_MPEG_MFC10_BASE+1)
>
> /* Camera class control IDs */
>
>
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 11/12] [media] s5p-mfc: Add support for HEVC encoder
2017-06-19 5:10 ` Smitha T Murthy
@ 2017-07-20 13:32 ` Hans Verkuil
-1 siblings, 0 replies; 68+ messages in thread
From: Hans Verkuil @ 2017-07-20 13:32 UTC (permalink / raw)
To: Smitha T Murthy, linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki
On 19/06/17 07:10, Smitha T Murthy wrote:
> Add HEVC encoder support and necessary registers, V4L2 CIDs,
> and hevc encoder parameters
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> ---
> drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 28 +-
> drivers/media/platform/s5p-mfc/s5p_mfc.c | 1 +
> drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c | 3 +
> drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 53 ++-
> drivers/media/platform/s5p-mfc/s5p_mfc_enc.c | 521 ++++++++++++++++++++++++
> drivers/media/platform/s5p-mfc/s5p_mfc_opr.h | 8 +
> drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 168 ++++++++
> drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 8 +
> 8 files changed, 788 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> index 6754477..7065b9d 100644
> --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> @@ -20,13 +20,35 @@
> #define S5P_FIMV_MFC_STATE_V10 0x7124
> #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10 0xF570
> #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10 0xF574
> +#define S5P_FIMV_E_NUM_T_LAYER_V10 0xFBAC
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10 0xFBB0
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10 0xFBB4
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10 0xFBB8
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10 0xFBBC
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10 0xFBC0
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10 0xFBC4
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10 0xFBC8
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10 0xFD18
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V10 0xFD1C
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V10 0xFD20
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V10 0xFD24
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V10 0xFD28
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V10 0xFD2C
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V10 0xFD30
> +#define S5P_FIMV_E_HEVC_OPTIONS_V10 0xFDD4
> +#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10 0xFDD8
> +#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10 0xFDDC
> +#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10 0xFDE0
> +#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10 0xFDE4
> +#define S5P_FIMV_E_HEVC_NAL_CONTROL_V10 0xFDE8
>
> /* MFCv10 Context buffer sizes */
> #define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
> #define MFC_H264_DEC_CTX_BUF_SIZE_V10 (2 * SZ_1M)
> #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)
> #define MFC_H264_ENC_CTX_BUF_SIZE_V10 (100 * SZ_1K)
> -#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
> +#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
> +#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
>
> /* MFCv10 variant defines */
> #define MAX_FW_SIZE_V10 (SZ_1M)
> @@ -58,5 +80,9 @@
> #define ENC_V100_VP8_ME_SIZE(x, y) \
> ENC_V100_BASE_SIZE(x, y)
>
> +#define ENC_V100_HEVC_ME_SIZE(x, y) \
> + (((x + 3) * (y + 3) * 32) \
> + + ((y * 128) + 1280) * DIV_ROUND_UP(x, 4))
> +
> #endif /*_REGS_MFC_V10_H*/
>
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
> index efc36b0..742c2b7 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
> @@ -1621,6 +1621,7 @@ static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
> .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V10,
> .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
> .h264_enc_ctx = MFC_H264_ENC_CTX_BUF_SIZE_V10,
> + .hevc_enc_ctx = MFC_HEVC_ENC_CTX_BUF_SIZE_V10,
> .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
> };
>
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> index 102b47e..7521fce 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> @@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
> case S5P_MFC_CODEC_VP8_ENC:
> codec_type = S5P_FIMV_CODEC_VP8_ENC_V7;
> break;
> + case S5P_MFC_CODEC_HEVC_ENC:
> + codec_type = S5P_FIMV_CODEC_HEVC_ENC;
> + break;
> default:
> codec_type = S5P_FIMV_CODEC_NONE_V6;
> }
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> index b49f220..c1ae4f4 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> @@ -61,7 +61,7 @@
> #define MFC_ENC_CAP_PLANE_COUNT 1
> #define MFC_ENC_OUT_PLANE_COUNT 2
> #define STUFF_BYTE 4
> -#define MFC_MAX_CTRLS 77
> +#define MFC_MAX_CTRLS 128
>
> #define S5P_MFC_CODEC_NONE -1
> #define S5P_MFC_CODEC_H264_DEC 0
> @@ -80,6 +80,7 @@
> #define S5P_MFC_CODEC_MPEG4_ENC 22
> #define S5P_MFC_CODEC_H263_ENC 23
> #define S5P_MFC_CODEC_VP8_ENC 24
> +#define S5P_MFC_CODEC_HEVC_ENC 26
>
> #define S5P_MFC_R2H_CMD_EMPTY 0
> #define S5P_MFC_R2H_CMD_SYS_INIT_RET 1
> @@ -215,6 +216,7 @@ struct s5p_mfc_buf_size_v6 {
> unsigned int h264_dec_ctx;
> unsigned int other_dec_ctx;
> unsigned int h264_enc_ctx;
> + unsigned int hevc_enc_ctx;
> unsigned int other_enc_ctx;
> };
>
> @@ -429,6 +431,54 @@ struct s5p_mfc_vp8_enc_params {
> u8 profile;
> };
>
> +struct s5p_mfc_hevc_enc_params {
> + enum v4l2_mpeg_video_hevc_profile profile;
> + int level;
> + enum v4l2_mpeg_video_h264_level level_v4l2;
> + u8 tier_flag;
> + u32 rc_framerate;
> + u8 rc_min_qp;
> + u8 rc_max_qp;
> + u8 rc_lcu_dark;
> + u8 rc_lcu_smooth;
> + u8 rc_lcu_static;
> + u8 rc_lcu_activity;
> + u8 rc_frame_qp;
> + u8 rc_p_frame_qp;
> + u8 rc_b_frame_qp;
> + u8 max_partition_depth;
> + u8 num_refs_for_p;
> + u8 refreshtype;
> + u16 refreshperiod;
> + s32 lf_beta_offset_div2;
> + s32 lf_tc_offset_div2;
> + u8 loopfilter_disable;
> + u8 loopfilter_across;
> + u8 nal_control_length_filed;
> + u8 nal_control_user_ref;
> + u8 nal_control_store_ref;
> + u8 const_intra_period_enable;
> + u8 lossless_cu_enable;
> + u8 wavefront_enable;
> + u8 enable_ltr;
> + u8 hier_qp_enable;
> + enum v4l2_mpeg_video_hevc_hier_coding_type hier_qp_type;
> + u8 num_hier_layer;
> + u8 hier_qp_layer[7];
> + u32 hier_bit_layer[7];
> + u8 sign_data_hiding;
> + u8 general_pb_enable;
> + u8 temporal_id_enable;
> + u8 strong_intra_smooth;
> + u8 intra_pu_split_disable;
> + u8 tmv_prediction_disable;
> + u8 max_num_merge_mv;
> + u8 eco_mode_enable;
> + u8 encoding_nostartcode_enable;
> + u8 size_of_length_field;
> + u8 prepend_sps_pps_to_idr;
> +};
> +
> /**
> * struct s5p_mfc_enc_params - general encoding parameters
> */
> @@ -466,6 +516,7 @@ struct s5p_mfc_enc_params {
> struct s5p_mfc_h264_enc_params h264;
> struct s5p_mfc_mpeg4_enc_params mpeg4;
> struct s5p_mfc_vp8_enc_params vp8;
> + struct s5p_mfc_hevc_enc_params hevc;
> } codec;
>
> };
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> index eb5352a..9e5b05a 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> @@ -99,6 +99,14 @@ static struct s5p_mfc_fmt formats[] = {
> .num_planes = 1,
> .versions = MFC_V7PLUS_BITS,
> },
> + {
> + .name = "HEVC Encoded Stream",
Drop the names! They are filled in by the v4l2 core.
It's a good idea to have an earlier patch that just removes these names
from the existing formats.
> + .fourcc = V4L2_PIX_FMT_HEVC,
> + .codec_mode = S5P_FIMV_CODEC_HEVC_ENC,
> + .type = MFC_FMT_ENC,
> + .num_planes = 1,
> + .versions = MFC_V10_BIT,
> + },
> };
>
> #define NUM_FORMATS ARRAY_SIZE(formats)
> @@ -693,6 +701,366 @@ static struct mfc_control controls[] = {
> .default_value = 0,
> },
> {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC I Frame QP Value",
Don't set the name! Again, it's filled in by v4l2-ctrls.c.
I am not keen on arrays like this. First of all they duplicate struct v4l2_ctrl_config.
And secondly, I prefer it if you just call the v4l2_ctrl_new_std* functions to create
new controls.
> + .minimum = 0,
> + .maximum = 51,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC P Frame QP Value",
> + .minimum = 0,
> + .maximum = 51,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC B Frame QP Value",
> + .minimum = 0,
> + .maximum = 51,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Minimum QP Value",
> + .minimum = 0,
> + .maximum = 51,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Maximum QP Value",
> + .minimum = 0,
> + .maximum = 51,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
> + .type = V4L2_CTRL_TYPE_MENU,
> + .name = "HEVC Profile",
> + .minimum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> + .maximum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE,
> + .step = 1,
> + .default_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
> + .type = V4L2_CTRL_TYPE_MENU,
> + .name = "HEVC Level",
> + .minimum = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> + .maximum = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
> + .step = 1,
> + .default_value = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG,
> + .type = V4L2_CTRL_TYPE_MENU,
> + .name = "HEVC Tier_flag",
> + .minimum = V4L2_MPEG_VIDEO_HEVC_TIER_MAIN,
> + .maximum = V4L2_MPEG_VIDEO_HEVC_TIER_HIGH,
> + .step = 1,
> + .default_value = V4L2_MPEG_VIDEO_HEVC_TIER_MAIN,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Frame Rate Resolution",
> + .minimum = 1,
> + .maximum = (1 << 16) - 1,
> + .step = 1,
> + .default_value = 1,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Maximum Coding Unit Depth",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Num of Reference Pictures",
> + .minimum = 1,
> + .maximum = 2,
> + .step = 1,
> + .default_value = 1,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE,
> + .type = V4L2_CTRL_TYPE_MENU,
> + .name = "HEVC Refresh Type",
> + .minimum = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
> + .maximum = V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR,
> + .step = 1,
> + .default_value = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC Constant Intra Prediction",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC Lossless Encoding",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC Wavefront",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_LF,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC Loop Filter",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC LF Across Slice Boundary",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC QP Values",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE,
> + .type = V4L2_CTRL_TYPE_MENU,
> + .name = "HEVC Hierarchical Coding Type",
> + .minimum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
> + .maximum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P,
> + .step = 1,
> + .default_value = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Coding Layer",
> + .minimum = 0,
> + .maximum = 6,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Layer QP",
> + .minimum = INT_MIN,
> + .maximum = INT_MAX,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Lay 0 Bit Rate",
> + .minimum = INT_MIN,
> + .maximum = INT_MAX,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Lay 1 Bit Rate",
> + .minimum = INT_MIN,
> + .maximum = INT_MAX,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Lay 2 Bit Rate",
> + .minimum = INT_MIN,
> + .maximum = INT_MAX,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Lay 3 Bit Rate",
> + .minimum = INT_MIN,
> + .maximum = INT_MAX,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Lay 4 Bit Rate",
> + .minimum = INT_MIN,
> + .maximum = INT_MAX,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Lay 5 Bit Rate",
> + .minimum = INT_MIN,
> + .maximum = INT_MAX,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Lay 6 Bit Rate",
> + .minimum = INT_MIN,
> + .maximum = INT_MAX,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC General PB",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC Temporal ID",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC Strong Intra Smoothing",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC Intra PU Split",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC TMV Prediction",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Max Number of Candidate MVs",
> + .minimum = 0,
> + .maximum = 4,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC ENC Without Startcode",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Num of I Frames b/w 2 IDR",
> + .minimum = 0,
> + .maximum = (1 << 16) - 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Loop Filter Beta Offset",
> + .minimum = -6,
> + .maximum = 6,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Loop Filter TC Offset",
> + .minimum = -6,
> + .maximum = 6,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD,
> + .type = V4L2_CTRL_TYPE_MENU,
> + .name = "HEVC Size of Length Field",
> + .minimum = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
> + .maximum = V4L2_MPEG_VIDEO_HEVC_SIZE_4,
> + .step = 1,
> + .default_value = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
> + },
> + {
> + .id = V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "Prepend SPS/PPS to IDR",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> .id = V4L2_CID_MIN_BUFFERS_FOR_OUTPUT,
> .type = V4L2_CTRL_TYPE_INTEGER,
> .name = "Minimum number of output bufs",
> @@ -1359,6 +1727,26 @@ static inline int mpeg4_level(enum v4l2_mpeg_video_mpeg4_level lvl)
> return t[lvl];
> }
>
> +static inline int hevc_level(enum v4l2_mpeg_video_hevc_level lvl)
> +{
> + static unsigned int t[] = {
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_1 */ 10,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_2 */ 20,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1 */ 21,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_3 */ 30,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1 */ 31,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_4 */ 40,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1 */ 41,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5 */ 50,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1 */ 51,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2 */ 52,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6 */ 60,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1 */ 61,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 */ 62,
> + };
> + return t[lvl];
> +}
> +
> static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar)
> {
> static unsigned int t[V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED + 1] = {
> @@ -1635,6 +2023,139 @@ static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl)
> case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:
> p->codec.vp8.profile = ctrl->val;
> break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:
> + p->codec.hevc.rc_frame_qp = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:
> + p->codec.hevc.rc_p_frame_qp = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:
> + p->codec.hevc.rc_b_frame_qp = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:
> + p->codec.hevc.rc_framerate = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:
> + p->codec.hevc.rc_min_qp = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:
> + p->codec.hevc.rc_max_qp = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> + p->codec.hevc.level_v4l2 = ctrl->val;
> + p->codec.hevc.level = hevc_level(ctrl->val);
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> + switch (ctrl->val) {
> + case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN:
> + p->codec.hevc.profile =
> + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN;
> + break;
> + case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE:
> + p->codec.hevc.profile =
> + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE;
> + break;
> + default:
> + ret = -EINVAL;
> + }
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
> + p->codec.hevc.tier_flag = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:
> + p->codec.hevc.max_partition_depth = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:
> + p->codec.hevc.num_refs_for_p = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> + p->codec.hevc.refreshtype = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:
> + p->codec.hevc.const_intra_period_enable = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:
> + p->codec.hevc.lossless_cu_enable = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:
> + p->codec.hevc.wavefront_enable = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_LF:
> + p->codec.hevc.loopfilter_disable = (ctrl->val ^ 1);
Yuck. Just do !ctrl->val. Ditto below.
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:
> + p->codec.hevc.loopfilter_across = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP:
> + p->codec.hevc.hier_qp_enable = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
> + p->codec.hevc.hier_qp_type = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER:
> + p->codec.hevc.num_hier_layer = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP:
> + p->codec.hevc.hier_qp_layer[(ctrl->val >> 16) & 0x7]
> + = ctrl->val & 0xFF;
Yuck. I'll discuss this in the documentation patch.
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR:
> + p->codec.hevc.hier_bit_layer[0] = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR:
> + p->codec.hevc.hier_bit_layer[1] = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR:
> + p->codec.hevc.hier_bit_layer[2] = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR:
> + p->codec.hevc.hier_bit_layer[3] = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR:
> + p->codec.hevc.hier_bit_layer[4] = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR:
> + p->codec.hevc.hier_bit_layer[5] = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR:
> + p->codec.hevc.hier_bit_layer[6] = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:
> + p->codec.hevc.general_pb_enable = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:
> + p->codec.hevc.temporal_id_enable = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:
> + p->codec.hevc.strong_intra_smooth = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:
> + p->codec.hevc.intra_pu_split_disable = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:
> + p->codec.hevc.tmv_prediction_disable = (ctrl->val ^ 1);
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:
> + p->codec.hevc.max_num_merge_mv = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:
> + p->codec.hevc.encoding_nostartcode_enable = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:
> + p->codec.hevc.refreshperiod = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:
> + p->codec.hevc.lf_beta_offset_div2 = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:
> + p->codec.hevc.lf_tc_offset_div2 = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> + p->codec.hevc.size_of_length_field = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:
> + p->codec.hevc.prepend_sps_pps_to_idr = ctrl->val;
> + break;
> default:
> v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n",
> ctrl->id, ctrl->val);
Regards,
Hans
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 11/12] [media] s5p-mfc: Add support for HEVC encoder
@ 2017-07-20 13:32 ` Hans Verkuil
0 siblings, 0 replies; 68+ messages in thread
From: Hans Verkuil @ 2017-07-20 13:32 UTC (permalink / raw)
To: linux-arm-kernel
On 19/06/17 07:10, Smitha T Murthy wrote:
> Add HEVC encoder support and necessary registers, V4L2 CIDs,
> and hevc encoder parameters
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> ---
> drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 28 +-
> drivers/media/platform/s5p-mfc/s5p_mfc.c | 1 +
> drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c | 3 +
> drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 53 ++-
> drivers/media/platform/s5p-mfc/s5p_mfc_enc.c | 521 ++++++++++++++++++++++++
> drivers/media/platform/s5p-mfc/s5p_mfc_opr.h | 8 +
> drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 168 ++++++++
> drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 8 +
> 8 files changed, 788 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> index 6754477..7065b9d 100644
> --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> @@ -20,13 +20,35 @@
> #define S5P_FIMV_MFC_STATE_V10 0x7124
> #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10 0xF570
> #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10 0xF574
> +#define S5P_FIMV_E_NUM_T_LAYER_V10 0xFBAC
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10 0xFBB0
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10 0xFBB4
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10 0xFBB8
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10 0xFBBC
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10 0xFBC0
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10 0xFBC4
> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10 0xFBC8
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10 0xFD18
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V10 0xFD1C
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V10 0xFD20
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V10 0xFD24
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V10 0xFD28
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V10 0xFD2C
> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V10 0xFD30
> +#define S5P_FIMV_E_HEVC_OPTIONS_V10 0xFDD4
> +#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10 0xFDD8
> +#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10 0xFDDC
> +#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10 0xFDE0
> +#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10 0xFDE4
> +#define S5P_FIMV_E_HEVC_NAL_CONTROL_V10 0xFDE8
>
> /* MFCv10 Context buffer sizes */
> #define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
> #define MFC_H264_DEC_CTX_BUF_SIZE_V10 (2 * SZ_1M)
> #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)
> #define MFC_H264_ENC_CTX_BUF_SIZE_V10 (100 * SZ_1K)
> -#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
> +#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
> +#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
>
> /* MFCv10 variant defines */
> #define MAX_FW_SIZE_V10 (SZ_1M)
> @@ -58,5 +80,9 @@
> #define ENC_V100_VP8_ME_SIZE(x, y) \
> ENC_V100_BASE_SIZE(x, y)
>
> +#define ENC_V100_HEVC_ME_SIZE(x, y) \
> + (((x + 3) * (y + 3) * 32) \
> + + ((y * 128) + 1280) * DIV_ROUND_UP(x, 4))
> +
> #endif /*_REGS_MFC_V10_H*/
>
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
> index efc36b0..742c2b7 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
> @@ -1621,6 +1621,7 @@ static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
> .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V10,
> .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
> .h264_enc_ctx = MFC_H264_ENC_CTX_BUF_SIZE_V10,
> + .hevc_enc_ctx = MFC_HEVC_ENC_CTX_BUF_SIZE_V10,
> .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
> };
>
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> index 102b47e..7521fce 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> @@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
> case S5P_MFC_CODEC_VP8_ENC:
> codec_type = S5P_FIMV_CODEC_VP8_ENC_V7;
> break;
> + case S5P_MFC_CODEC_HEVC_ENC:
> + codec_type = S5P_FIMV_CODEC_HEVC_ENC;
> + break;
> default:
> codec_type = S5P_FIMV_CODEC_NONE_V6;
> }
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> index b49f220..c1ae4f4 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> @@ -61,7 +61,7 @@
> #define MFC_ENC_CAP_PLANE_COUNT 1
> #define MFC_ENC_OUT_PLANE_COUNT 2
> #define STUFF_BYTE 4
> -#define MFC_MAX_CTRLS 77
> +#define MFC_MAX_CTRLS 128
>
> #define S5P_MFC_CODEC_NONE -1
> #define S5P_MFC_CODEC_H264_DEC 0
> @@ -80,6 +80,7 @@
> #define S5P_MFC_CODEC_MPEG4_ENC 22
> #define S5P_MFC_CODEC_H263_ENC 23
> #define S5P_MFC_CODEC_VP8_ENC 24
> +#define S5P_MFC_CODEC_HEVC_ENC 26
>
> #define S5P_MFC_R2H_CMD_EMPTY 0
> #define S5P_MFC_R2H_CMD_SYS_INIT_RET 1
> @@ -215,6 +216,7 @@ struct s5p_mfc_buf_size_v6 {
> unsigned int h264_dec_ctx;
> unsigned int other_dec_ctx;
> unsigned int h264_enc_ctx;
> + unsigned int hevc_enc_ctx;
> unsigned int other_enc_ctx;
> };
>
> @@ -429,6 +431,54 @@ struct s5p_mfc_vp8_enc_params {
> u8 profile;
> };
>
> +struct s5p_mfc_hevc_enc_params {
> + enum v4l2_mpeg_video_hevc_profile profile;
> + int level;
> + enum v4l2_mpeg_video_h264_level level_v4l2;
> + u8 tier_flag;
> + u32 rc_framerate;
> + u8 rc_min_qp;
> + u8 rc_max_qp;
> + u8 rc_lcu_dark;
> + u8 rc_lcu_smooth;
> + u8 rc_lcu_static;
> + u8 rc_lcu_activity;
> + u8 rc_frame_qp;
> + u8 rc_p_frame_qp;
> + u8 rc_b_frame_qp;
> + u8 max_partition_depth;
> + u8 num_refs_for_p;
> + u8 refreshtype;
> + u16 refreshperiod;
> + s32 lf_beta_offset_div2;
> + s32 lf_tc_offset_div2;
> + u8 loopfilter_disable;
> + u8 loopfilter_across;
> + u8 nal_control_length_filed;
> + u8 nal_control_user_ref;
> + u8 nal_control_store_ref;
> + u8 const_intra_period_enable;
> + u8 lossless_cu_enable;
> + u8 wavefront_enable;
> + u8 enable_ltr;
> + u8 hier_qp_enable;
> + enum v4l2_mpeg_video_hevc_hier_coding_type hier_qp_type;
> + u8 num_hier_layer;
> + u8 hier_qp_layer[7];
> + u32 hier_bit_layer[7];
> + u8 sign_data_hiding;
> + u8 general_pb_enable;
> + u8 temporal_id_enable;
> + u8 strong_intra_smooth;
> + u8 intra_pu_split_disable;
> + u8 tmv_prediction_disable;
> + u8 max_num_merge_mv;
> + u8 eco_mode_enable;
> + u8 encoding_nostartcode_enable;
> + u8 size_of_length_field;
> + u8 prepend_sps_pps_to_idr;
> +};
> +
> /**
> * struct s5p_mfc_enc_params - general encoding parameters
> */
> @@ -466,6 +516,7 @@ struct s5p_mfc_enc_params {
> struct s5p_mfc_h264_enc_params h264;
> struct s5p_mfc_mpeg4_enc_params mpeg4;
> struct s5p_mfc_vp8_enc_params vp8;
> + struct s5p_mfc_hevc_enc_params hevc;
> } codec;
>
> };
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> index eb5352a..9e5b05a 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> @@ -99,6 +99,14 @@ static struct s5p_mfc_fmt formats[] = {
> .num_planes = 1,
> .versions = MFC_V7PLUS_BITS,
> },
> + {
> + .name = "HEVC Encoded Stream",
Drop the names! They are filled in by the v4l2 core.
It's a good idea to have an earlier patch that just removes these names
from the existing formats.
> + .fourcc = V4L2_PIX_FMT_HEVC,
> + .codec_mode = S5P_FIMV_CODEC_HEVC_ENC,
> + .type = MFC_FMT_ENC,
> + .num_planes = 1,
> + .versions = MFC_V10_BIT,
> + },
> };
>
> #define NUM_FORMATS ARRAY_SIZE(formats)
> @@ -693,6 +701,366 @@ static struct mfc_control controls[] = {
> .default_value = 0,
> },
> {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC I Frame QP Value",
Don't set the name! Again, it's filled in by v4l2-ctrls.c.
I am not keen on arrays like this. First of all they duplicate struct v4l2_ctrl_config.
And secondly, I prefer it if you just call the v4l2_ctrl_new_std* functions to create
new controls.
> + .minimum = 0,
> + .maximum = 51,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC P Frame QP Value",
> + .minimum = 0,
> + .maximum = 51,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC B Frame QP Value",
> + .minimum = 0,
> + .maximum = 51,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Minimum QP Value",
> + .minimum = 0,
> + .maximum = 51,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Maximum QP Value",
> + .minimum = 0,
> + .maximum = 51,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
> + .type = V4L2_CTRL_TYPE_MENU,
> + .name = "HEVC Profile",
> + .minimum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> + .maximum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE,
> + .step = 1,
> + .default_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
> + .type = V4L2_CTRL_TYPE_MENU,
> + .name = "HEVC Level",
> + .minimum = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> + .maximum = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
> + .step = 1,
> + .default_value = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG,
> + .type = V4L2_CTRL_TYPE_MENU,
> + .name = "HEVC Tier_flag",
> + .minimum = V4L2_MPEG_VIDEO_HEVC_TIER_MAIN,
> + .maximum = V4L2_MPEG_VIDEO_HEVC_TIER_HIGH,
> + .step = 1,
> + .default_value = V4L2_MPEG_VIDEO_HEVC_TIER_MAIN,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Frame Rate Resolution",
> + .minimum = 1,
> + .maximum = (1 << 16) - 1,
> + .step = 1,
> + .default_value = 1,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Maximum Coding Unit Depth",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Num of Reference Pictures",
> + .minimum = 1,
> + .maximum = 2,
> + .step = 1,
> + .default_value = 1,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE,
> + .type = V4L2_CTRL_TYPE_MENU,
> + .name = "HEVC Refresh Type",
> + .minimum = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
> + .maximum = V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR,
> + .step = 1,
> + .default_value = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC Constant Intra Prediction",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC Lossless Encoding",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC Wavefront",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_LF,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC Loop Filter",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC LF Across Slice Boundary",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC QP Values",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE,
> + .type = V4L2_CTRL_TYPE_MENU,
> + .name = "HEVC Hierarchical Coding Type",
> + .minimum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
> + .maximum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P,
> + .step = 1,
> + .default_value = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Coding Layer",
> + .minimum = 0,
> + .maximum = 6,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Layer QP",
> + .minimum = INT_MIN,
> + .maximum = INT_MAX,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Lay 0 Bit Rate",
> + .minimum = INT_MIN,
> + .maximum = INT_MAX,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Lay 1 Bit Rate",
> + .minimum = INT_MIN,
> + .maximum = INT_MAX,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Lay 2 Bit Rate",
> + .minimum = INT_MIN,
> + .maximum = INT_MAX,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Lay 3 Bit Rate",
> + .minimum = INT_MIN,
> + .maximum = INT_MAX,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Lay 4 Bit Rate",
> + .minimum = INT_MIN,
> + .maximum = INT_MAX,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Lay 5 Bit Rate",
> + .minimum = INT_MIN,
> + .maximum = INT_MAX,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Hierarchical Lay 6 Bit Rate",
> + .minimum = INT_MIN,
> + .maximum = INT_MAX,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC General PB",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC Temporal ID",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC Strong Intra Smoothing",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC Intra PU Split",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC TMV Prediction",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Max Number of Candidate MVs",
> + .minimum = 0,
> + .maximum = 4,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "HEVC ENC Without Startcode",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Num of I Frames b/w 2 IDR",
> + .minimum = 0,
> + .maximum = (1 << 16) - 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Loop Filter Beta Offset",
> + .minimum = -6,
> + .maximum = 6,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "HEVC Loop Filter TC Offset",
> + .minimum = -6,
> + .maximum = 6,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD,
> + .type = V4L2_CTRL_TYPE_MENU,
> + .name = "HEVC Size of Length Field",
> + .minimum = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
> + .maximum = V4L2_MPEG_VIDEO_HEVC_SIZE_4,
> + .step = 1,
> + .default_value = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
> + },
> + {
> + .id = V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "Prepend SPS/PPS to IDR",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> + {
> .id = V4L2_CID_MIN_BUFFERS_FOR_OUTPUT,
> .type = V4L2_CTRL_TYPE_INTEGER,
> .name = "Minimum number of output bufs",
> @@ -1359,6 +1727,26 @@ static inline int mpeg4_level(enum v4l2_mpeg_video_mpeg4_level lvl)
> return t[lvl];
> }
>
> +static inline int hevc_level(enum v4l2_mpeg_video_hevc_level lvl)
> +{
> + static unsigned int t[] = {
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_1 */ 10,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_2 */ 20,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1 */ 21,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_3 */ 30,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1 */ 31,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_4 */ 40,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1 */ 41,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5 */ 50,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1 */ 51,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2 */ 52,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6 */ 60,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1 */ 61,
> + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 */ 62,
> + };
> + return t[lvl];
> +}
> +
> static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar)
> {
> static unsigned int t[V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED + 1] = {
> @@ -1635,6 +2023,139 @@ static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl)
> case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:
> p->codec.vp8.profile = ctrl->val;
> break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:
> + p->codec.hevc.rc_frame_qp = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:
> + p->codec.hevc.rc_p_frame_qp = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:
> + p->codec.hevc.rc_b_frame_qp = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:
> + p->codec.hevc.rc_framerate = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:
> + p->codec.hevc.rc_min_qp = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:
> + p->codec.hevc.rc_max_qp = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> + p->codec.hevc.level_v4l2 = ctrl->val;
> + p->codec.hevc.level = hevc_level(ctrl->val);
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> + switch (ctrl->val) {
> + case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN:
> + p->codec.hevc.profile =
> + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN;
> + break;
> + case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE:
> + p->codec.hevc.profile =
> + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE;
> + break;
> + default:
> + ret = -EINVAL;
> + }
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
> + p->codec.hevc.tier_flag = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:
> + p->codec.hevc.max_partition_depth = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:
> + p->codec.hevc.num_refs_for_p = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> + p->codec.hevc.refreshtype = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:
> + p->codec.hevc.const_intra_period_enable = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:
> + p->codec.hevc.lossless_cu_enable = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:
> + p->codec.hevc.wavefront_enable = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_LF:
> + p->codec.hevc.loopfilter_disable = (ctrl->val ^ 1);
Yuck. Just do !ctrl->val. Ditto below.
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:
> + p->codec.hevc.loopfilter_across = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP:
> + p->codec.hevc.hier_qp_enable = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
> + p->codec.hevc.hier_qp_type = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER:
> + p->codec.hevc.num_hier_layer = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP:
> + p->codec.hevc.hier_qp_layer[(ctrl->val >> 16) & 0x7]
> + = ctrl->val & 0xFF;
Yuck. I'll discuss this in the documentation patch.
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR:
> + p->codec.hevc.hier_bit_layer[0] = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR:
> + p->codec.hevc.hier_bit_layer[1] = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR:
> + p->codec.hevc.hier_bit_layer[2] = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR:
> + p->codec.hevc.hier_bit_layer[3] = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR:
> + p->codec.hevc.hier_bit_layer[4] = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR:
> + p->codec.hevc.hier_bit_layer[5] = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR:
> + p->codec.hevc.hier_bit_layer[6] = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:
> + p->codec.hevc.general_pb_enable = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:
> + p->codec.hevc.temporal_id_enable = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:
> + p->codec.hevc.strong_intra_smooth = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:
> + p->codec.hevc.intra_pu_split_disable = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:
> + p->codec.hevc.tmv_prediction_disable = (ctrl->val ^ 1);
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:
> + p->codec.hevc.max_num_merge_mv = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:
> + p->codec.hevc.encoding_nostartcode_enable = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:
> + p->codec.hevc.refreshperiod = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:
> + p->codec.hevc.lf_beta_offset_div2 = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:
> + p->codec.hevc.lf_tc_offset_div2 = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> + p->codec.hevc.size_of_length_field = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:
> + p->codec.hevc.prepend_sps_pps_to_idr = ctrl->val;
> + break;
> default:
> v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n",
> ctrl->id, ctrl->val);
Regards,
Hans
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
2017-06-19 5:10 ` Smitha T Murthy
@ 2017-07-20 14:50 ` Hans Verkuil
-1 siblings, 0 replies; 68+ messages in thread
From: Hans Verkuil @ 2017-07-20 14:50 UTC (permalink / raw)
To: Smitha T Murthy, linux-arm-kernel, linux-media, linux-kernel
Cc: kyungmin.park, kamil, jtp.park, a.hajda, mchehab, pankaj.dubey,
krzk, m.szyprowski, s.nawrocki
On 19/06/17 07:10, Smitha T Murthy wrote:
> Added V4l2 controls for HEVC encoder
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> ---
> Documentation/media/uapi/v4l/extended-controls.rst | 364 +++++++++++++++++++++
> 1 file changed, 364 insertions(+)
>
> diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
> index abb1057..7767c70 100644
> --- a/Documentation/media/uapi/v4l/extended-controls.rst
> +++ b/Documentation/media/uapi/v4l/extended-controls.rst
> @@ -1960,6 +1960,370 @@ enum v4l2_vp8_golden_frame_sel -
> 1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
>
>
> +High Efficiency Video Coding (HEVC/H.265) Control Reference
> +-----------------------------------------------------------
> +
> +The HEVC/H.265 controls include controls for encoding parameters of HEVC/H.265
> +video codec.
> +
> +
> +.. _hevc-control-id:
> +
> +HEVC/H.265 Control IDs
> +^^^^^^^^^^^^^^^^^^^^^^
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP (integer)``
> + Minimum quantization parameter for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP (integer)``
> + Maximum quantization parameter for HEVC.
It's a bit ambiguous. Are these supposed to be read-only parameters?
Normally min-max is already implied in the control range, so this is a
bit odd. Perhaps it is clear for people who know HEVC, but I'm not
quite sure what to make of it.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP (integer)``
> + Quantization parameter for an I frame for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP (integer)``
> + Quantization parameter for a P frame for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP (integer)``
> + Quantization parameter for a B frame for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP (boolean)``
> + HIERARCHICAL_QP allows host to specify the quantization parameter values
> + for each temporal layer through HIERARCHICAL_QP_LAYER. This is valid only
> + if HIERARCHICAL_CODING_LAYER is greater than 1. Setting the control value
> + to 1 enables setting of the QP values for the layers.
> +
> +.. _v4l2-hevc-hier-coding-type:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE``
> + (enum)
> +
> +enum v4l2_mpeg_video_hevc_hier_coding_type -
> + Selects the hierarchical coding type for encoding. Possible values are:
> +
> +.. raw:: latex
> +
> + \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> + :header-rows: 0
> + :stub-columns: 0
> +
> + * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B``
> + - Use the B frame for hierarchical coding.
> + * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P``
> + - Use the P frame for hierarchical coding.
> +
> +.. raw:: latex
> +
> + \end{adjustbox}
> +
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (integer)``
> + Selects the hierarchical coding layer. In normal encoding
> + (non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
> + 0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
> + LAYER 1 and so on.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP (integer)``
> + Indicates the hierarchical coding layer quantization parameter.
> + For HEVC it can have a value of 0-51. Hence in the control value passed
> + the LSB 16 bits will indicate the quantization parameter. The MSB 16 bit
> + will pass the layer(0-6) it is meant for.
This is ugly. Why not make this an array control? This really is an array of
7 values, right? An alternative is to split this in 7 controls just as you did
with V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L?_BR.
The way it is now doesn't work either since G_CTRL(V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP)
would just return the QP for whatever was the last layer you set it for and you can't
query it for another layer.
> +
> +.. _v4l2-hevc-profile:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
> + (enum)
> +
> +enum v4l2_mpeg_video_hevc_profile -
> + Select the desired profile for HEVC encoder.
> +
> +.. raw:: latex
> +
> + \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> + :header-rows: 0
> + :stub-columns: 0
> +
> + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
> + - Main profile.
> + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
> + - Main still picture profile.
> +
> +.. raw:: latex
> +
> + \end{adjustbox}
> +
> +
> +.. _v4l2-hevc-level:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LEVEL``
> + (enum)
> +
> +enum v4l2_mpeg_video_hevc_level -
> + Selects the desired level for HEVC encoder.
> +
> +.. raw:: latex
> +
> + \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> + :header-rows: 0
> + :stub-columns: 0
> +
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_1``
> + - Level 1.0
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2``
> + - Level 2.0
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1``
> + - Level 2.1
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3``
> + - Level 3.0
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1``
> + - Level 3.1
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4``
> + - Level 4.0
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1``
> + - Level 4.1
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5``
> + - Level 5.0
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1``
> + - Level 5.1
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2``
> + - Level 5.2
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6``
> + - Level 6.0
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1``
> + - Level 6.1
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2``
> + - Level 6.2
> +
> +.. raw:: latex
> +
> + \end{adjustbox}
> +
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION (integer)``
> + Indicates the number of evenly spaced subintervals, called ticks, within
> + one second. This is a 16bit unsigned integer and has a maximum value up to
16bit -> 16 bit
> + 0xffff.
Is there a HEVC-defined minimum value as well? You mention the max value, but not
the min value, so it made me wonder...
> +
> +.. _v4l2-hevc-tier-flag:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG``
> + (enum)
> +
> +enum v4l2_mpeg_video_hevc_tier_flag -
> + TIER_FLAG specifies tiers information of the HEVC encoded picture. Tier
> + were made to deal with applications that differ in terms of maximum bit
> + rate. Setting the flag to 0 selects HEVC tier_flag as Main tier and setting
> + this flag to 1 indicates High tier. High tier is for applications requiring
> + high bit rates.
> +
> +.. raw:: latex
> +
> + \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> + :header-rows: 0
> + :stub-columns: 0
> +
> + * - ``V4L2_MPEG_VIDEO_HEVC_TIER_MAIN``
> + - Main tier.
> + * - ``V4L2_MPEG_VIDEO_HEVC_TIER_HIGH``
> + - High tier.
> +
> +.. raw:: latex
> +
> + \end{adjustbox}
> +
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH (integer)``
> + Selects HEVC maximum coding unit depth.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF (boolean)``
> + Indicates loop filtering. Control value 1 indicates loop filtering
> + is enabled and when set to 0 indicates loop filtering is disabled.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY (boolean)``
> + Selects whether to apply the loop filter across the slice boundary or not.
> + If the value is 0, loop filter will not be applied across the slice boundary.
> + If the value is 1, loop filter will be applied across the slice boundary.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (integer)``
> + Selects HEVC loop filter beta offset. The valid range is [-6, +6].
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (integer)``
> + Selects HEVC loop filter tc offset. The valid range is [-6, +6].
> +
> +.. _v4l2-hevc-refresh-type:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE``
> + (enum)
> +
> +enum v4l2_mpeg_video_hevc_hier_refresh_type -
> + Selects refresh type for HEVC encoder.
> + Host has to specify the period into
> + HEVC_REFRESH_PERIOD.
'into HEVC_REFRESH_PERIOD' -> with the ``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD`` control
> +
> +.. raw:: latex
> +
> + \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> + :header-rows: 0
> + :stub-columns: 0
> +
> + * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE``
> + - Use the B frame for hierarchical coding.
> + * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA``
> + - Use CRA (Clean Random Access Unit) picture encoding.
> + * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR``
> + - Use IDR picture encoding.
> +
> +.. raw:: latex
> +
> + \end{adjustbox}
> +
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD (integer)``
> + Selects the refresh period for HEVC encoder.
> + This specifies the number of I pictures between two CRA/IDR pictures.
> + This is valid only if REFRESH_TYPE is not 0.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU (boolean)``
> + Indicates HEVC lossless encoding. Setting it to 0 disables lossless
> + encoding. Setting it to 1 enables lossless encoding.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED (boolean)``
> + Indicates constant intra prediction for HEVC encoder. Specifies the
> + constrained intra prediction in which intra largest coding unit (LCU)
> + prediction is performed by using residual data and decoded samples of
> + neighboring intra LCU only. Setting the value to 1 enables constant intra
> + prediction and setting the value to 0 disables constant inta prediction.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT (boolean)``
> + Indicates wavefront parallel processing for HEVC encoder. Setting it to 0
> + disables the feature and setting it to 1 enables the wavefront parallel
> + processing.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB (boolean)``
> + Setting the value to 1 enables combination of P and B frame for HEVC
> + encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID (boolean)``
> + Indicates temporal identifier for HEVC encoder which is enabled by
> + setting the value to 1.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING (boolean)``
> + Indicates bi-linear interpolation is conditionally used in the intra
> + prediction filtering process in the CVS when set to 1. Indicates bi-linear
> + interpolation is not used in the CVS when set to 0.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1 (integer)``
> + Indicates maximum number of merge candidate motion vectors.
> + Values are from zero to four.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION (boolean)``
> + Indicates temporal motion vector prediction for HEVC encoder. Setting it to
> + 1 enables the prediction. Setting it to 0 disables the prediction.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE (boolean)``
> + Specifies if HEVC generates a stream with a size of the length field
> + instead of start code pattern. The size of the length field is configurable
> + through the V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD control. Setting
> + the value to 0 disables encoding without startcode pattern. Setting the
> + value to 1 will enables encoding without startcode pattern.
> +
> +.. _v4l2-hevc-size-of-length-field:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD``
> +(enum)
> +
> +enum v4l2_mpeg_video_hevc_size_of_length_field -
> + Indicates the size of length field.
> + This is valid when encoding WITHOUT_STARTCODE_ENABLE is enabled.
> +
> +.. raw:: latex
> +
> + \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> + :header-rows: 0
> + :stub-columns: 0
> +
> + * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_0``
> + - Generate start code pattern (Normal).
> + * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_1``
> + - Generate size of length field instead of start code pattern and length is 1.
> + * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_2``
> + - Generate size of length field instead of start code pattern and length is 2.
> + * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_4``
> + - Generate size of length field instead of start code pattern and length is 4.
> +
> +.. raw:: latex
> +
> + \end{adjustbox}
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR (integer)``
> + Indicates bit rate for hierarchical coding layer 0 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR (integer)``
> + Indicates bit rate for hierarchical coding layer 1 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR (integer)``
> + Indicates bit rate for hierarchical coding layer 2 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR (integer)``
> + Indicates bit rate for hierarchical coding layer 3 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR (integer)``
> + Indicates bit rate for hierarchical coding layer 4 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR (integer)``
> + Indicates bit rate for hierarchical coding layer 5 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR (integer)``
> + Indicates bit rate for hierarchical coding layer 6 for HEVC encoder.
> +
> +
> +MFC 10.10 MPEG Controls
> +-----------------------
> +
> +The following MPEG class controls deal with MPEG decoding and encoding
> +settings that are specific to the Multi Format Codec 10.10 device present
> +in the S5P and Exynos family of SoCs by Samsung.
> +
> +
> +.. _mfc1010-control-id:
> +
> +MFC 10.10 Control IDs
> +^^^^^^^^^^^^^^^^^^^^^
> +
> +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (integer)``
> + Selects number of P reference pictures required for HEVC encoder.
> + P-Frame can use 1 or 2 frames for reference.
> +
> +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (integer)``
> + Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
> + disables generating SPS and PPS at every IDR. Setting it to one enables
> + generating SPS and PPS at every IDR.
> +
> +
> .. _camera-controls:
>
> Camera Control Reference
>
Regards,
Hans
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
@ 2017-07-20 14:50 ` Hans Verkuil
0 siblings, 0 replies; 68+ messages in thread
From: Hans Verkuil @ 2017-07-20 14:50 UTC (permalink / raw)
To: linux-arm-kernel
On 19/06/17 07:10, Smitha T Murthy wrote:
> Added V4l2 controls for HEVC encoder
>
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> ---
> Documentation/media/uapi/v4l/extended-controls.rst | 364 +++++++++++++++++++++
> 1 file changed, 364 insertions(+)
>
> diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
> index abb1057..7767c70 100644
> --- a/Documentation/media/uapi/v4l/extended-controls.rst
> +++ b/Documentation/media/uapi/v4l/extended-controls.rst
> @@ -1960,6 +1960,370 @@ enum v4l2_vp8_golden_frame_sel -
> 1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
>
>
> +High Efficiency Video Coding (HEVC/H.265) Control Reference
> +-----------------------------------------------------------
> +
> +The HEVC/H.265 controls include controls for encoding parameters of HEVC/H.265
> +video codec.
> +
> +
> +.. _hevc-control-id:
> +
> +HEVC/H.265 Control IDs
> +^^^^^^^^^^^^^^^^^^^^^^
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP (integer)``
> + Minimum quantization parameter for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP (integer)``
> + Maximum quantization parameter for HEVC.
It's a bit ambiguous. Are these supposed to be read-only parameters?
Normally min-max is already implied in the control range, so this is a
bit odd. Perhaps it is clear for people who know HEVC, but I'm not
quite sure what to make of it.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP (integer)``
> + Quantization parameter for an I frame for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP (integer)``
> + Quantization parameter for a P frame for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP (integer)``
> + Quantization parameter for a B frame for HEVC.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP (boolean)``
> + HIERARCHICAL_QP allows host to specify the quantization parameter values
> + for each temporal layer through HIERARCHICAL_QP_LAYER. This is valid only
> + if HIERARCHICAL_CODING_LAYER is greater than 1. Setting the control value
> + to 1 enables setting of the QP values for the layers.
> +
> +.. _v4l2-hevc-hier-coding-type:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE``
> + (enum)
> +
> +enum v4l2_mpeg_video_hevc_hier_coding_type -
> + Selects the hierarchical coding type for encoding. Possible values are:
> +
> +.. raw:: latex
> +
> + \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> + :header-rows: 0
> + :stub-columns: 0
> +
> + * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B``
> + - Use the B frame for hierarchical coding.
> + * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P``
> + - Use the P frame for hierarchical coding.
> +
> +.. raw:: latex
> +
> + \end{adjustbox}
> +
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (integer)``
> + Selects the hierarchical coding layer. In normal encoding
> + (non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
> + 0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
> + LAYER 1 and so on.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP (integer)``
> + Indicates the hierarchical coding layer quantization parameter.
> + For HEVC it can have a value of 0-51. Hence in the control value passed
> + the LSB 16 bits will indicate the quantization parameter. The MSB 16 bit
> + will pass the layer(0-6) it is meant for.
This is ugly. Why not make this an array control? This really is an array of
7 values, right? An alternative is to split this in 7 controls just as you did
with V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L?_BR.
The way it is now doesn't work either since G_CTRL(V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP)
would just return the QP for whatever was the last layer you set it for and you can't
query it for another layer.
> +
> +.. _v4l2-hevc-profile:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
> + (enum)
> +
> +enum v4l2_mpeg_video_hevc_profile -
> + Select the desired profile for HEVC encoder.
> +
> +.. raw:: latex
> +
> + \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> + :header-rows: 0
> + :stub-columns: 0
> +
> + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
> + - Main profile.
> + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
> + - Main still picture profile.
> +
> +.. raw:: latex
> +
> + \end{adjustbox}
> +
> +
> +.. _v4l2-hevc-level:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LEVEL``
> + (enum)
> +
> +enum v4l2_mpeg_video_hevc_level -
> + Selects the desired level for HEVC encoder.
> +
> +.. raw:: latex
> +
> + \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> + :header-rows: 0
> + :stub-columns: 0
> +
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_1``
> + - Level 1.0
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2``
> + - Level 2.0
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1``
> + - Level 2.1
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3``
> + - Level 3.0
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1``
> + - Level 3.1
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4``
> + - Level 4.0
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1``
> + - Level 4.1
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5``
> + - Level 5.0
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1``
> + - Level 5.1
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2``
> + - Level 5.2
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6``
> + - Level 6.0
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1``
> + - Level 6.1
> + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2``
> + - Level 6.2
> +
> +.. raw:: latex
> +
> + \end{adjustbox}
> +
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION (integer)``
> + Indicates the number of evenly spaced subintervals, called ticks, within
> + one second. This is a 16bit unsigned integer and has a maximum value up to
16bit -> 16 bit
> + 0xffff.
Is there a HEVC-defined minimum value as well? You mention the max value, but not
the min value, so it made me wonder...
> +
> +.. _v4l2-hevc-tier-flag:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG``
> + (enum)
> +
> +enum v4l2_mpeg_video_hevc_tier_flag -
> + TIER_FLAG specifies tiers information of the HEVC encoded picture. Tier
> + were made to deal with applications that differ in terms of maximum bit
> + rate. Setting the flag to 0 selects HEVC tier_flag as Main tier and setting
> + this flag to 1 indicates High tier. High tier is for applications requiring
> + high bit rates.
> +
> +.. raw:: latex
> +
> + \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> + :header-rows: 0
> + :stub-columns: 0
> +
> + * - ``V4L2_MPEG_VIDEO_HEVC_TIER_MAIN``
> + - Main tier.
> + * - ``V4L2_MPEG_VIDEO_HEVC_TIER_HIGH``
> + - High tier.
> +
> +.. raw:: latex
> +
> + \end{adjustbox}
> +
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH (integer)``
> + Selects HEVC maximum coding unit depth.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF (boolean)``
> + Indicates loop filtering. Control value 1 indicates loop filtering
> + is enabled and when set to 0 indicates loop filtering is disabled.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY (boolean)``
> + Selects whether to apply the loop filter across the slice boundary or not.
> + If the value is 0, loop filter will not be applied across the slice boundary.
> + If the value is 1, loop filter will be applied across the slice boundary.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (integer)``
> + Selects HEVC loop filter beta offset. The valid range is [-6, +6].
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (integer)``
> + Selects HEVC loop filter tc offset. The valid range is [-6, +6].
> +
> +.. _v4l2-hevc-refresh-type:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE``
> + (enum)
> +
> +enum v4l2_mpeg_video_hevc_hier_refresh_type -
> + Selects refresh type for HEVC encoder.
> + Host has to specify the period into
> + HEVC_REFRESH_PERIOD.
'into HEVC_REFRESH_PERIOD' -> with the ``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD`` control
> +
> +.. raw:: latex
> +
> + \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> + :header-rows: 0
> + :stub-columns: 0
> +
> + * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE``
> + - Use the B frame for hierarchical coding.
> + * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA``
> + - Use CRA (Clean Random Access Unit) picture encoding.
> + * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR``
> + - Use IDR picture encoding.
> +
> +.. raw:: latex
> +
> + \end{adjustbox}
> +
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD (integer)``
> + Selects the refresh period for HEVC encoder.
> + This specifies the number of I pictures between two CRA/IDR pictures.
> + This is valid only if REFRESH_TYPE is not 0.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU (boolean)``
> + Indicates HEVC lossless encoding. Setting it to 0 disables lossless
> + encoding. Setting it to 1 enables lossless encoding.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED (boolean)``
> + Indicates constant intra prediction for HEVC encoder. Specifies the
> + constrained intra prediction in which intra largest coding unit (LCU)
> + prediction is performed by using residual data and decoded samples of
> + neighboring intra LCU only. Setting the value to 1 enables constant intra
> + prediction and setting the value to 0 disables constant inta prediction.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT (boolean)``
> + Indicates wavefront parallel processing for HEVC encoder. Setting it to 0
> + disables the feature and setting it to 1 enables the wavefront parallel
> + processing.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB (boolean)``
> + Setting the value to 1 enables combination of P and B frame for HEVC
> + encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID (boolean)``
> + Indicates temporal identifier for HEVC encoder which is enabled by
> + setting the value to 1.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING (boolean)``
> + Indicates bi-linear interpolation is conditionally used in the intra
> + prediction filtering process in the CVS when set to 1. Indicates bi-linear
> + interpolation is not used in the CVS when set to 0.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1 (integer)``
> + Indicates maximum number of merge candidate motion vectors.
> + Values are from zero to four.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION (boolean)``
> + Indicates temporal motion vector prediction for HEVC encoder. Setting it to
> + 1 enables the prediction. Setting it to 0 disables the prediction.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE (boolean)``
> + Specifies if HEVC generates a stream with a size of the length field
> + instead of start code pattern. The size of the length field is configurable
> + through the V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD control. Setting
> + the value to 0 disables encoding without startcode pattern. Setting the
> + value to 1 will enables encoding without startcode pattern.
> +
> +.. _v4l2-hevc-size-of-length-field:
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD``
> +(enum)
> +
> +enum v4l2_mpeg_video_hevc_size_of_length_field -
> + Indicates the size of length field.
> + This is valid when encoding WITHOUT_STARTCODE_ENABLE is enabled.
> +
> +.. raw:: latex
> +
> + \begin{adjustbox}{width=\columnwidth}
> +
> +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> +
> +.. flat-table::
> + :header-rows: 0
> + :stub-columns: 0
> +
> + * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_0``
> + - Generate start code pattern (Normal).
> + * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_1``
> + - Generate size of length field instead of start code pattern and length is 1.
> + * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_2``
> + - Generate size of length field instead of start code pattern and length is 2.
> + * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_4``
> + - Generate size of length field instead of start code pattern and length is 4.
> +
> +.. raw:: latex
> +
> + \end{adjustbox}
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR (integer)``
> + Indicates bit rate for hierarchical coding layer 0 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR (integer)``
> + Indicates bit rate for hierarchical coding layer 1 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR (integer)``
> + Indicates bit rate for hierarchical coding layer 2 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR (integer)``
> + Indicates bit rate for hierarchical coding layer 3 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR (integer)``
> + Indicates bit rate for hierarchical coding layer 4 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR (integer)``
> + Indicates bit rate for hierarchical coding layer 5 for HEVC encoder.
> +
> +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR (integer)``
> + Indicates bit rate for hierarchical coding layer 6 for HEVC encoder.
> +
> +
> +MFC 10.10 MPEG Controls
> +-----------------------
> +
> +The following MPEG class controls deal with MPEG decoding and encoding
> +settings that are specific to the Multi Format Codec 10.10 device present
> +in the S5P and Exynos family of SoCs by Samsung.
> +
> +
> +.. _mfc1010-control-id:
> +
> +MFC 10.10 Control IDs
> +^^^^^^^^^^^^^^^^^^^^^
> +
> +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (integer)``
> + Selects number of P reference pictures required for HEVC encoder.
> + P-Frame can use 1 or 2 frames for reference.
> +
> +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (integer)``
> + Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
> + disables generating SPS and PPS at every IDR. Setting it to one enables
> + generating SPS and PPS at every IDR.
> +
> +
> .. _camera-controls:
>
> Camera Control Reference
>
Regards,
Hans
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
2017-07-17 11:18 ` Smitha T Murthy
@ 2017-07-20 15:46 ` Stanimir Varbanov
-1 siblings, 0 replies; 68+ messages in thread
From: Stanimir Varbanov @ 2017-07-20 15:46 UTC (permalink / raw)
To: Smitha T Murthy, Stanimir Varbanov
Cc: linux-arm-kernel, linux-media, linux-kernel, kyungmin.park,
kamil, jtp.park, a.hajda, mchehab, pankaj.dubey, krzk,
m.szyprowski, s.nawrocki
Hi,
>>> +
>>> + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
>>> + - Main profile.
>>
>> MAIN10?
>>
> No just MAIN.
I haven't because the MFC does not supported it?
If so, I think we have to add MAIN10 for completeness and because other
drivers could have support for it.
--
regards,
Stan
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
@ 2017-07-20 15:46 ` Stanimir Varbanov
0 siblings, 0 replies; 68+ messages in thread
From: Stanimir Varbanov @ 2017-07-20 15:46 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
>>> +
>>> + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
>>> + - Main profile.
>>
>> MAIN10?
>>
> No just MAIN.
I haven't because the MFC does not supported it?
If so, I think we have to add MAIN10 for completeness and because other
drivers could have support for it.
--
regards,
Stan
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 06/12] [media] v4l2-ioctl: add HEVC format description
2017-07-20 13:07 ` Hans Verkuil
@ 2017-07-24 4:28 ` Smitha T Murthy
-1 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-07-24 4:28 UTC (permalink / raw)
To: Hans Verkuil
Cc: linux-arm-kernel, linux-media, linux-kernel, kyungmin.park,
kamil, jtp.park, a.hajda, mchehab, pankaj.dubey, krzk,
m.szyprowski, s.nawrocki
On Thu, 2017-07-20 at 15:07 +0200, Hans Verkuil wrote:
> On 19/06/17 07:10, Smitha T Murthy wrote:
> > HEVC is a video coding format
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > ---
> > drivers/media/v4l2-core/v4l2-ioctl.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
> > index e5a2187..4f6f8d9 100644
> > --- a/drivers/media/v4l2-core/v4l2-ioctl.c
> > +++ b/drivers/media/v4l2-core/v4l2-ioctl.c
> > @@ -1257,6 +1257,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
> > case V4L2_PIX_FMT_VC1_ANNEX_L: descr = "VC-1 (SMPTE 412M Annex L)"; break;
> > case V4L2_PIX_FMT_VP8: descr = "VP8"; break;
> > case V4L2_PIX_FMT_VP9: descr = "VP9"; break;
> > + case V4L2_PIX_FMT_HEVC: descr = "HEVC"; break;
>
> Add a little comment at the end of the line: /* aka H.265 */
>
> After that you can add my:
>
> Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
>
> Regards,
>
> Hans
>
Ok I will make the change. Thanks for the review.
Regards,
Smitha
> > case V4L2_PIX_FMT_CPIA1: descr = "GSPCA CPiA YUV"; break;
> > case V4L2_PIX_FMT_WNVA: descr = "WNVA"; break;
> > case V4L2_PIX_FMT_SN9C10X: descr = "GSPCA SN9C10X"; break;
> >
>
>
>
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 06/12] [media] v4l2-ioctl: add HEVC format description
@ 2017-07-24 4:28 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-07-24 4:28 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, 2017-07-20 at 15:07 +0200, Hans Verkuil wrote:
> On 19/06/17 07:10, Smitha T Murthy wrote:
> > HEVC is a video coding format
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > ---
> > drivers/media/v4l2-core/v4l2-ioctl.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
> > index e5a2187..4f6f8d9 100644
> > --- a/drivers/media/v4l2-core/v4l2-ioctl.c
> > +++ b/drivers/media/v4l2-core/v4l2-ioctl.c
> > @@ -1257,6 +1257,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
> > case V4L2_PIX_FMT_VC1_ANNEX_L: descr = "VC-1 (SMPTE 412M Annex L)"; break;
> > case V4L2_PIX_FMT_VP8: descr = "VP8"; break;
> > case V4L2_PIX_FMT_VP9: descr = "VP9"; break;
> > + case V4L2_PIX_FMT_HEVC: descr = "HEVC"; break;
>
> Add a little comment at the end of the line: /* aka H.265 */
>
> After that you can add my:
>
> Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
>
> Regards,
>
> Hans
>
Ok I will make the change. Thanks for the review.
Regards,
Smitha
> > case V4L2_PIX_FMT_CPIA1: descr = "GSPCA CPiA YUV"; break;
> > case V4L2_PIX_FMT_WNVA: descr = "WNVA"; break;
> > case V4L2_PIX_FMT_SN9C10X: descr = "GSPCA SN9C10X"; break;
> >
>
>
>
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 05/12] [media] videodev2.h: Add v4l2 definition for HEVC
2017-07-20 13:07 ` Hans Verkuil
@ 2017-07-24 4:29 ` Smitha T Murthy
-1 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-07-24 4:29 UTC (permalink / raw)
To: Hans Verkuil
Cc: linux-arm-kernel, linux-media, linux-kernel, kyungmin.park,
kamil, jtp.park, a.hajda, mchehab, pankaj.dubey, krzk,
m.szyprowski, s.nawrocki
On Thu, 2017-07-20 at 15:07 +0200, Hans Verkuil wrote:
> On 19/06/17 07:10, Smitha T Murthy wrote:
> > Add V4L2 definition for HEVC compressed format
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> > ---
> > include/uapi/linux/videodev2.h | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
> > index 2b8feb8..488de3d 100644
> > --- a/include/uapi/linux/videodev2.h
> > +++ b/include/uapi/linux/videodev2.h
> > @@ -629,6 +629,7 @@ struct v4l2_pix_format {
> > #define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
> > #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
> > #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
> > +#define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
>
> Change the comment to: /* HEVC aka H.265 */
>
> After that you can add my:
>
> Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
>
> Regards,
>
> Hans
>
I will make the change. Thanks for the review.
Regards,
Smitha
> >
> > /* Vendor-specific formats */
> > #define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
> >
>
>
>
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 05/12] [media] videodev2.h: Add v4l2 definition for HEVC
@ 2017-07-24 4:29 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-07-24 4:29 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, 2017-07-20 at 15:07 +0200, Hans Verkuil wrote:
> On 19/06/17 07:10, Smitha T Murthy wrote:
> > Add V4L2 definition for HEVC compressed format
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> > ---
> > include/uapi/linux/videodev2.h | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
> > index 2b8feb8..488de3d 100644
> > --- a/include/uapi/linux/videodev2.h
> > +++ b/include/uapi/linux/videodev2.h
> > @@ -629,6 +629,7 @@ struct v4l2_pix_format {
> > #define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
> > #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
> > #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
> > +#define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
>
> Change the comment to: /* HEVC aka H.265 */
>
> After that you can add my:
>
> Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
>
> Regards,
>
> Hans
>
I will make the change. Thanks for the review.
Regards,
Smitha
> >
> > /* Vendor-specific formats */
> > #define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
> >
>
>
>
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 10/12] [media] v4l2: Add v4l2 control IDs for HEVC encoder
2017-07-20 13:13 ` Hans Verkuil
@ 2017-07-24 4:30 ` Smitha T Murthy
-1 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-07-24 4:30 UTC (permalink / raw)
To: Hans Verkuil
Cc: linux-arm-kernel, linux-media, linux-kernel, kyungmin.park,
kamil, jtp.park, a.hajda, mchehab, pankaj.dubey, krzk,
m.szyprowski, s.nawrocki
On Thu, 2017-07-20 at 15:13 +0200, Hans Verkuil wrote:
> On 19/06/17 07:10, Smitha T Murthy wrote:
> > Add v4l2 controls for HEVC encoder
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> > ---
> > drivers/media/v4l2-core/v4l2-ctrls.c | 103 +++++++++++++++++++++++++++++++++++
> > include/uapi/linux/v4l2-controls.h | 84 ++++++++++++++++++++++++++++
> > 2 files changed, 187 insertions(+)
> >
> > diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
> > index ec42872..6a7e732 100644
> > --- a/drivers/media/v4l2-core/v4l2-ctrls.c
> > +++ b/drivers/media/v4l2-core/v4l2-ctrls.c
> > @@ -479,6 +479,51 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
> > NULL,
> > };
> >
> > + static const char * const hevc_profile[] = {
> > + "Main",
> > + "Main Still Picture",
> > + NULL,
> > + };
> > + static const char * const hevc_level[] = {
> > + "1",
> > + "2",
> > + "2.1",
> > + "3",
> > + "3.1",
> > + "4",
> > + "4.1",
> > + "5",
> > + "5.1",
> > + "5.2",
> > + "6",
> > + "6.1",
> > + "6.2",
> > + NULL,
> > + };
> > + static const char * const hevc_hierarchial_coding_type[] = {
> > + "B",
> > + "P",
> > + NULL,
> > + };
> > + static const char * const hevc_refresh_type[] = {
> > + "None",
> > + "CRA",
> > + "IDR",
> > + NULL,
> > + };
> > + static const char * const hevc_size_of_length_field[] = {
> > + "0",
> > + "1",
> > + "2",
> > + "4",
> > + NULL,
> > + };
> > + static const char * const hevc_tier_flag[] = {
> > + "Main",
> > + "High",
> > + NULL,
> > + };
> > +
> >
> > switch (id) {
> > case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
> > @@ -574,6 +619,18 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
> > return dv_it_content_type;
> > case V4L2_CID_DETECT_MD_MODE:
> > return detect_md_mode;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> > + return hevc_profile;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> > + return hevc_level;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
> > + return hevc_hierarchial_coding_type;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> > + return hevc_refresh_type;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> > + return hevc_size_of_length_field;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
> > + return hevc_tier_flag;
> >
> > default:
> > return NULL;
> > @@ -775,6 +832,46 @@ const char *v4l2_ctrl_get_name(u32 id)
> > case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP: return "VPX P-Frame QP Value";
> > case V4L2_CID_MPEG_VIDEO_VPX_PROFILE: return "VPX Profile";
> >
> > + /* HEVC controls */
> > + case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: return "HEVC I-Frame QP Value";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP: return "HEVC P-Frame QP Value";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP: return "HEVC B-Frame QP Value";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP: return "HEVC Minimum QP Value";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP: return "HEVC Maximum QP Value";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: return "HEVC Profile";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL: return "HEVC Level";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG: return "HEVC Tier_flag";
>
> "HEVC Tier Flag"
>
I will correct this.
> > + case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION: return "HEVC Frame Rate Resolution";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH: return "HEVC Maximum Coding Unit Depth";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE: return "HEVC Refresh Type";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED: return "HEVC Constant Intra Prediction";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU: return "HEVC Lossless Encoding";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT: return "HEVC Wavefront";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LF: return "HEVC Loop Filter";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY: return "HEVC LF Across Slice Boundary";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP: return "HEVC QP Values";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE: return "HEVC Hierarchical Coding Type";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER: return "HEVC Hierarchical Coding Layer";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP: return "HEVC Hierarchical Layer QP";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR: return "HEVC Hierarchical Lay 0 Bit Rate";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR: return "HEVC Hierarchical Lay 1 Bit Rate";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR: return "HEVC Hierarchical Lay 2 Bit Rate";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR: return "HEVC Hierarchical Lay 3 Bit Rate";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR: return "HEVC Hierarchical Lay 4 Bit Rate";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR: return "HEVC Hierarchical Lay 5 Bit Rate";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR: return "HEVC Hierarchical Lay 6 Bit Rate";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB: return "HEVC General PB";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID: return "HEVC Temporal ID";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING: return "HEVC Strong Intra Smoothing";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT: return "HEVC Intra PU Split";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION: return "HEVC TMV Prediction";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1: return "HEVC Max Number of Candidate MVs";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE: return "HEVC ENC Without Startcode";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD: return "HEVC Num of I Frame b/w 2 IDR";
>
> s/I Frame/I-Frame/
>
I will correct this.
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2: return "HEVC Loop Filter Beta Offset";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2: return "HEVC Loop Filter TC Offset";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: return "HEVC Size of Length Field";
> > +
>
> It is my understanding that all these V4L2_CID_MPEG_VIDEO_HEVC_ controls represent HEVC
> parameters as defined by the HEVC standard, right? And not specific to your codec.
>
> I'm pretty sure that's the case, I'm just double-checking.
>
> Regards,
>
> Hans
>
Yes correct, all these parameters are as per HEVC standard.
Thank you for the review.
Regards,
Smtiha
> > /* CAMERA controls */
> > /* Keep the order of the 'case's the same as in v4l2-controls.h! */
> > case V4L2_CID_CAMERA_CLASS: return "Camera Controls";
> > @@ -1067,6 +1164,12 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
> > case V4L2_CID_TUNE_DEEMPHASIS:
> > case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL:
> > case V4L2_CID_DETECT_MD_MODE:
> > + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
> > + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> > + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> > + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
> > *type = V4L2_CTRL_TYPE_MENU;
> > break;
> > case V4L2_CID_LINK_FREQ:
> > diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
> > index 0d2e1e0..9c32a55 100644
> > --- a/include/uapi/linux/v4l2-controls.h
> > +++ b/include/uapi/linux/v4l2-controls.h
> > @@ -579,6 +579,85 @@ enum v4l2_vp8_golden_frame_sel {
> > #define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP (V4L2_CID_MPEG_BASE+510)
> > #define V4L2_CID_MPEG_VIDEO_VPX_PROFILE (V4L2_CID_MPEG_BASE+511)
> >
> > +/* CIDs for HEVC encoding. Number gaps are for compatibility */
> > +
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP (V4L2_CID_MPEG_BASE + 512)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP (V4L2_CID_MPEG_BASE + 513)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP (V4L2_CID_MPEG_BASE + 514)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP (V4L2_CID_MPEG_BASE + 515)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP (V4L2_CID_MPEG_BASE + 516)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP (V4L2_CID_MPEG_BASE + 517)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE (V4L2_CID_MPEG_BASE + 518)
> > +enum v4l2_mpeg_video_hevc_hier_coding_type {
> > + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B = 0,
> > + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P = 1,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (V4L2_CID_MPEG_BASE + 519)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP (V4L2_CID_MPEG_BASE + 520)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_PROFILE (V4L2_CID_MPEG_BASE + 521)
> > +enum v4l2_mpeg_video_hevc_profile {
> > + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN = 0,
> > + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE = 1,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LEVEL (V4L2_CID_MPEG_BASE + 522)
> > +enum v4l2_mpeg_video_hevc_level {
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_1 = 0,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_2 = 1,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1 = 2,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_3 = 3,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1 = 4,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_4 = 5,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1 = 6,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_5 = 7,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1 = 8,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2 = 9,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_6 = 10,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1 = 11,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 = 12,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION (V4L2_CID_MPEG_BASE + 523)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG (V4L2_CID_MPEG_BASE + 524)
> > +enum v4l2_mpeg_video_hevc_tier_flag {
> > + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN = 0,
> > + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH = 1,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH (V4L2_CID_MPEG_BASE + 525)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF (V4L2_CID_MPEG_BASE + 526)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY (V4L2_CID_MPEG_BASE + 527)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (V4L2_CID_MPEG_BASE + 528)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (V4L2_CID_MPEG_BASE + 529)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE (V4L2_CID_MPEG_BASE + 530)
> > +enum v4l2_cid_mpeg_video_hevc_refresh_type {
> > + V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE = 0,
> > + V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA = 1,
> > + V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR = 2,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD (V4L2_CID_MPEG_BASE + 531)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU (V4L2_CID_MPEG_BASE + 532)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED (V4L2_CID_MPEG_BASE + 533)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT (V4L2_CID_MPEG_BASE + 534)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB (V4L2_CID_MPEG_BASE + 535)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID (V4L2_CID_MPEG_BASE + 536)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING (V4L2_CID_MPEG_BASE + 537)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1 (V4L2_CID_MPEG_BASE + 538)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT (V4L2_CID_MPEG_BASE + 539)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION (V4L2_CID_MPEG_BASE + 540)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE (V4L2_CID_MPEG_BASE + 541)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD (V4L2_CID_MPEG_BASE + 542)
> > +enum v4l2_cid_mpeg_video_hevc_size_of_length_field {
> > + V4L2_MPEG_VIDEO_HEVC_SIZE_0 = 0,
> > + V4L2_MPEG_VIDEO_HEVC_SIZE_1 = 1,
> > + V4L2_MPEG_VIDEO_HEVC_SIZE_2 = 2,
> > + V4L2_MPEG_VIDEO_HEVC_SIZE_4 = 3,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR (V4L2_CID_MPEG_BASE + 543)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR (V4L2_CID_MPEG_BASE + 544)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR (V4L2_CID_MPEG_BASE + 545)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR (V4L2_CID_MPEG_BASE + 546)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR (V4L2_CID_MPEG_BASE + 547)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR (V4L2_CID_MPEG_BASE + 548)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR (V4L2_CID_MPEG_BASE + 549)
> > +
> > /* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
> > #define V4L2_CID_MPEG_CX2341X_BASE (V4L2_CTRL_CLASS_MPEG | 0x1000)
> > #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE (V4L2_CID_MPEG_CX2341X_BASE+0)
> > @@ -647,6 +726,11 @@ enum v4l2_mpeg_mfc51_video_force_frame_type {
> > #define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC (V4L2_CID_MPEG_MFC51_BASE+53)
> > #define V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P (V4L2_CID_MPEG_MFC51_BASE+54)
> >
> > +/* MPEG-class control IDs specific to the Samsung MFC 10.10 driver as defined by V4L2 */
> > +#define V4L2_CID_MPEG_MFC10_BASE (V4L2_CTRL_CLASS_MPEG | 0x1200)
> > +
> > +#define V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (V4L2_CID_MPEG_MFC10_BASE+0)
> > +#define V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (V4L2_CID_MPEG_MFC10_BASE+1)
> >
> > /* Camera class control IDs */
> >
> >
>
>
>
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 10/12] [media] v4l2: Add v4l2 control IDs for HEVC encoder
@ 2017-07-24 4:30 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-07-24 4:30 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, 2017-07-20 at 15:13 +0200, Hans Verkuil wrote:
> On 19/06/17 07:10, Smitha T Murthy wrote:
> > Add v4l2 controls for HEVC encoder
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
> > ---
> > drivers/media/v4l2-core/v4l2-ctrls.c | 103 +++++++++++++++++++++++++++++++++++
> > include/uapi/linux/v4l2-controls.h | 84 ++++++++++++++++++++++++++++
> > 2 files changed, 187 insertions(+)
> >
> > diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
> > index ec42872..6a7e732 100644
> > --- a/drivers/media/v4l2-core/v4l2-ctrls.c
> > +++ b/drivers/media/v4l2-core/v4l2-ctrls.c
> > @@ -479,6 +479,51 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
> > NULL,
> > };
> >
> > + static const char * const hevc_profile[] = {
> > + "Main",
> > + "Main Still Picture",
> > + NULL,
> > + };
> > + static const char * const hevc_level[] = {
> > + "1",
> > + "2",
> > + "2.1",
> > + "3",
> > + "3.1",
> > + "4",
> > + "4.1",
> > + "5",
> > + "5.1",
> > + "5.2",
> > + "6",
> > + "6.1",
> > + "6.2",
> > + NULL,
> > + };
> > + static const char * const hevc_hierarchial_coding_type[] = {
> > + "B",
> > + "P",
> > + NULL,
> > + };
> > + static const char * const hevc_refresh_type[] = {
> > + "None",
> > + "CRA",
> > + "IDR",
> > + NULL,
> > + };
> > + static const char * const hevc_size_of_length_field[] = {
> > + "0",
> > + "1",
> > + "2",
> > + "4",
> > + NULL,
> > + };
> > + static const char * const hevc_tier_flag[] = {
> > + "Main",
> > + "High",
> > + NULL,
> > + };
> > +
> >
> > switch (id) {
> > case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
> > @@ -574,6 +619,18 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
> > return dv_it_content_type;
> > case V4L2_CID_DETECT_MD_MODE:
> > return detect_md_mode;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> > + return hevc_profile;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> > + return hevc_level;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
> > + return hevc_hierarchial_coding_type;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> > + return hevc_refresh_type;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> > + return hevc_size_of_length_field;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
> > + return hevc_tier_flag;
> >
> > default:
> > return NULL;
> > @@ -775,6 +832,46 @@ const char *v4l2_ctrl_get_name(u32 id)
> > case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP: return "VPX P-Frame QP Value";
> > case V4L2_CID_MPEG_VIDEO_VPX_PROFILE: return "VPX Profile";
> >
> > + /* HEVC controls */
> > + case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: return "HEVC I-Frame QP Value";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP: return "HEVC P-Frame QP Value";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP: return "HEVC B-Frame QP Value";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP: return "HEVC Minimum QP Value";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP: return "HEVC Maximum QP Value";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: return "HEVC Profile";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL: return "HEVC Level";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG: return "HEVC Tier_flag";
>
> "HEVC Tier Flag"
>
I will correct this.
> > + case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION: return "HEVC Frame Rate Resolution";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH: return "HEVC Maximum Coding Unit Depth";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE: return "HEVC Refresh Type";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED: return "HEVC Constant Intra Prediction";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU: return "HEVC Lossless Encoding";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT: return "HEVC Wavefront";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LF: return "HEVC Loop Filter";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY: return "HEVC LF Across Slice Boundary";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP: return "HEVC QP Values";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE: return "HEVC Hierarchical Coding Type";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER: return "HEVC Hierarchical Coding Layer";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP: return "HEVC Hierarchical Layer QP";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR: return "HEVC Hierarchical Lay 0 Bit Rate";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR: return "HEVC Hierarchical Lay 1 Bit Rate";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR: return "HEVC Hierarchical Lay 2 Bit Rate";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR: return "HEVC Hierarchical Lay 3 Bit Rate";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR: return "HEVC Hierarchical Lay 4 Bit Rate";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR: return "HEVC Hierarchical Lay 5 Bit Rate";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR: return "HEVC Hierarchical Lay 6 Bit Rate";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB: return "HEVC General PB";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID: return "HEVC Temporal ID";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING: return "HEVC Strong Intra Smoothing";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT: return "HEVC Intra PU Split";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION: return "HEVC TMV Prediction";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1: return "HEVC Max Number of Candidate MVs";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE: return "HEVC ENC Without Startcode";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD: return "HEVC Num of I Frame b/w 2 IDR";
>
> s/I Frame/I-Frame/
>
I will correct this.
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2: return "HEVC Loop Filter Beta Offset";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2: return "HEVC Loop Filter TC Offset";
> > + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: return "HEVC Size of Length Field";
> > +
>
> It is my understanding that all these V4L2_CID_MPEG_VIDEO_HEVC_ controls represent HEVC
> parameters as defined by the HEVC standard, right? And not specific to your codec.
>
> I'm pretty sure that's the case, I'm just double-checking.
>
> Regards,
>
> Hans
>
Yes correct, all these parameters are as per HEVC standard.
Thank you for the review.
Regards,
Smtiha
> > /* CAMERA controls */
> > /* Keep the order of the 'case's the same as in v4l2-controls.h! */
> > case V4L2_CID_CAMERA_CLASS: return "Camera Controls";
> > @@ -1067,6 +1164,12 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
> > case V4L2_CID_TUNE_DEEMPHASIS:
> > case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL:
> > case V4L2_CID_DETECT_MD_MODE:
> > + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
> > + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> > + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> > + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
> > *type = V4L2_CTRL_TYPE_MENU;
> > break;
> > case V4L2_CID_LINK_FREQ:
> > diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
> > index 0d2e1e0..9c32a55 100644
> > --- a/include/uapi/linux/v4l2-controls.h
> > +++ b/include/uapi/linux/v4l2-controls.h
> > @@ -579,6 +579,85 @@ enum v4l2_vp8_golden_frame_sel {
> > #define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP (V4L2_CID_MPEG_BASE+510)
> > #define V4L2_CID_MPEG_VIDEO_VPX_PROFILE (V4L2_CID_MPEG_BASE+511)
> >
> > +/* CIDs for HEVC encoding. Number gaps are for compatibility */
> > +
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP (V4L2_CID_MPEG_BASE + 512)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP (V4L2_CID_MPEG_BASE + 513)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP (V4L2_CID_MPEG_BASE + 514)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP (V4L2_CID_MPEG_BASE + 515)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP (V4L2_CID_MPEG_BASE + 516)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP (V4L2_CID_MPEG_BASE + 517)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE (V4L2_CID_MPEG_BASE + 518)
> > +enum v4l2_mpeg_video_hevc_hier_coding_type {
> > + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B = 0,
> > + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P = 1,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (V4L2_CID_MPEG_BASE + 519)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP (V4L2_CID_MPEG_BASE + 520)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_PROFILE (V4L2_CID_MPEG_BASE + 521)
> > +enum v4l2_mpeg_video_hevc_profile {
> > + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN = 0,
> > + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE = 1,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LEVEL (V4L2_CID_MPEG_BASE + 522)
> > +enum v4l2_mpeg_video_hevc_level {
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_1 = 0,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_2 = 1,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1 = 2,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_3 = 3,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1 = 4,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_4 = 5,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1 = 6,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_5 = 7,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1 = 8,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2 = 9,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_6 = 10,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1 = 11,
> > + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 = 12,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION (V4L2_CID_MPEG_BASE + 523)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG (V4L2_CID_MPEG_BASE + 524)
> > +enum v4l2_mpeg_video_hevc_tier_flag {
> > + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN = 0,
> > + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH = 1,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH (V4L2_CID_MPEG_BASE + 525)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF (V4L2_CID_MPEG_BASE + 526)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY (V4L2_CID_MPEG_BASE + 527)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (V4L2_CID_MPEG_BASE + 528)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (V4L2_CID_MPEG_BASE + 529)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE (V4L2_CID_MPEG_BASE + 530)
> > +enum v4l2_cid_mpeg_video_hevc_refresh_type {
> > + V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE = 0,
> > + V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA = 1,
> > + V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR = 2,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD (V4L2_CID_MPEG_BASE + 531)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU (V4L2_CID_MPEG_BASE + 532)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED (V4L2_CID_MPEG_BASE + 533)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT (V4L2_CID_MPEG_BASE + 534)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB (V4L2_CID_MPEG_BASE + 535)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID (V4L2_CID_MPEG_BASE + 536)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING (V4L2_CID_MPEG_BASE + 537)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1 (V4L2_CID_MPEG_BASE + 538)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT (V4L2_CID_MPEG_BASE + 539)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION (V4L2_CID_MPEG_BASE + 540)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE (V4L2_CID_MPEG_BASE + 541)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD (V4L2_CID_MPEG_BASE + 542)
> > +enum v4l2_cid_mpeg_video_hevc_size_of_length_field {
> > + V4L2_MPEG_VIDEO_HEVC_SIZE_0 = 0,
> > + V4L2_MPEG_VIDEO_HEVC_SIZE_1 = 1,
> > + V4L2_MPEG_VIDEO_HEVC_SIZE_2 = 2,
> > + V4L2_MPEG_VIDEO_HEVC_SIZE_4 = 3,
> > +};
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR (V4L2_CID_MPEG_BASE + 543)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR (V4L2_CID_MPEG_BASE + 544)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR (V4L2_CID_MPEG_BASE + 545)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR (V4L2_CID_MPEG_BASE + 546)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR (V4L2_CID_MPEG_BASE + 547)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR (V4L2_CID_MPEG_BASE + 548)
> > +#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR (V4L2_CID_MPEG_BASE + 549)
> > +
> > /* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
> > #define V4L2_CID_MPEG_CX2341X_BASE (V4L2_CTRL_CLASS_MPEG | 0x1000)
> > #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE (V4L2_CID_MPEG_CX2341X_BASE+0)
> > @@ -647,6 +726,11 @@ enum v4l2_mpeg_mfc51_video_force_frame_type {
> > #define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC (V4L2_CID_MPEG_MFC51_BASE+53)
> > #define V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P (V4L2_CID_MPEG_MFC51_BASE+54)
> >
> > +/* MPEG-class control IDs specific to the Samsung MFC 10.10 driver as defined by V4L2 */
> > +#define V4L2_CID_MPEG_MFC10_BASE (V4L2_CTRL_CLASS_MPEG | 0x1200)
> > +
> > +#define V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (V4L2_CID_MPEG_MFC10_BASE+0)
> > +#define V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (V4L2_CID_MPEG_MFC10_BASE+1)
> >
> > /* Camera class control IDs */
> >
> >
>
>
>
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 11/12] [media] s5p-mfc: Add support for HEVC encoder
2017-07-20 13:32 ` Hans Verkuil
@ 2017-07-24 4:40 ` Smitha T Murthy
-1 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-07-24 4:40 UTC (permalink / raw)
To: Hans Verkuil
Cc: linux-arm-kernel, linux-media, linux-kernel, kyungmin.park,
kamil, jtp.park, a.hajda, mchehab, pankaj.dubey, krzk,
m.szyprowski, s.nawrocki
On Thu, 2017-07-20 at 15:32 +0200, Hans Verkuil wrote:
> On 19/06/17 07:10, Smitha T Murthy wrote:
> > Add HEVC encoder support and necessary registers, V4L2 CIDs,
> > and hevc encoder parameters
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > ---
> > drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 28 +-
> > drivers/media/platform/s5p-mfc/s5p_mfc.c | 1 +
> > drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c | 3 +
> > drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 53 ++-
> > drivers/media/platform/s5p-mfc/s5p_mfc_enc.c | 521 ++++++++++++++++++++++++
> > drivers/media/platform/s5p-mfc/s5p_mfc_opr.h | 8 +
> > drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 168 ++++++++
> > drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 8 +
> > 8 files changed, 788 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > index 6754477..7065b9d 100644
> > --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > @@ -20,13 +20,35 @@
> > #define S5P_FIMV_MFC_STATE_V10 0x7124
> > #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10 0xF570
> > #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10 0xF574
> > +#define S5P_FIMV_E_NUM_T_LAYER_V10 0xFBAC
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10 0xFBB0
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10 0xFBB4
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10 0xFBB8
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10 0xFBBC
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10 0xFBC0
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10 0xFBC4
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10 0xFBC8
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10 0xFD18
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V10 0xFD1C
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V10 0xFD20
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V10 0xFD24
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V10 0xFD28
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V10 0xFD2C
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V10 0xFD30
> > +#define S5P_FIMV_E_HEVC_OPTIONS_V10 0xFDD4
> > +#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10 0xFDD8
> > +#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10 0xFDDC
> > +#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10 0xFDE0
> > +#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10 0xFDE4
> > +#define S5P_FIMV_E_HEVC_NAL_CONTROL_V10 0xFDE8
> >
> > /* MFCv10 Context buffer sizes */
> > #define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
> > #define MFC_H264_DEC_CTX_BUF_SIZE_V10 (2 * SZ_1M)
> > #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)
> > #define MFC_H264_ENC_CTX_BUF_SIZE_V10 (100 * SZ_1K)
> > -#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
> > +#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
> > +#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
> >
> > /* MFCv10 variant defines */
> > #define MAX_FW_SIZE_V10 (SZ_1M)
> > @@ -58,5 +80,9 @@
> > #define ENC_V100_VP8_ME_SIZE(x, y) \
> > ENC_V100_BASE_SIZE(x, y)
> >
> > +#define ENC_V100_HEVC_ME_SIZE(x, y) \
> > + (((x + 3) * (y + 3) * 32) \
> > + + ((y * 128) + 1280) * DIV_ROUND_UP(x, 4))
> > +
> > #endif /*_REGS_MFC_V10_H*/
> >
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
> > index efc36b0..742c2b7 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
> > @@ -1621,6 +1621,7 @@ static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
> > .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V10,
> > .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
> > .h264_enc_ctx = MFC_H264_ENC_CTX_BUF_SIZE_V10,
> > + .hevc_enc_ctx = MFC_HEVC_ENC_CTX_BUF_SIZE_V10,
> > .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
> > };
> >
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > index 102b47e..7521fce 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > @@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
> > case S5P_MFC_CODEC_VP8_ENC:
> > codec_type = S5P_FIMV_CODEC_VP8_ENC_V7;
> > break;
> > + case S5P_MFC_CODEC_HEVC_ENC:
> > + codec_type = S5P_FIMV_CODEC_HEVC_ENC;
> > + break;
> > default:
> > codec_type = S5P_FIMV_CODEC_NONE_V6;
> > }
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > index b49f220..c1ae4f4 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > @@ -61,7 +61,7 @@
> > #define MFC_ENC_CAP_PLANE_COUNT 1
> > #define MFC_ENC_OUT_PLANE_COUNT 2
> > #define STUFF_BYTE 4
> > -#define MFC_MAX_CTRLS 77
> > +#define MFC_MAX_CTRLS 128
> >
> > #define S5P_MFC_CODEC_NONE -1
> > #define S5P_MFC_CODEC_H264_DEC 0
> > @@ -80,6 +80,7 @@
> > #define S5P_MFC_CODEC_MPEG4_ENC 22
> > #define S5P_MFC_CODEC_H263_ENC 23
> > #define S5P_MFC_CODEC_VP8_ENC 24
> > +#define S5P_MFC_CODEC_HEVC_ENC 26
> >
> > #define S5P_MFC_R2H_CMD_EMPTY 0
> > #define S5P_MFC_R2H_CMD_SYS_INIT_RET 1
> > @@ -215,6 +216,7 @@ struct s5p_mfc_buf_size_v6 {
> > unsigned int h264_dec_ctx;
> > unsigned int other_dec_ctx;
> > unsigned int h264_enc_ctx;
> > + unsigned int hevc_enc_ctx;
> > unsigned int other_enc_ctx;
> > };
> >
> > @@ -429,6 +431,54 @@ struct s5p_mfc_vp8_enc_params {
> > u8 profile;
> > };
> >
> > +struct s5p_mfc_hevc_enc_params {
> > + enum v4l2_mpeg_video_hevc_profile profile;
> > + int level;
> > + enum v4l2_mpeg_video_h264_level level_v4l2;
> > + u8 tier_flag;
> > + u32 rc_framerate;
> > + u8 rc_min_qp;
> > + u8 rc_max_qp;
> > + u8 rc_lcu_dark;
> > + u8 rc_lcu_smooth;
> > + u8 rc_lcu_static;
> > + u8 rc_lcu_activity;
> > + u8 rc_frame_qp;
> > + u8 rc_p_frame_qp;
> > + u8 rc_b_frame_qp;
> > + u8 max_partition_depth;
> > + u8 num_refs_for_p;
> > + u8 refreshtype;
> > + u16 refreshperiod;
> > + s32 lf_beta_offset_div2;
> > + s32 lf_tc_offset_div2;
> > + u8 loopfilter_disable;
> > + u8 loopfilter_across;
> > + u8 nal_control_length_filed;
> > + u8 nal_control_user_ref;
> > + u8 nal_control_store_ref;
> > + u8 const_intra_period_enable;
> > + u8 lossless_cu_enable;
> > + u8 wavefront_enable;
> > + u8 enable_ltr;
> > + u8 hier_qp_enable;
> > + enum v4l2_mpeg_video_hevc_hier_coding_type hier_qp_type;
> > + u8 num_hier_layer;
> > + u8 hier_qp_layer[7];
> > + u32 hier_bit_layer[7];
> > + u8 sign_data_hiding;
> > + u8 general_pb_enable;
> > + u8 temporal_id_enable;
> > + u8 strong_intra_smooth;
> > + u8 intra_pu_split_disable;
> > + u8 tmv_prediction_disable;
> > + u8 max_num_merge_mv;
> > + u8 eco_mode_enable;
> > + u8 encoding_nostartcode_enable;
> > + u8 size_of_length_field;
> > + u8 prepend_sps_pps_to_idr;
> > +};
> > +
> > /**
> > * struct s5p_mfc_enc_params - general encoding parameters
> > */
> > @@ -466,6 +516,7 @@ struct s5p_mfc_enc_params {
> > struct s5p_mfc_h264_enc_params h264;
> > struct s5p_mfc_mpeg4_enc_params mpeg4;
> > struct s5p_mfc_vp8_enc_params vp8;
> > + struct s5p_mfc_hevc_enc_params hevc;
> > } codec;
> >
> > };
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> > index eb5352a..9e5b05a 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> > @@ -99,6 +99,14 @@ static struct s5p_mfc_fmt formats[] = {
> > .num_planes = 1,
> > .versions = MFC_V7PLUS_BITS,
> > },
> > + {
> > + .name = "HEVC Encoded Stream",
>
> Drop the names! They are filled in by the v4l2 core.
>
> It's a good idea to have an earlier patch that just removes these names
> from the existing formats.
>
Ok I will remove the names in the next patch version.
> > + .fourcc = V4L2_PIX_FMT_HEVC,
> > + .codec_mode = S5P_FIMV_CODEC_HEVC_ENC,
> > + .type = MFC_FMT_ENC,
> > + .num_planes = 1,
> > + .versions = MFC_V10_BIT,
> > + },
> > };
> >
> > #define NUM_FORMATS ARRAY_SIZE(formats)
> > @@ -693,6 +701,366 @@ static struct mfc_control controls[] = {
> > .default_value = 0,
> > },
> > {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC I Frame QP Value",
>
> Don't set the name! Again, it's filled in by v4l2-ctrls.c.
>
> I am not keen on arrays like this. First of all they duplicate struct v4l2_ctrl_config.
> And secondly, I prefer it if you just call the v4l2_ctrl_new_std* functions to create
> new controls.
>
I adopted the method as used by other codecs to define the controls.
I would like to take this up in separate patch series to use
v4l2_ctrl_new_std* for HEVC and other codecs.
> > + .minimum = 0,
> > + .maximum = 51,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC P Frame QP Value",
> > + .minimum = 0,
> > + .maximum = 51,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC B Frame QP Value",
> > + .minimum = 0,
> > + .maximum = 51,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Minimum QP Value",
> > + .minimum = 0,
> > + .maximum = 51,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Maximum QP Value",
> > + .minimum = 0,
> > + .maximum = 51,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
> > + .type = V4L2_CTRL_TYPE_MENU,
> > + .name = "HEVC Profile",
> > + .minimum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> > + .maximum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE,
> > + .step = 1,
> > + .default_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
> > + .type = V4L2_CTRL_TYPE_MENU,
> > + .name = "HEVC Level",
> > + .minimum = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> > + .maximum = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
> > + .step = 1,
> > + .default_value = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG,
> > + .type = V4L2_CTRL_TYPE_MENU,
> > + .name = "HEVC Tier_flag",
> > + .minimum = V4L2_MPEG_VIDEO_HEVC_TIER_MAIN,
> > + .maximum = V4L2_MPEG_VIDEO_HEVC_TIER_HIGH,
> > + .step = 1,
> > + .default_value = V4L2_MPEG_VIDEO_HEVC_TIER_MAIN,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Frame Rate Resolution",
> > + .minimum = 1,
> > + .maximum = (1 << 16) - 1,
> > + .step = 1,
> > + .default_value = 1,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Maximum Coding Unit Depth",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Num of Reference Pictures",
> > + .minimum = 1,
> > + .maximum = 2,
> > + .step = 1,
> > + .default_value = 1,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE,
> > + .type = V4L2_CTRL_TYPE_MENU,
> > + .name = "HEVC Refresh Type",
> > + .minimum = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
> > + .maximum = V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR,
> > + .step = 1,
> > + .default_value = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC Constant Intra Prediction",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC Lossless Encoding",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC Wavefront",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_LF,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC Loop Filter",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC LF Across Slice Boundary",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC QP Values",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE,
> > + .type = V4L2_CTRL_TYPE_MENU,
> > + .name = "HEVC Hierarchical Coding Type",
> > + .minimum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
> > + .maximum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P,
> > + .step = 1,
> > + .default_value = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Coding Layer",
> > + .minimum = 0,
> > + .maximum = 6,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Layer QP",
> > + .minimum = INT_MIN,
> > + .maximum = INT_MAX,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Lay 0 Bit Rate",
> > + .minimum = INT_MIN,
> > + .maximum = INT_MAX,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Lay 1 Bit Rate",
> > + .minimum = INT_MIN,
> > + .maximum = INT_MAX,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Lay 2 Bit Rate",
> > + .minimum = INT_MIN,
> > + .maximum = INT_MAX,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Lay 3 Bit Rate",
> > + .minimum = INT_MIN,
> > + .maximum = INT_MAX,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Lay 4 Bit Rate",
> > + .minimum = INT_MIN,
> > + .maximum = INT_MAX,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Lay 5 Bit Rate",
> > + .minimum = INT_MIN,
> > + .maximum = INT_MAX,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Lay 6 Bit Rate",
> > + .minimum = INT_MIN,
> > + .maximum = INT_MAX,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC General PB",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC Temporal ID",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC Strong Intra Smoothing",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC Intra PU Split",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC TMV Prediction",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Max Number of Candidate MVs",
> > + .minimum = 0,
> > + .maximum = 4,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC ENC Without Startcode",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Num of I Frames b/w 2 IDR",
> > + .minimum = 0,
> > + .maximum = (1 << 16) - 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Loop Filter Beta Offset",
> > + .minimum = -6,
> > + .maximum = 6,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Loop Filter TC Offset",
> > + .minimum = -6,
> > + .maximum = 6,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD,
> > + .type = V4L2_CTRL_TYPE_MENU,
> > + .name = "HEVC Size of Length Field",
> > + .minimum = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
> > + .maximum = V4L2_MPEG_VIDEO_HEVC_SIZE_4,
> > + .step = 1,
> > + .default_value = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "Prepend SPS/PPS to IDR",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > .id = V4L2_CID_MIN_BUFFERS_FOR_OUTPUT,
> > .type = V4L2_CTRL_TYPE_INTEGER,
> > .name = "Minimum number of output bufs",
> > @@ -1359,6 +1727,26 @@ static inline int mpeg4_level(enum v4l2_mpeg_video_mpeg4_level lvl)
> > return t[lvl];
> > }
> >
> > +static inline int hevc_level(enum v4l2_mpeg_video_hevc_level lvl)
> > +{
> > + static unsigned int t[] = {
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_1 */ 10,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_2 */ 20,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1 */ 21,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_3 */ 30,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1 */ 31,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_4 */ 40,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1 */ 41,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5 */ 50,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1 */ 51,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2 */ 52,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6 */ 60,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1 */ 61,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 */ 62,
> > + };
> > + return t[lvl];
> > +}
> > +
> > static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar)
> > {
> > static unsigned int t[V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED + 1] = {
> > @@ -1635,6 +2023,139 @@ static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl)
> > case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:
> > p->codec.vp8.profile = ctrl->val;
> > break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:
> > + p->codec.hevc.rc_frame_qp = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:
> > + p->codec.hevc.rc_p_frame_qp = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:
> > + p->codec.hevc.rc_b_frame_qp = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:
> > + p->codec.hevc.rc_framerate = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:
> > + p->codec.hevc.rc_min_qp = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:
> > + p->codec.hevc.rc_max_qp = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> > + p->codec.hevc.level_v4l2 = ctrl->val;
> > + p->codec.hevc.level = hevc_level(ctrl->val);
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> > + switch (ctrl->val) {
> > + case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN:
> > + p->codec.hevc.profile =
> > + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN;
> > + break;
> > + case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE:
> > + p->codec.hevc.profile =
> > + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE;
> > + break;
> > + default:
> > + ret = -EINVAL;
> > + }
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
> > + p->codec.hevc.tier_flag = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:
> > + p->codec.hevc.max_partition_depth = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:
> > + p->codec.hevc.num_refs_for_p = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> > + p->codec.hevc.refreshtype = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:
> > + p->codec.hevc.const_intra_period_enable = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:
> > + p->codec.hevc.lossless_cu_enable = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:
> > + p->codec.hevc.wavefront_enable = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LF:
> > + p->codec.hevc.loopfilter_disable = (ctrl->val ^ 1);
>
> Yuck. Just do !ctrl->val. Ditto below.
>
I will correct it.
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:
> > + p->codec.hevc.loopfilter_across = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP:
> > + p->codec.hevc.hier_qp_enable = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
> > + p->codec.hevc.hier_qp_type = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER:
> > + p->codec.hevc.num_hier_layer = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP:
> > + p->codec.hevc.hier_qp_layer[(ctrl->val >> 16) & 0x7]
> > + = ctrl->val & 0xFF;
>
> Yuck. I'll discuss this in the documentation patch.
>
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR:
> > + p->codec.hevc.hier_bit_layer[0] = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR:
> > + p->codec.hevc.hier_bit_layer[1] = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR:
> > + p->codec.hevc.hier_bit_layer[2] = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR:
> > + p->codec.hevc.hier_bit_layer[3] = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR:
> > + p->codec.hevc.hier_bit_layer[4] = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR:
> > + p->codec.hevc.hier_bit_layer[5] = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR:
> > + p->codec.hevc.hier_bit_layer[6] = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:
> > + p->codec.hevc.general_pb_enable = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:
> > + p->codec.hevc.temporal_id_enable = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:
> > + p->codec.hevc.strong_intra_smooth = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:
> > + p->codec.hevc.intra_pu_split_disable = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:
> > + p->codec.hevc.tmv_prediction_disable = (ctrl->val ^ 1);
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:
> > + p->codec.hevc.max_num_merge_mv = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:
> > + p->codec.hevc.encoding_nostartcode_enable = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:
> > + p->codec.hevc.refreshperiod = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:
> > + p->codec.hevc.lf_beta_offset_div2 = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:
> > + p->codec.hevc.lf_tc_offset_div2 = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> > + p->codec.hevc.size_of_length_field = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:
> > + p->codec.hevc.prepend_sps_pps_to_idr = ctrl->val;
> > + break;
> > default:
> > v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n",
> > ctrl->id, ctrl->val);
>
> Regards,
>
> Hans
>
>
Thank you for the review.
Regards,
Smitha
>
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 11/12] [media] s5p-mfc: Add support for HEVC encoder
@ 2017-07-24 4:40 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-07-24 4:40 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, 2017-07-20 at 15:32 +0200, Hans Verkuil wrote:
> On 19/06/17 07:10, Smitha T Murthy wrote:
> > Add HEVC encoder support and necessary registers, V4L2 CIDs,
> > and hevc encoder parameters
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > ---
> > drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 28 +-
> > drivers/media/platform/s5p-mfc/s5p_mfc.c | 1 +
> > drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c | 3 +
> > drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 53 ++-
> > drivers/media/platform/s5p-mfc/s5p_mfc_enc.c | 521 ++++++++++++++++++++++++
> > drivers/media/platform/s5p-mfc/s5p_mfc_opr.h | 8 +
> > drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 168 ++++++++
> > drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h | 8 +
> > 8 files changed, 788 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > index 6754477..7065b9d 100644
> > --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
> > @@ -20,13 +20,35 @@
> > #define S5P_FIMV_MFC_STATE_V10 0x7124
> > #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10 0xF570
> > #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10 0xF574
> > +#define S5P_FIMV_E_NUM_T_LAYER_V10 0xFBAC
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10 0xFBB0
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10 0xFBB4
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10 0xFBB8
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10 0xFBBC
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10 0xFBC0
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10 0xFBC4
> > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10 0xFBC8
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10 0xFD18
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V10 0xFD1C
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V10 0xFD20
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V10 0xFD24
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V10 0xFD28
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V10 0xFD2C
> > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V10 0xFD30
> > +#define S5P_FIMV_E_HEVC_OPTIONS_V10 0xFDD4
> > +#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10 0xFDD8
> > +#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10 0xFDDC
> > +#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10 0xFDE0
> > +#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10 0xFDE4
> > +#define S5P_FIMV_E_HEVC_NAL_CONTROL_V10 0xFDE8
> >
> > /* MFCv10 Context buffer sizes */
> > #define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
> > #define MFC_H264_DEC_CTX_BUF_SIZE_V10 (2 * SZ_1M)
> > #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)
> > #define MFC_H264_ENC_CTX_BUF_SIZE_V10 (100 * SZ_1K)
> > -#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
> > +#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
> > +#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
> >
> > /* MFCv10 variant defines */
> > #define MAX_FW_SIZE_V10 (SZ_1M)
> > @@ -58,5 +80,9 @@
> > #define ENC_V100_VP8_ME_SIZE(x, y) \
> > ENC_V100_BASE_SIZE(x, y)
> >
> > +#define ENC_V100_HEVC_ME_SIZE(x, y) \
> > + (((x + 3) * (y + 3) * 32) \
> > + + ((y * 128) + 1280) * DIV_ROUND_UP(x, 4))
> > +
> > #endif /*_REGS_MFC_V10_H*/
> >
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
> > index efc36b0..742c2b7 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
> > @@ -1621,6 +1621,7 @@ static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
> > .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V10,
> > .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
> > .h264_enc_ctx = MFC_H264_ENC_CTX_BUF_SIZE_V10,
> > + .hevc_enc_ctx = MFC_HEVC_ENC_CTX_BUF_SIZE_V10,
> > .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
> > };
> >
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > index 102b47e..7521fce 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
> > @@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
> > case S5P_MFC_CODEC_VP8_ENC:
> > codec_type = S5P_FIMV_CODEC_VP8_ENC_V7;
> > break;
> > + case S5P_MFC_CODEC_HEVC_ENC:
> > + codec_type = S5P_FIMV_CODEC_HEVC_ENC;
> > + break;
> > default:
> > codec_type = S5P_FIMV_CODEC_NONE_V6;
> > }
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > index b49f220..c1ae4f4 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> > @@ -61,7 +61,7 @@
> > #define MFC_ENC_CAP_PLANE_COUNT 1
> > #define MFC_ENC_OUT_PLANE_COUNT 2
> > #define STUFF_BYTE 4
> > -#define MFC_MAX_CTRLS 77
> > +#define MFC_MAX_CTRLS 128
> >
> > #define S5P_MFC_CODEC_NONE -1
> > #define S5P_MFC_CODEC_H264_DEC 0
> > @@ -80,6 +80,7 @@
> > #define S5P_MFC_CODEC_MPEG4_ENC 22
> > #define S5P_MFC_CODEC_H263_ENC 23
> > #define S5P_MFC_CODEC_VP8_ENC 24
> > +#define S5P_MFC_CODEC_HEVC_ENC 26
> >
> > #define S5P_MFC_R2H_CMD_EMPTY 0
> > #define S5P_MFC_R2H_CMD_SYS_INIT_RET 1
> > @@ -215,6 +216,7 @@ struct s5p_mfc_buf_size_v6 {
> > unsigned int h264_dec_ctx;
> > unsigned int other_dec_ctx;
> > unsigned int h264_enc_ctx;
> > + unsigned int hevc_enc_ctx;
> > unsigned int other_enc_ctx;
> > };
> >
> > @@ -429,6 +431,54 @@ struct s5p_mfc_vp8_enc_params {
> > u8 profile;
> > };
> >
> > +struct s5p_mfc_hevc_enc_params {
> > + enum v4l2_mpeg_video_hevc_profile profile;
> > + int level;
> > + enum v4l2_mpeg_video_h264_level level_v4l2;
> > + u8 tier_flag;
> > + u32 rc_framerate;
> > + u8 rc_min_qp;
> > + u8 rc_max_qp;
> > + u8 rc_lcu_dark;
> > + u8 rc_lcu_smooth;
> > + u8 rc_lcu_static;
> > + u8 rc_lcu_activity;
> > + u8 rc_frame_qp;
> > + u8 rc_p_frame_qp;
> > + u8 rc_b_frame_qp;
> > + u8 max_partition_depth;
> > + u8 num_refs_for_p;
> > + u8 refreshtype;
> > + u16 refreshperiod;
> > + s32 lf_beta_offset_div2;
> > + s32 lf_tc_offset_div2;
> > + u8 loopfilter_disable;
> > + u8 loopfilter_across;
> > + u8 nal_control_length_filed;
> > + u8 nal_control_user_ref;
> > + u8 nal_control_store_ref;
> > + u8 const_intra_period_enable;
> > + u8 lossless_cu_enable;
> > + u8 wavefront_enable;
> > + u8 enable_ltr;
> > + u8 hier_qp_enable;
> > + enum v4l2_mpeg_video_hevc_hier_coding_type hier_qp_type;
> > + u8 num_hier_layer;
> > + u8 hier_qp_layer[7];
> > + u32 hier_bit_layer[7];
> > + u8 sign_data_hiding;
> > + u8 general_pb_enable;
> > + u8 temporal_id_enable;
> > + u8 strong_intra_smooth;
> > + u8 intra_pu_split_disable;
> > + u8 tmv_prediction_disable;
> > + u8 max_num_merge_mv;
> > + u8 eco_mode_enable;
> > + u8 encoding_nostartcode_enable;
> > + u8 size_of_length_field;
> > + u8 prepend_sps_pps_to_idr;
> > +};
> > +
> > /**
> > * struct s5p_mfc_enc_params - general encoding parameters
> > */
> > @@ -466,6 +516,7 @@ struct s5p_mfc_enc_params {
> > struct s5p_mfc_h264_enc_params h264;
> > struct s5p_mfc_mpeg4_enc_params mpeg4;
> > struct s5p_mfc_vp8_enc_params vp8;
> > + struct s5p_mfc_hevc_enc_params hevc;
> > } codec;
> >
> > };
> > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> > index eb5352a..9e5b05a 100644
> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> > @@ -99,6 +99,14 @@ static struct s5p_mfc_fmt formats[] = {
> > .num_planes = 1,
> > .versions = MFC_V7PLUS_BITS,
> > },
> > + {
> > + .name = "HEVC Encoded Stream",
>
> Drop the names! They are filled in by the v4l2 core.
>
> It's a good idea to have an earlier patch that just removes these names
> from the existing formats.
>
Ok I will remove the names in the next patch version.
> > + .fourcc = V4L2_PIX_FMT_HEVC,
> > + .codec_mode = S5P_FIMV_CODEC_HEVC_ENC,
> > + .type = MFC_FMT_ENC,
> > + .num_planes = 1,
> > + .versions = MFC_V10_BIT,
> > + },
> > };
> >
> > #define NUM_FORMATS ARRAY_SIZE(formats)
> > @@ -693,6 +701,366 @@ static struct mfc_control controls[] = {
> > .default_value = 0,
> > },
> > {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC I Frame QP Value",
>
> Don't set the name! Again, it's filled in by v4l2-ctrls.c.
>
> I am not keen on arrays like this. First of all they duplicate struct v4l2_ctrl_config.
> And secondly, I prefer it if you just call the v4l2_ctrl_new_std* functions to create
> new controls.
>
I adopted the method as used by other codecs to define the controls.
I would like to take this up in separate patch series to use
v4l2_ctrl_new_std* for HEVC and other codecs.
> > + .minimum = 0,
> > + .maximum = 51,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC P Frame QP Value",
> > + .minimum = 0,
> > + .maximum = 51,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC B Frame QP Value",
> > + .minimum = 0,
> > + .maximum = 51,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Minimum QP Value",
> > + .minimum = 0,
> > + .maximum = 51,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Maximum QP Value",
> > + .minimum = 0,
> > + .maximum = 51,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
> > + .type = V4L2_CTRL_TYPE_MENU,
> > + .name = "HEVC Profile",
> > + .minimum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> > + .maximum = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE,
> > + .step = 1,
> > + .default_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
> > + .type = V4L2_CTRL_TYPE_MENU,
> > + .name = "HEVC Level",
> > + .minimum = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> > + .maximum = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
> > + .step = 1,
> > + .default_value = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG,
> > + .type = V4L2_CTRL_TYPE_MENU,
> > + .name = "HEVC Tier_flag",
> > + .minimum = V4L2_MPEG_VIDEO_HEVC_TIER_MAIN,
> > + .maximum = V4L2_MPEG_VIDEO_HEVC_TIER_HIGH,
> > + .step = 1,
> > + .default_value = V4L2_MPEG_VIDEO_HEVC_TIER_MAIN,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Frame Rate Resolution",
> > + .minimum = 1,
> > + .maximum = (1 << 16) - 1,
> > + .step = 1,
> > + .default_value = 1,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Maximum Coding Unit Depth",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Num of Reference Pictures",
> > + .minimum = 1,
> > + .maximum = 2,
> > + .step = 1,
> > + .default_value = 1,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE,
> > + .type = V4L2_CTRL_TYPE_MENU,
> > + .name = "HEVC Refresh Type",
> > + .minimum = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
> > + .maximum = V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR,
> > + .step = 1,
> > + .default_value = V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC Constant Intra Prediction",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC Lossless Encoding",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC Wavefront",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_LF,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC Loop Filter",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC LF Across Slice Boundary",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC QP Values",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE,
> > + .type = V4L2_CTRL_TYPE_MENU,
> > + .name = "HEVC Hierarchical Coding Type",
> > + .minimum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
> > + .maximum = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P,
> > + .step = 1,
> > + .default_value = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Coding Layer",
> > + .minimum = 0,
> > + .maximum = 6,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Layer QP",
> > + .minimum = INT_MIN,
> > + .maximum = INT_MAX,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Lay 0 Bit Rate",
> > + .minimum = INT_MIN,
> > + .maximum = INT_MAX,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Lay 1 Bit Rate",
> > + .minimum = INT_MIN,
> > + .maximum = INT_MAX,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Lay 2 Bit Rate",
> > + .minimum = INT_MIN,
> > + .maximum = INT_MAX,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Lay 3 Bit Rate",
> > + .minimum = INT_MIN,
> > + .maximum = INT_MAX,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Lay 4 Bit Rate",
> > + .minimum = INT_MIN,
> > + .maximum = INT_MAX,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Lay 5 Bit Rate",
> > + .minimum = INT_MIN,
> > + .maximum = INT_MAX,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Hierarchical Lay 6 Bit Rate",
> > + .minimum = INT_MIN,
> > + .maximum = INT_MAX,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC General PB",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC Temporal ID",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC Strong Intra Smoothing",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC Intra PU Split",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC TMV Prediction",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Max Number of Candidate MVs",
> > + .minimum = 0,
> > + .maximum = 4,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "HEVC ENC Without Startcode",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Num of I Frames b/w 2 IDR",
> > + .minimum = 0,
> > + .maximum = (1 << 16) - 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Loop Filter Beta Offset",
> > + .minimum = -6,
> > + .maximum = 6,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "HEVC Loop Filter TC Offset",
> > + .minimum = -6,
> > + .maximum = 6,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD,
> > + .type = V4L2_CTRL_TYPE_MENU,
> > + .name = "HEVC Size of Length Field",
> > + .minimum = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
> > + .maximum = V4L2_MPEG_VIDEO_HEVC_SIZE_4,
> > + .step = 1,
> > + .default_value = V4L2_MPEG_VIDEO_HEVC_SIZE_0,
> > + },
> > + {
> > + .id = V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR,
> > + .type = V4L2_CTRL_TYPE_INTEGER,
> > + .name = "Prepend SPS/PPS to IDR",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > + {
> > .id = V4L2_CID_MIN_BUFFERS_FOR_OUTPUT,
> > .type = V4L2_CTRL_TYPE_INTEGER,
> > .name = "Minimum number of output bufs",
> > @@ -1359,6 +1727,26 @@ static inline int mpeg4_level(enum v4l2_mpeg_video_mpeg4_level lvl)
> > return t[lvl];
> > }
> >
> > +static inline int hevc_level(enum v4l2_mpeg_video_hevc_level lvl)
> > +{
> > + static unsigned int t[] = {
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_1 */ 10,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_2 */ 20,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1 */ 21,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_3 */ 30,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1 */ 31,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_4 */ 40,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1 */ 41,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5 */ 50,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1 */ 51,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2 */ 52,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6 */ 60,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1 */ 61,
> > + /* V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 */ 62,
> > + };
> > + return t[lvl];
> > +}
> > +
> > static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar)
> > {
> > static unsigned int t[V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED + 1] = {
> > @@ -1635,6 +2023,139 @@ static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl)
> > case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:
> > p->codec.vp8.profile = ctrl->val;
> > break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:
> > + p->codec.hevc.rc_frame_qp = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:
> > + p->codec.hevc.rc_p_frame_qp = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:
> > + p->codec.hevc.rc_b_frame_qp = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:
> > + p->codec.hevc.rc_framerate = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:
> > + p->codec.hevc.rc_min_qp = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:
> > + p->codec.hevc.rc_max_qp = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
> > + p->codec.hevc.level_v4l2 = ctrl->val;
> > + p->codec.hevc.level = hevc_level(ctrl->val);
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
> > + switch (ctrl->val) {
> > + case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN:
> > + p->codec.hevc.profile =
> > + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN;
> > + break;
> > + case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE:
> > + p->codec.hevc.profile =
> > + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE;
> > + break;
> > + default:
> > + ret = -EINVAL;
> > + }
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
> > + p->codec.hevc.tier_flag = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:
> > + p->codec.hevc.max_partition_depth = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES:
> > + p->codec.hevc.num_refs_for_p = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
> > + p->codec.hevc.refreshtype = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED:
> > + p->codec.hevc.const_intra_period_enable = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:
> > + p->codec.hevc.lossless_cu_enable = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:
> > + p->codec.hevc.wavefront_enable = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LF:
> > + p->codec.hevc.loopfilter_disable = (ctrl->val ^ 1);
>
> Yuck. Just do !ctrl->val. Ditto below.
>
I will correct it.
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:
> > + p->codec.hevc.loopfilter_across = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP:
> > + p->codec.hevc.hier_qp_enable = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
> > + p->codec.hevc.hier_qp_type = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER:
> > + p->codec.hevc.num_hier_layer = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP:
> > + p->codec.hevc.hier_qp_layer[(ctrl->val >> 16) & 0x7]
> > + = ctrl->val & 0xFF;
>
> Yuck. I'll discuss this in the documentation patch.
>
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR:
> > + p->codec.hevc.hier_bit_layer[0] = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR:
> > + p->codec.hevc.hier_bit_layer[1] = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR:
> > + p->codec.hevc.hier_bit_layer[2] = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR:
> > + p->codec.hevc.hier_bit_layer[3] = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR:
> > + p->codec.hevc.hier_bit_layer[4] = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR:
> > + p->codec.hevc.hier_bit_layer[5] = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR:
> > + p->codec.hevc.hier_bit_layer[6] = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB:
> > + p->codec.hevc.general_pb_enable = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID:
> > + p->codec.hevc.temporal_id_enable = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING:
> > + p->codec.hevc.strong_intra_smooth = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT:
> > + p->codec.hevc.intra_pu_split_disable = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION:
> > + p->codec.hevc.tmv_prediction_disable = (ctrl->val ^ 1);
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1:
> > + p->codec.hevc.max_num_merge_mv = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE:
> > + p->codec.hevc.encoding_nostartcode_enable = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD:
> > + p->codec.hevc.refreshperiod = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2:
> > + p->codec.hevc.lf_beta_offset_div2 = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2:
> > + p->codec.hevc.lf_tc_offset_div2 = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
> > + p->codec.hevc.size_of_length_field = ctrl->val;
> > + break;
> > + case V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR:
> > + p->codec.hevc.prepend_sps_pps_to_idr = ctrl->val;
> > + break;
> > default:
> > v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n",
> > ctrl->id, ctrl->val);
>
> Regards,
>
> Hans
>
>
Thank you for the review.
Regards,
Smitha
>
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
2017-07-20 14:50 ` Hans Verkuil
@ 2017-07-25 4:48 ` Smitha T Murthy
-1 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-07-25 4:48 UTC (permalink / raw)
To: Hans Verkuil
Cc: linux-arm-kernel, linux-media, linux-kernel, kyungmin.park,
kamil, jtp.park, a.hajda, mchehab, pankaj.dubey, krzk,
m.szyprowski, s.nawrocki
On Thu, 2017-07-20 at 16:50 +0200, Hans Verkuil wrote:
> On 19/06/17 07:10, Smitha T Murthy wrote:
> > Added V4l2 controls for HEVC encoder
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > ---
> > Documentation/media/uapi/v4l/extended-controls.rst | 364 +++++++++++++++++++++
> > 1 file changed, 364 insertions(+)
> >
> > diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
> > index abb1057..7767c70 100644
> > --- a/Documentation/media/uapi/v4l/extended-controls.rst
> > +++ b/Documentation/media/uapi/v4l/extended-controls.rst
> > @@ -1960,6 +1960,370 @@ enum v4l2_vp8_golden_frame_sel -
> > 1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
> >
> >
> > +High Efficiency Video Coding (HEVC/H.265) Control Reference
> > +-----------------------------------------------------------
> > +
> > +The HEVC/H.265 controls include controls for encoding parameters of HEVC/H.265
> > +video codec.
> > +
> > +
> > +.. _hevc-control-id:
> > +
> > +HEVC/H.265 Control IDs
> > +^^^^^^^^^^^^^^^^^^^^^^
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP (integer)``
> > + Minimum quantization parameter for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP (integer)``
> > + Maximum quantization parameter for HEVC.
>
> It's a bit ambiguous. Are these supposed to be read-only parameters?
> Normally min-max is already implied in the control range, so this is a
> bit odd. Perhaps it is clear for people who know HEVC, but I'm not
> quite sure what to make of it.
>
These controls are used to set the QP bound for encoding.
This control is present for all other codecs as well.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP (integer)``
> > + Quantization parameter for an I frame for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP (integer)``
> > + Quantization parameter for a P frame for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP (integer)``
> > + Quantization parameter for a B frame for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP (boolean)``
> > + HIERARCHICAL_QP allows host to specify the quantization parameter values
> > + for each temporal layer through HIERARCHICAL_QP_LAYER. This is valid only
> > + if HIERARCHICAL_CODING_LAYER is greater than 1. Setting the control value
> > + to 1 enables setting of the QP values for the layers.
> > +
> > +.. _v4l2-hevc-hier-coding-type:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE``
> > + (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_hier_coding_type -
> > + Selects the hierarchical coding type for encoding. Possible values are:
> > +
> > +.. raw:: latex
> > +
> > + \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > + :header-rows: 0
> > + :stub-columns: 0
> > +
> > + * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B``
> > + - Use the B frame for hierarchical coding.
> > + * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P``
> > + - Use the P frame for hierarchical coding.
> > +
> > +.. raw:: latex
> > +
> > + \end{adjustbox}
> > +
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (integer)``
> > + Selects the hierarchical coding layer. In normal encoding
> > + (non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
> > + 0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
> > + LAYER 1 and so on.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP (integer)``
> > + Indicates the hierarchical coding layer quantization parameter.
> > + For HEVC it can have a value of 0-51. Hence in the control value passed
> > + the LSB 16 bits will indicate the quantization parameter. The MSB 16 bit
> > + will pass the layer(0-6) it is meant for.
>
> This is ugly. Why not make this an array control? This really is an array of
> 7 values, right? An alternative is to split this in 7 controls just as you did
> with V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L?_BR.
>
> The way it is now doesn't work either since G_CTRL(V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP)
> would just return the QP for whatever was the last layer you set it for and you can't
> query it for another layer.
>
Ok I will add this as an array control.
> > +
> > +.. _v4l2-hevc-profile:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
> > + (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_profile -
> > + Select the desired profile for HEVC encoder.
> > +
> > +.. raw:: latex
> > +
> > + \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > + :header-rows: 0
> > + :stub-columns: 0
> > +
> > + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
> > + - Main profile.
> > + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
> > + - Main still picture profile.
> > +
> > +.. raw:: latex
> > +
> > + \end{adjustbox}
> > +
> > +
> > +.. _v4l2-hevc-level:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LEVEL``
> > + (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_level -
> > + Selects the desired level for HEVC encoder.
> > +
> > +.. raw:: latex
> > +
> > + \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > + :header-rows: 0
> > + :stub-columns: 0
> > +
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_1``
> > + - Level 1.0
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2``
> > + - Level 2.0
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1``
> > + - Level 2.1
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3``
> > + - Level 3.0
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1``
> > + - Level 3.1
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4``
> > + - Level 4.0
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1``
> > + - Level 4.1
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5``
> > + - Level 5.0
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1``
> > + - Level 5.1
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2``
> > + - Level 5.2
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6``
> > + - Level 6.0
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1``
> > + - Level 6.1
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2``
> > + - Level 6.2
> > +
> > +.. raw:: latex
> > +
> > + \end{adjustbox}
> > +
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION (integer)``
> > + Indicates the number of evenly spaced subintervals, called ticks, within
> > + one second. This is a 16bit unsigned integer and has a maximum value up to
>
> 16bit -> 16 bit
>
I will correct it.
> > + 0xffff.
>
> Is there a HEVC-defined minimum value as well? You mention the max value, but not
> the min value, so it made me wonder...
>
Yes the minimum value is 1. I can mention the same in the next patch
version.
> > +
> > +.. _v4l2-hevc-tier-flag:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG``
> > + (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_tier_flag -
> > + TIER_FLAG specifies tiers information of the HEVC encoded picture. Tier
> > + were made to deal with applications that differ in terms of maximum bit
> > + rate. Setting the flag to 0 selects HEVC tier_flag as Main tier and setting
> > + this flag to 1 indicates High tier. High tier is for applications requiring
> > + high bit rates.
> > +
> > +.. raw:: latex
> > +
> > + \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > + :header-rows: 0
> > + :stub-columns: 0
> > +
> > + * - ``V4L2_MPEG_VIDEO_HEVC_TIER_MAIN``
> > + - Main tier.
> > + * - ``V4L2_MPEG_VIDEO_HEVC_TIER_HIGH``
> > + - High tier.
> > +
> > +.. raw:: latex
> > +
> > + \end{adjustbox}
> > +
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH (integer)``
> > + Selects HEVC maximum coding unit depth.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF (boolean)``
> > + Indicates loop filtering. Control value 1 indicates loop filtering
> > + is enabled and when set to 0 indicates loop filtering is disabled.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY (boolean)``
> > + Selects whether to apply the loop filter across the slice boundary or not.
> > + If the value is 0, loop filter will not be applied across the slice boundary.
> > + If the value is 1, loop filter will be applied across the slice boundary.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (integer)``
> > + Selects HEVC loop filter beta offset. The valid range is [-6, +6].
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (integer)``
> > + Selects HEVC loop filter tc offset. The valid range is [-6, +6].
> > +
> > +.. _v4l2-hevc-refresh-type:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE``
> > + (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_hier_refresh_type -
> > + Selects refresh type for HEVC encoder.
> > + Host has to specify the period into
> > + HEVC_REFRESH_PERIOD.
>
> 'into HEVC_REFRESH_PERIOD' -> with the ``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD`` control
>
I will correct it.
> > +
> > +.. raw:: latex
> > +
> > + \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > + :header-rows: 0
> > + :stub-columns: 0
> > +
> > + * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE``
> > + - Use the B frame for hierarchical coding.
> > + * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA``
> > + - Use CRA (Clean Random Access Unit) picture encoding.
> > + * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR``
> > + - Use IDR picture encoding.
> > +
> > +.. raw:: latex
> > +
> > + \end{adjustbox}
> > +
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD (integer)``
> > + Selects the refresh period for HEVC encoder.
> > + This specifies the number of I pictures between two CRA/IDR pictures.
> > + This is valid only if REFRESH_TYPE is not 0.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU (boolean)``
> > + Indicates HEVC lossless encoding. Setting it to 0 disables lossless
> > + encoding. Setting it to 1 enables lossless encoding.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED (boolean)``
> > + Indicates constant intra prediction for HEVC encoder. Specifies the
> > + constrained intra prediction in which intra largest coding unit (LCU)
> > + prediction is performed by using residual data and decoded samples of
> > + neighboring intra LCU only. Setting the value to 1 enables constant intra
> > + prediction and setting the value to 0 disables constant inta prediction.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT (boolean)``
> > + Indicates wavefront parallel processing for HEVC encoder. Setting it to 0
> > + disables the feature and setting it to 1 enables the wavefront parallel
> > + processing.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB (boolean)``
> > + Setting the value to 1 enables combination of P and B frame for HEVC
> > + encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID (boolean)``
> > + Indicates temporal identifier for HEVC encoder which is enabled by
> > + setting the value to 1.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING (boolean)``
> > + Indicates bi-linear interpolation is conditionally used in the intra
> > + prediction filtering process in the CVS when set to 1. Indicates bi-linear
> > + interpolation is not used in the CVS when set to 0.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1 (integer)``
> > + Indicates maximum number of merge candidate motion vectors.
> > + Values are from zero to four.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION (boolean)``
> > + Indicates temporal motion vector prediction for HEVC encoder. Setting it to
> > + 1 enables the prediction. Setting it to 0 disables the prediction.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE (boolean)``
> > + Specifies if HEVC generates a stream with a size of the length field
> > + instead of start code pattern. The size of the length field is configurable
> > + through the V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD control. Setting
> > + the value to 0 disables encoding without startcode pattern. Setting the
> > + value to 1 will enables encoding without startcode pattern.
> > +
> > +.. _v4l2-hevc-size-of-length-field:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD``
> > +(enum)
> > +
> > +enum v4l2_mpeg_video_hevc_size_of_length_field -
> > + Indicates the size of length field.
> > + This is valid when encoding WITHOUT_STARTCODE_ENABLE is enabled.
> > +
> > +.. raw:: latex
> > +
> > + \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > + :header-rows: 0
> > + :stub-columns: 0
> > +
> > + * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_0``
> > + - Generate start code pattern (Normal).
> > + * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_1``
> > + - Generate size of length field instead of start code pattern and length is 1.
> > + * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_2``
> > + - Generate size of length field instead of start code pattern and length is 2.
> > + * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_4``
> > + - Generate size of length field instead of start code pattern and length is 4.
> > +
> > +.. raw:: latex
> > +
> > + \end{adjustbox}
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR (integer)``
> > + Indicates bit rate for hierarchical coding layer 0 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR (integer)``
> > + Indicates bit rate for hierarchical coding layer 1 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR (integer)``
> > + Indicates bit rate for hierarchical coding layer 2 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR (integer)``
> > + Indicates bit rate for hierarchical coding layer 3 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR (integer)``
> > + Indicates bit rate for hierarchical coding layer 4 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR (integer)``
> > + Indicates bit rate for hierarchical coding layer 5 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR (integer)``
> > + Indicates bit rate for hierarchical coding layer 6 for HEVC encoder.
> > +
> > +
> > +MFC 10.10 MPEG Controls
> > +-----------------------
> > +
> > +The following MPEG class controls deal with MPEG decoding and encoding
> > +settings that are specific to the Multi Format Codec 10.10 device present
> > +in the S5P and Exynos family of SoCs by Samsung.
> > +
> > +
> > +.. _mfc1010-control-id:
> > +
> > +MFC 10.10 Control IDs
> > +^^^^^^^^^^^^^^^^^^^^^
> > +
> > +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (integer)``
> > + Selects number of P reference pictures required for HEVC encoder.
> > + P-Frame can use 1 or 2 frames for reference.
> > +
> > +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (integer)``
> > + Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
> > + disables generating SPS and PPS at every IDR. Setting it to one enables
> > + generating SPS and PPS at every IDR.
> > +
> > +
> > .. _camera-controls:
> >
> > Camera Control Reference
> >
>
> Regards,
>
> Hans
>
>
Thank you for the review.
Regards,
Smitha
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
@ 2017-07-25 4:48 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-07-25 4:48 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, 2017-07-20 at 16:50 +0200, Hans Verkuil wrote:
> On 19/06/17 07:10, Smitha T Murthy wrote:
> > Added V4l2 controls for HEVC encoder
> >
> > Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> > ---
> > Documentation/media/uapi/v4l/extended-controls.rst | 364 +++++++++++++++++++++
> > 1 file changed, 364 insertions(+)
> >
> > diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
> > index abb1057..7767c70 100644
> > --- a/Documentation/media/uapi/v4l/extended-controls.rst
> > +++ b/Documentation/media/uapi/v4l/extended-controls.rst
> > @@ -1960,6 +1960,370 @@ enum v4l2_vp8_golden_frame_sel -
> > 1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
> >
> >
> > +High Efficiency Video Coding (HEVC/H.265) Control Reference
> > +-----------------------------------------------------------
> > +
> > +The HEVC/H.265 controls include controls for encoding parameters of HEVC/H.265
> > +video codec.
> > +
> > +
> > +.. _hevc-control-id:
> > +
> > +HEVC/H.265 Control IDs
> > +^^^^^^^^^^^^^^^^^^^^^^
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP (integer)``
> > + Minimum quantization parameter for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP (integer)``
> > + Maximum quantization parameter for HEVC.
>
> It's a bit ambiguous. Are these supposed to be read-only parameters?
> Normally min-max is already implied in the control range, so this is a
> bit odd. Perhaps it is clear for people who know HEVC, but I'm not
> quite sure what to make of it.
>
These controls are used to set the QP bound for encoding.
This control is present for all other codecs as well.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP (integer)``
> > + Quantization parameter for an I frame for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP (integer)``
> > + Quantization parameter for a P frame for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP (integer)``
> > + Quantization parameter for a B frame for HEVC.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP (boolean)``
> > + HIERARCHICAL_QP allows host to specify the quantization parameter values
> > + for each temporal layer through HIERARCHICAL_QP_LAYER. This is valid only
> > + if HIERARCHICAL_CODING_LAYER is greater than 1. Setting the control value
> > + to 1 enables setting of the QP values for the layers.
> > +
> > +.. _v4l2-hevc-hier-coding-type:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE``
> > + (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_hier_coding_type -
> > + Selects the hierarchical coding type for encoding. Possible values are:
> > +
> > +.. raw:: latex
> > +
> > + \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > + :header-rows: 0
> > + :stub-columns: 0
> > +
> > + * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B``
> > + - Use the B frame for hierarchical coding.
> > + * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P``
> > + - Use the P frame for hierarchical coding.
> > +
> > +.. raw:: latex
> > +
> > + \end{adjustbox}
> > +
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (integer)``
> > + Selects the hierarchical coding layer. In normal encoding
> > + (non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
> > + 0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
> > + LAYER 1 and so on.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP (integer)``
> > + Indicates the hierarchical coding layer quantization parameter.
> > + For HEVC it can have a value of 0-51. Hence in the control value passed
> > + the LSB 16 bits will indicate the quantization parameter. The MSB 16 bit
> > + will pass the layer(0-6) it is meant for.
>
> This is ugly. Why not make this an array control? This really is an array of
> 7 values, right? An alternative is to split this in 7 controls just as you did
> with V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L?_BR.
>
> The way it is now doesn't work either since G_CTRL(V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP)
> would just return the QP for whatever was the last layer you set it for and you can't
> query it for another layer.
>
Ok I will add this as an array control.
> > +
> > +.. _v4l2-hevc-profile:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
> > + (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_profile -
> > + Select the desired profile for HEVC encoder.
> > +
> > +.. raw:: latex
> > +
> > + \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > + :header-rows: 0
> > + :stub-columns: 0
> > +
> > + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
> > + - Main profile.
> > + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
> > + - Main still picture profile.
> > +
> > +.. raw:: latex
> > +
> > + \end{adjustbox}
> > +
> > +
> > +.. _v4l2-hevc-level:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LEVEL``
> > + (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_level -
> > + Selects the desired level for HEVC encoder.
> > +
> > +.. raw:: latex
> > +
> > + \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > + :header-rows: 0
> > + :stub-columns: 0
> > +
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_1``
> > + - Level 1.0
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2``
> > + - Level 2.0
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1``
> > + - Level 2.1
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3``
> > + - Level 3.0
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1``
> > + - Level 3.1
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4``
> > + - Level 4.0
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1``
> > + - Level 4.1
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5``
> > + - Level 5.0
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1``
> > + - Level 5.1
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2``
> > + - Level 5.2
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6``
> > + - Level 6.0
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1``
> > + - Level 6.1
> > + * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2``
> > + - Level 6.2
> > +
> > +.. raw:: latex
> > +
> > + \end{adjustbox}
> > +
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION (integer)``
> > + Indicates the number of evenly spaced subintervals, called ticks, within
> > + one second. This is a 16bit unsigned integer and has a maximum value up to
>
> 16bit -> 16 bit
>
I will correct it.
> > + 0xffff.
>
> Is there a HEVC-defined minimum value as well? You mention the max value, but not
> the min value, so it made me wonder...
>
Yes the minimum value is 1. I can mention the same in the next patch
version.
> > +
> > +.. _v4l2-hevc-tier-flag:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG``
> > + (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_tier_flag -
> > + TIER_FLAG specifies tiers information of the HEVC encoded picture. Tier
> > + were made to deal with applications that differ in terms of maximum bit
> > + rate. Setting the flag to 0 selects HEVC tier_flag as Main tier and setting
> > + this flag to 1 indicates High tier. High tier is for applications requiring
> > + high bit rates.
> > +
> > +.. raw:: latex
> > +
> > + \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > + :header-rows: 0
> > + :stub-columns: 0
> > +
> > + * - ``V4L2_MPEG_VIDEO_HEVC_TIER_MAIN``
> > + - Main tier.
> > + * - ``V4L2_MPEG_VIDEO_HEVC_TIER_HIGH``
> > + - High tier.
> > +
> > +.. raw:: latex
> > +
> > + \end{adjustbox}
> > +
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH (integer)``
> > + Selects HEVC maximum coding unit depth.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF (boolean)``
> > + Indicates loop filtering. Control value 1 indicates loop filtering
> > + is enabled and when set to 0 indicates loop filtering is disabled.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY (boolean)``
> > + Selects whether to apply the loop filter across the slice boundary or not.
> > + If the value is 0, loop filter will not be applied across the slice boundary.
> > + If the value is 1, loop filter will be applied across the slice boundary.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (integer)``
> > + Selects HEVC loop filter beta offset. The valid range is [-6, +6].
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (integer)``
> > + Selects HEVC loop filter tc offset. The valid range is [-6, +6].
> > +
> > +.. _v4l2-hevc-refresh-type:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE``
> > + (enum)
> > +
> > +enum v4l2_mpeg_video_hevc_hier_refresh_type -
> > + Selects refresh type for HEVC encoder.
> > + Host has to specify the period into
> > + HEVC_REFRESH_PERIOD.
>
> 'into HEVC_REFRESH_PERIOD' -> with the ``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD`` control
>
I will correct it.
> > +
> > +.. raw:: latex
> > +
> > + \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > + :header-rows: 0
> > + :stub-columns: 0
> > +
> > + * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE``
> > + - Use the B frame for hierarchical coding.
> > + * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA``
> > + - Use CRA (Clean Random Access Unit) picture encoding.
> > + * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR``
> > + - Use IDR picture encoding.
> > +
> > +.. raw:: latex
> > +
> > + \end{adjustbox}
> > +
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD (integer)``
> > + Selects the refresh period for HEVC encoder.
> > + This specifies the number of I pictures between two CRA/IDR pictures.
> > + This is valid only if REFRESH_TYPE is not 0.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU (boolean)``
> > + Indicates HEVC lossless encoding. Setting it to 0 disables lossless
> > + encoding. Setting it to 1 enables lossless encoding.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED (boolean)``
> > + Indicates constant intra prediction for HEVC encoder. Specifies the
> > + constrained intra prediction in which intra largest coding unit (LCU)
> > + prediction is performed by using residual data and decoded samples of
> > + neighboring intra LCU only. Setting the value to 1 enables constant intra
> > + prediction and setting the value to 0 disables constant inta prediction.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT (boolean)``
> > + Indicates wavefront parallel processing for HEVC encoder. Setting it to 0
> > + disables the feature and setting it to 1 enables the wavefront parallel
> > + processing.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB (boolean)``
> > + Setting the value to 1 enables combination of P and B frame for HEVC
> > + encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID (boolean)``
> > + Indicates temporal identifier for HEVC encoder which is enabled by
> > + setting the value to 1.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING (boolean)``
> > + Indicates bi-linear interpolation is conditionally used in the intra
> > + prediction filtering process in the CVS when set to 1. Indicates bi-linear
> > + interpolation is not used in the CVS when set to 0.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1 (integer)``
> > + Indicates maximum number of merge candidate motion vectors.
> > + Values are from zero to four.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION (boolean)``
> > + Indicates temporal motion vector prediction for HEVC encoder. Setting it to
> > + 1 enables the prediction. Setting it to 0 disables the prediction.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE (boolean)``
> > + Specifies if HEVC generates a stream with a size of the length field
> > + instead of start code pattern. The size of the length field is configurable
> > + through the V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD control. Setting
> > + the value to 0 disables encoding without startcode pattern. Setting the
> > + value to 1 will enables encoding without startcode pattern.
> > +
> > +.. _v4l2-hevc-size-of-length-field:
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD``
> > +(enum)
> > +
> > +enum v4l2_mpeg_video_hevc_size_of_length_field -
> > + Indicates the size of length field.
> > + This is valid when encoding WITHOUT_STARTCODE_ENABLE is enabled.
> > +
> > +.. raw:: latex
> > +
> > + \begin{adjustbox}{width=\columnwidth}
> > +
> > +.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
> > +
> > +.. flat-table::
> > + :header-rows: 0
> > + :stub-columns: 0
> > +
> > + * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_0``
> > + - Generate start code pattern (Normal).
> > + * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_1``
> > + - Generate size of length field instead of start code pattern and length is 1.
> > + * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_2``
> > + - Generate size of length field instead of start code pattern and length is 2.
> > + * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_4``
> > + - Generate size of length field instead of start code pattern and length is 4.
> > +
> > +.. raw:: latex
> > +
> > + \end{adjustbox}
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR (integer)``
> > + Indicates bit rate for hierarchical coding layer 0 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR (integer)``
> > + Indicates bit rate for hierarchical coding layer 1 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR (integer)``
> > + Indicates bit rate for hierarchical coding layer 2 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR (integer)``
> > + Indicates bit rate for hierarchical coding layer 3 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR (integer)``
> > + Indicates bit rate for hierarchical coding layer 4 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR (integer)``
> > + Indicates bit rate for hierarchical coding layer 5 for HEVC encoder.
> > +
> > +``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR (integer)``
> > + Indicates bit rate for hierarchical coding layer 6 for HEVC encoder.
> > +
> > +
> > +MFC 10.10 MPEG Controls
> > +-----------------------
> > +
> > +The following MPEG class controls deal with MPEG decoding and encoding
> > +settings that are specific to the Multi Format Codec 10.10 device present
> > +in the S5P and Exynos family of SoCs by Samsung.
> > +
> > +
> > +.. _mfc1010-control-id:
> > +
> > +MFC 10.10 Control IDs
> > +^^^^^^^^^^^^^^^^^^^^^
> > +
> > +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (integer)``
> > + Selects number of P reference pictures required for HEVC encoder.
> > + P-Frame can use 1 or 2 frames for reference.
> > +
> > +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (integer)``
> > + Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
> > + disables generating SPS and PPS at every IDR. Setting it to one enables
> > + generating SPS and PPS at every IDR.
> > +
> > +
> > .. _camera-controls:
> >
> > Camera Control Reference
> >
>
> Regards,
>
> Hans
>
>
Thank you for the review.
Regards,
Smitha
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
2017-07-20 15:46 ` Stanimir Varbanov
@ 2017-07-25 4:53 ` Smitha T Murthy
-1 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-07-25 4:53 UTC (permalink / raw)
To: Stanimir Varbanov
Cc: linux-arm-kernel, linux-media, linux-kernel, kyungmin.park,
kamil, jtp.park, a.hajda, mchehab, pankaj.dubey, krzk,
m.szyprowski, s.nawrocki
On Thu, 2017-07-20 at 18:46 +0300, Stanimir Varbanov wrote:
> Hi,
>
> >>> +
> >>> + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
> >>> + - Main profile.
> >>
> >> MAIN10?
> >>
> > No just MAIN.
>
> I haven't because the MFC does not supported it?
>
> If so, I think we have to add MAIN10 for completeness and because other
> drivers could have support for it.
>
MFC supports Main and Main Still profile for encoder. Main, Main10, Main
Still for decoder. I will add both Main and Main10 in the next patch
series.
Thank you for the review.
Regards,
Smitha
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
@ 2017-07-25 4:53 ` Smitha T Murthy
0 siblings, 0 replies; 68+ messages in thread
From: Smitha T Murthy @ 2017-07-25 4:53 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, 2017-07-20 at 18:46 +0300, Stanimir Varbanov wrote:
> Hi,
>
> >>> +
> >>> + * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
> >>> + - Main profile.
> >>
> >> MAIN10?
> >>
> > No just MAIN.
>
> I haven't because the MFC does not supported it?
>
> If so, I think we have to add MAIN10 for completeness and because other
> drivers could have support for it.
>
MFC supports Main and Main Still profile for encoder. Main, Main10, Main
Still for decoder. I will add both Main and Main10 in the next patch
series.
Thank you for the review.
Regards,
Smitha
^ permalink raw reply [flat|nested] 68+ messages in thread
* Re: [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
2017-07-17 11:18 ` Smitha T Murthy
@ 2017-08-17 14:43 ` Stanimir Varbanov
-1 siblings, 0 replies; 68+ messages in thread
From: Stanimir Varbanov @ 2017-08-17 14:43 UTC (permalink / raw)
To: Smitha T Murthy, Stanimir Varbanov
Cc: linux-arm-kernel, linux-media, linux-kernel, kyungmin.park,
kamil, jtp.park, a.hajda, mchehab, pankaj.dubey, krzk,
m.szyprowski, s.nawrocki
Hi,
On 07/17/2017 02:18 PM, Smitha T Murthy wrote:
> On Fri, 2017-07-07 at 17:59 +0300, Stanimir Varbanov wrote:
>> Hi,
>>
>> On 06/19/2017 08:10 AM, Smitha T Murthy wrote:
>>> Added V4l2 controls for HEVC encoder
>>>
>>> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
>>> ---
>>> Documentation/media/uapi/v4l/extended-controls.rst | 364 +++++++++++++++++++++
>>> 1 file changed, 364 insertions(+)
>>>
<cut>
>>
>>> +MFC 10.10 MPEG Controls
>>> +-----------------------
>>> +
>>> +The following MPEG class controls deal with MPEG decoding and encoding
>>> +settings that are specific to the Multi Format Codec 10.10 device present
>>> +in the S5P and Exynos family of SoCs by Samsung.
>>> +
>>> +
>>> +.. _mfc1010-control-id:
>>> +
>>> +MFC 10.10 Control IDs
>>> +^^^^^^^^^^^^^^^^^^^^^
>>> +
>>> +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (integer)``
>>> + Selects number of P reference pictures required for HEVC encoder.
>>> + P-Frame can use 1 or 2 frames for reference.
>>> +
>>> +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (integer)``
>>> + Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
>>> + disables generating SPS and PPS at every IDR. Setting it to one enables
>>> + generating SPS and PPS at every IDR.
>>> +
>>
>> I'm not sure those two should be driver specific, have to check does
>> venus driver has similar controls.
>>
> Yes please check and let me know if you have similar controls, I will
> move it out.
The venus encoder also has such a control so you can move it out of MFC
specific controls.
Also I think this control should be valid for every codec which supports
IDR, i.e. H264, so I think you could drop _HEVC_from the control name.
Do you plan to resend the patchset soon so that it could be applied for
4.14? If you haven't time let me know I can help with the generic HEVC
part of the patchset.
--
regards,
Stan
^ permalink raw reply [flat|nested] 68+ messages in thread
* [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs
@ 2017-08-17 14:43 ` Stanimir Varbanov
0 siblings, 0 replies; 68+ messages in thread
From: Stanimir Varbanov @ 2017-08-17 14:43 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On 07/17/2017 02:18 PM, Smitha T Murthy wrote:
> On Fri, 2017-07-07 at 17:59 +0300, Stanimir Varbanov wrote:
>> Hi,
>>
>> On 06/19/2017 08:10 AM, Smitha T Murthy wrote:
>>> Added V4l2 controls for HEVC encoder
>>>
>>> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
>>> ---
>>> Documentation/media/uapi/v4l/extended-controls.rst | 364 +++++++++++++++++++++
>>> 1 file changed, 364 insertions(+)
>>>
<cut>
>>
>>> +MFC 10.10 MPEG Controls
>>> +-----------------------
>>> +
>>> +The following MPEG class controls deal with MPEG decoding and encoding
>>> +settings that are specific to the Multi Format Codec 10.10 device present
>>> +in the S5P and Exynos family of SoCs by Samsung.
>>> +
>>> +
>>> +.. _mfc1010-control-id:
>>> +
>>> +MFC 10.10 Control IDs
>>> +^^^^^^^^^^^^^^^^^^^^^
>>> +
>>> +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_REF_NUMBER_FOR_PFRAMES (integer)``
>>> + Selects number of P reference pictures required for HEVC encoder.
>>> + P-Frame can use 1 or 2 frames for reference.
>>> +
>>> +``V4L2_CID_MPEG_MFC10_VIDEO_HEVC_PREPEND_SPSPPS_TO_IDR (integer)``
>>> + Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
>>> + disables generating SPS and PPS at every IDR. Setting it to one enables
>>> + generating SPS and PPS at every IDR.
>>> +
>>
>> I'm not sure those two should be driver specific, have to check does
>> venus driver has similar controls.
>>
> Yes please check and let me know if you have similar controls, I will
> move it out.
The venus encoder also has such a control so you can move it out of MFC
specific controls.
Also I think this control should be valid for every codec which supports
IDR, i.e. H264, so I think you could drop _HEVC_from the control name.
Do you plan to resend the patchset soon so that it could be applied for
4.14? If you haven't time let me know I can help with the generic HEVC
part of the patchset.
--
regards,
Stan
^ permalink raw reply [flat|nested] 68+ messages in thread
end of thread, other threads:[~2017-08-17 14:43 UTC | newest]
Thread overview: 68+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
[not found] <CGME20170619052453epcas1p426ebca32768cee57390f39b53d835e81@epcas1p4.samsung.com>
2017-06-19 5:10 ` [Patch v5 00/12] Add MFC v10.10 support Smitha T Murthy
2017-06-19 5:10 ` Smitha T Murthy
[not found] ` <CGME20170619052455epcas5p3b0c71e840af3b9022bf69d1058cc94e5@epcas5p3.samsung.com>
2017-06-19 5:10 ` [Patch v5 01/12] [media] s5p-mfc: Rename IS_MFCV8 macro Smitha T Murthy
2017-06-19 5:10 ` Smitha T Murthy
[not found] ` <CGME20170619052458epcas5p3ffbe45cb390e87df6bb11980cd7498aa@epcas5p3.samsung.com>
2017-06-19 5:10 ` [Patch v5 02/12] [media] s5p-mfc: Adding initial support for MFC v10.10 Smitha T Murthy
2017-06-19 5:10 ` Smitha T Murthy
[not found] ` <CGME20170619052500epcas1p477df788aee11a5a0d3e2defac97e9ae3@epcas1p4.samsung.com>
2017-06-19 5:10 ` [Patch v5 03/12] [media] s5p-mfc: Use min scratch buffer size as provided by F/W Smitha T Murthy
2017-06-19 5:10 ` Smitha T Murthy
[not found] ` <CGME20170619052502epcas1p41e0ba072755ca63278f2d4cfdc03ed06@epcas1p4.samsung.com>
2017-06-19 5:10 ` [Patch v5 04/12] [media] s5p-mfc: Support MFCv10.10 buffer requirements Smitha T Murthy
2017-06-19 5:10 ` Smitha T Murthy
2017-06-27 20:30 ` Kamil Debski
2017-06-27 20:30 ` Kamil Debski
2017-06-28 5:06 ` Smitha T Murthy
2017-06-28 5:06 ` Smitha T Murthy
[not found] ` <CGME20170619052505epcas5p33a78ee709263cc9ae33cd9383794ca06@epcas5p3.samsung.com>
2017-06-19 5:10 ` [Patch v5 05/12] [media] videodev2.h: Add v4l2 definition for HEVC Smitha T Murthy
2017-06-19 5:10 ` Smitha T Murthy
2017-07-07 14:56 ` Stanimir Varbanov
2017-07-07 14:56 ` Stanimir Varbanov
2017-07-17 11:12 ` Smitha T Murthy
2017-07-17 11:12 ` Smitha T Murthy
2017-07-20 13:07 ` Hans Verkuil
2017-07-20 13:07 ` Hans Verkuil
2017-07-24 4:29 ` Smitha T Murthy
2017-07-24 4:29 ` Smitha T Murthy
[not found] ` <CGME20170619052507epcas1p406fa9f6d84baa9c11050b1998021788a@epcas1p4.samsung.com>
2017-06-19 5:10 ` [Patch v5 06/12] [media] v4l2-ioctl: add HEVC format description Smitha T Murthy
2017-06-19 5:10 ` Smitha T Murthy
2017-07-20 13:07 ` Hans Verkuil
2017-07-20 13:07 ` Hans Verkuil
2017-07-24 4:28 ` Smitha T Murthy
2017-07-24 4:28 ` Smitha T Murthy
[not found] ` <CGME20170619052509epcas1p4841f9c3733280a232d35c8624fe80576@epcas1p4.samsung.com>
2017-06-19 5:10 ` [Patch v5 07/12] Documentation: v4l: Documentation for HEVC v4l2 definition Smitha T Murthy
2017-06-19 5:10 ` Smitha T Murthy
[not found] ` <CGME20170619052511epcas1p4e79efd3c9f0f8062eeac1ab4884b709e@epcas1p4.samsung.com>
2017-06-19 5:10 ` [Patch v5 08/12] [media] s5p-mfc: Add support for HEVC decoder Smitha T Murthy
2017-06-19 5:10 ` Smitha T Murthy
[not found] ` <CGME20170619052514epcas1p45d4b590d673a0ff2a3cf0117d55e656a@epcas1p4.samsung.com>
2017-06-19 5:10 ` [Patch v5 09/12] [media] s5p-mfc: Add VP9 decoder support Smitha T Murthy
2017-06-19 5:10 ` Smitha T Murthy
[not found] ` <CGME20170619052516epcas5p349b080cc6c242444d2db1f3c0e1c6f68@epcas5p3.samsung.com>
2017-06-19 5:10 ` [Patch v5 10/12] [media] v4l2: Add v4l2 control IDs for HEVC encoder Smitha T Murthy
2017-06-19 5:10 ` Smitha T Murthy
2017-07-20 13:13 ` Hans Verkuil
2017-07-20 13:13 ` Hans Verkuil
2017-07-24 4:30 ` Smitha T Murthy
2017-07-24 4:30 ` Smitha T Murthy
[not found] ` <CGME20170619052519epcas5p3bacba6c01bf2f135e5cd628226f8d24b@epcas5p3.samsung.com>
2017-06-19 5:10 ` [Patch v5 11/12] [media] s5p-mfc: Add support " Smitha T Murthy
2017-06-19 5:10 ` Smitha T Murthy
2017-07-20 13:32 ` Hans Verkuil
2017-07-20 13:32 ` Hans Verkuil
2017-07-24 4:40 ` Smitha T Murthy
2017-07-24 4:40 ` Smitha T Murthy
[not found] ` <CGME20170619052521epcas5p36a0bc384d10809dcfe775e6da87ed37b@epcas5p3.samsung.com>
2017-06-19 5:10 ` [Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs Smitha T Murthy
2017-06-19 5:10 ` Smitha T Murthy
2017-06-28 20:04 ` Kamil Debski
2017-06-28 20:04 ` Kamil Debski
2017-06-30 3:24 ` Smitha T Murthy
2017-06-30 3:24 ` Smitha T Murthy
2017-07-07 14:59 ` Stanimir Varbanov
2017-07-07 14:59 ` Stanimir Varbanov
2017-07-17 11:18 ` Smitha T Murthy
2017-07-17 11:18 ` Smitha T Murthy
2017-07-20 15:46 ` Stanimir Varbanov
2017-07-20 15:46 ` Stanimir Varbanov
2017-07-25 4:53 ` Smitha T Murthy
2017-07-25 4:53 ` Smitha T Murthy
2017-08-17 14:43 ` Stanimir Varbanov
2017-08-17 14:43 ` Stanimir Varbanov
2017-07-20 14:50 ` Hans Verkuil
2017-07-20 14:50 ` Hans Verkuil
2017-07-25 4:48 ` Smitha T Murthy
2017-07-25 4:48 ` Smitha T Murthy
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