From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Binbin Zhou To: Ralf Baechle , James Hogan Cc: John Crispin , "Steven J . Hill" , Aurelien Jarno , Fuxin Zhang , Zhangjin Wu , Kelvin Cheung , Yang Ling , =?UTF-8?q?=E8=B0=A2=E8=87=B4=E9=82=A6?= , Stephen Boyd , Michael Turquette , linux-mips@linux-mips.org, linux-clk@vger.kernel.org, Binbin Zhou , HuaCai Chen Subject: [PATCH v8 3/9] MIPS: Loongson: Add basic Loongson-1A CPU support Date: Tue, 20 Jun 2017 16:57:01 +0800 Message-Id: <1497949027-10988-4-git-send-email-zhoubb@lemote.com> In-Reply-To: <1497949027-10988-1-git-send-email-zhoubb@lemote.com> References: <1497949027-10988-1-git-send-email-zhoubb@lemote.com> List-ID: The Loongson-1A CPU is similar with Loongson-1B/1C, which is a 32-bit SoC. It implements the MIPS32 release 2 instruction set. It's a cost-effective single chip system based on LS232 processor core, and is applicable to fields such as industrial control. Signed-off-by: Binbin Zhou Signed-off-by: HuaCai Chen --- arch/mips/include/asm/cpu-type.h | 3 ++- arch/mips/kernel/cpu-probe.c | 4 +++- arch/mips/loongson32/Platform | 1 + arch/mips/loongson32/common/setup.c | 4 +++- arch/mips/mm/c-r4k.c | 10 ++++++++++ 5 files changed, 19 insertions(+), 3 deletions(-) diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h index 175fe56..2202be8 100644 --- a/arch/mips/include/asm/cpu-type.h +++ b/arch/mips/include/asm/cpu-type.h @@ -24,7 +24,8 @@ static inline int __pure __get_cpu_type(const int cpu_type) case CPU_LOONGSON3: #endif -#if defined(CONFIG_SYS_HAS_CPU_LOONGSON1B) || \ +#if defined(CONFIG_SYS_HAS_CPU_LOONGSON1A) || \ + defined(CONFIG_SYS_HAS_CPU_LOONGSON1B) || \ defined(CONFIG_SYS_HAS_CPU_LOONGSON1C) case CPU_LOONGSON1: #endif diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 25f729c..c23fa20 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1514,7 +1514,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) switch (c->processor_id & PRID_REV_MASK) { case PRID_REV_LOONGSON1ABC: -#ifdef CONFIG_CPU_LOONGSON1B +#if defined(CONFIG_LOONGSON1_LS1A) + __cpu_name[cpu] = "Loongson 1A"; +#elif defined(CONFIG_CPU_LOONGSON1B) __cpu_name[cpu] = "Loongson 1B"; #endif break; diff --git a/arch/mips/loongson32/Platform b/arch/mips/loongson32/Platform index ffe01c6..a9e0fa7 100644 --- a/arch/mips/loongson32/Platform +++ b/arch/mips/loongson32/Platform @@ -4,5 +4,6 @@ cflags-$(CONFIG_CPU_LOONGSON1) += \ platform-$(CONFIG_MACH_LOONGSON32) += loongson32/ cflags-$(CONFIG_MACH_LOONGSON32) += -I$(srctree)/arch/mips/include/asm/mach-loongson32 +load-$(CONFIG_LOONGSON1_LS1A) += 0xffffffff80200000 load-$(CONFIG_LOONGSON1_LS1B) += 0xffffffff80100000 load-$(CONFIG_LOONGSON1_LS1C) += 0xffffffff80100000 diff --git a/arch/mips/loongson32/common/setup.c b/arch/mips/loongson32/common/setup.c index c8e8b3e..1c3324a 100644 --- a/arch/mips/loongson32/common/setup.c +++ b/arch/mips/loongson32/common/setup.c @@ -22,7 +22,9 @@ const char *get_system_type(void) switch (processor_id & PRID_REV_MASK) { case PRID_REV_LOONGSON1ABC: -#if defined(CONFIG_LOONGSON1_LS1B) +#if defined(CONFIG_LOONGSON1_LS1A) + return "LOONGSON LS1A"; +#elif defined(CONFIG_LOONGSON1_LS1B) return "LOONGSON LS1B"; #elif defined(CONFIG_LOONGSON1_LS1C) return "LOONGSON LS1C"; diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 81d6a15..567beef 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1366,6 +1366,16 @@ static void probe_pcache(void) c->options |= MIPS_CPU_PREFETCH; break; + case CPU_LOONGSON1: + if (read_c0_config7() & MIPS_CONF7_AR) { + /* + * effectively physically indexed dcache, + * thus no virtual aliases. + */ + c->dcache.flags |= MIPS_CACHE_PINDEX; + break; + } + default: if (!(config & MIPS_CONF_M)) panic("Don't know how to probe P-caches on this cpu."); -- 2.9.4