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From: "Lluís Vilanova" <vilanova@ac.upc.edu>
To: qemu-devel@nongnu.org
Cc: "Emilio G. Cota" <cota@braap.org>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Richard Henderson" <rth@twiddle.net>,
	"Peter Crosthwaite" <crosthwaite.peter@gmail.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>
Subject: [Qemu-devel] [PATCH v11 04/29] target: [tcg] Add generic translation framework
Date: Wed, 28 Jun 2017 15:32:48 +0300	[thread overview]
Message-ID: <149865316837.17063.1608754834009945976.stgit@frigg.lan> (raw)
In-Reply-To: <149865219962.17063.10630533069463266646.stgit@frigg.lan>

Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
---
 accel/tcg/Makefile.objs   |    1 
 accel/tcg/translator.c    |  153 +++++++++++++++++++++++++++++++++++++++++++++
 include/exec/gen-icount.h |    2 -
 include/exec/translator.h |  104 +++++++++++++++++++++++++++++++
 4 files changed, 259 insertions(+), 1 deletion(-)
 create mode 100644 accel/tcg/translator.c

diff --git a/accel/tcg/Makefile.objs b/accel/tcg/Makefile.objs
index f173cd5397..3a5da5357c 100644
--- a/accel/tcg/Makefile.objs
+++ b/accel/tcg/Makefile.objs
@@ -1,3 +1,4 @@
 obj-$(CONFIG_SOFTMMU) += tcg-all.o
 obj-$(CONFIG_SOFTMMU) += cputlb.o
 obj-y += cpu-exec.o cpu-exec-common.o translate-all.o translate-common.o
+obj-y += translator.o
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
new file mode 100644
index 0000000000..b941ebdc62
--- /dev/null
+++ b/accel/tcg/translator.c
@@ -0,0 +1,153 @@
+/*
+ * Generic intermediate code generation.
+ *
+ * Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "qemu/error-report.h"
+#include "cpu.h"
+#include "tcg/tcg.h"
+#include "tcg/tcg-op.h"
+#include "exec/exec-all.h"
+#include "exec/gen-icount.h"
+#include "exec/log.h"
+#include "exec/translator.h"
+
+
+static inline void translate_block_tcg_check(const DisasContextBase *db)
+{
+    if (tcg_check_temp_count()) {
+        error_report("warning: TCG temporary leaks before "TARGET_FMT_lx,
+                     db->pc_next);
+    }
+}
+
+void translate_block(const TranslatorOps *ops, DisasContextBase *db,
+                     CPUState *cpu, TranslationBlock *tb)
+{
+    int max_insns;
+
+    /* Initialize DisasContext */
+    db->tb = tb;
+    db->pc_first = tb->pc;
+    db->pc_next = db->pc_first;
+    db->is_jmp = DISAS_NEXT;
+    db->num_insns = 0;
+    db->singlestep_enabled = cpu->singlestep_enabled;
+    ops->init_disas_context(db, cpu);
+
+    /* Initialize globals */
+    ops->init_globals(db, cpu);
+    tcg_clear_temp_count();
+
+    /* Instruction counting */
+    max_insns = db->tb->cflags & CF_COUNT_MASK;
+    if (max_insns == 0) {
+        max_insns = CF_COUNT_MASK;
+    }
+    if (max_insns > TCG_MAX_INSNS) {
+        max_insns = TCG_MAX_INSNS;
+    }
+    if (db->singlestep_enabled || singlestep) {
+        max_insns = 1;
+    }
+
+    /* Start translating */
+    gen_tb_start(db->tb);
+    ops->tb_start(db, cpu);
+
+    while (true) {
+        db->num_insns++;
+        ops->insn_start(db, cpu);
+
+        /* Early exit before breakpoint checks */
+        if (unlikely(db->is_jmp != DISAS_NEXT)) {
+            break;
+        }
+
+        /* Pass breakpoint hits to target for further processing */
+        if (unlikely(!QTAILQ_EMPTY(&cpu->breakpoints))) {
+            CPUBreakpoint *bp;
+            QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
+                if (bp->pc == db->pc_next) {
+                    BreakpointCheckType bp_check =
+                        ops->breakpoint_check(db, cpu, bp);
+                    switch (bp_check) {
+                    case BC_MISS:
+                        /* Target ignored this breakpoint, go to next */
+                        break;
+                    case BC_HIT_INSN:
+                        /* Hit, keep translating */
+                        /*
+                         * TODO: if we're never going to have more than one
+                         *       BP in a single address, we can simply use a
+                         *       bool here.
+                         */
+                        goto done_breakpoints;
+                    case BC_HIT_TB:
+                        /* Hit, end TB */
+                        goto done_generating;
+                    default:
+                        g_assert_not_reached();
+                    }
+                }
+            }
+        }
+    done_breakpoints:
+
+        /* Accept I/O on last instruction */
+        if (db->num_insns == max_insns && (db->tb->cflags & CF_LAST_IO)) {
+            gen_io_start();
+        }
+
+        /* Disassemble one instruction */
+        db->pc_next = ops->translate_insn(db, cpu);
+
+        /**************************************************/
+        /* Conditions to stop translation                 */
+        /**************************************************/
+
+        /* Target-specific conditions set by disassembly */
+        if (db->is_jmp != DISAS_NEXT) {
+            break;
+        }
+
+        /* Too many instructions */
+        if (tcg_op_buf_full() || db->num_insns >= max_insns) {
+            db->is_jmp = DISAS_TOO_MANY;
+            break;
+        }
+
+        translate_block_tcg_check(db);
+    }
+
+    ops->tb_stop(db, cpu);
+
+    if (db->tb->cflags & CF_LAST_IO) {
+        gen_io_end();
+    }
+
+done_generating:
+    gen_tb_end(db->tb, db->num_insns);
+
+    translate_block_tcg_check(db);
+
+#ifdef DEBUG_DISAS
+    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
+        && qemu_log_in_addr_range(db->pc_first)) {
+        qemu_log_lock();
+        qemu_log("----------------\n");
+        ops->disas_log(db, cpu);
+        qemu_log("\n");
+        qemu_log_unlock();
+    }
+#endif
+
+    db->tb->size = db->pc_next - db->pc_first;
+    db->tb->icount = db->num_insns;
+}
diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h
index 3fb17d435a..d66ca09f60 100644
--- a/include/exec/gen-icount.h
+++ b/include/exec/gen-icount.h
@@ -44,7 +44,7 @@ static inline void gen_tb_start(TranslationBlock *tb)
     tcg_temp_free_i32(count);
 }
 
-static void gen_tb_end(TranslationBlock *tb, int num_insns)
+static inline void gen_tb_end(TranslationBlock *tb, int num_insns)
 {
     if (tb->cflags & CF_USE_ICOUNT) {
         /* Update the num_insn immediate parameter now that we know
diff --git a/include/exec/translator.h b/include/exec/translator.h
index 1ffab03a53..c6fe64f988 100644
--- a/include/exec/translator.h
+++ b/include/exec/translator.h
@@ -10,6 +10,38 @@
 #ifndef EXEC__TRANSLATOR_H
 #define EXEC__TRANSLATOR_H
 
+/*
+ * Include this header from a target-specific file, and add a
+ *
+ *     DisasContextBase base;
+ *
+ * member in your target-specific DisasContext.
+ */
+
+
+#include "exec/exec-all.h"
+#include "tcg/tcg.h"
+
+
+/**
+ * BreakpointCheckType:
+ * @BC_MISS: No hit
+ * @BC_HIT_INSN: Hit, but continue translating TB
+ * @BC_HIT_TB: Hit, stop translating TB
+ *
+ * How to react to a breakpoint. A hit means no more breakpoints will be checked
+ * for the current instruction.
+ *
+ * Not all breakpoints associated to an address are necessarily raised by
+ * targets (e.g., due to conditions encoded in their flags), so tey can decide
+ * that a breakpoint missed the address (@BP_MISS).
+ */
+typedef enum BreakpointCheckType {
+    BC_MISS,
+    BC_HIT_INSN,
+    BC_HIT_TB,
+} BreakpointCheckType;
+
 /**
  * DisasJumpType:
  * @DISAS_NEXT: Next instruction in program order.
@@ -33,6 +65,78 @@ typedef enum DisasJumpType {
     DISAS_TARGET_9,
     DISAS_TARGET_10,
     DISAS_TARGET_11,
+    DISAS_TARGET_12,
+    DISAS_TARGET_13,
+    DISAS_TARGET_14,
 } DisasJumpType;
 
+/**
+ * DisasContextBase:
+ * @tb: Translation block for this disassembly.
+ * @pc_first: Address of first guest instruction in this TB.
+ * @pc_next: Address of next guest instruction in this TB (current during
+ *           disassembly).
+ * @is_jmp: What instruction to disassemble next.
+ * @num_insns: Number of translated instructions (including current).
+ * @singlestep_enabled: "Hardware" single stepping enabled.
+ *
+ * Architecture-agnostic disassembly context.
+ */
+typedef struct DisasContextBase {
+    TranslationBlock *tb;
+    target_ulong pc_first;
+    target_ulong pc_next;
+    DisasJumpType is_jmp;
+    unsigned int num_insns;
+    bool singlestep_enabled;
+} DisasContextBase;
+
+/**
+ * TranslatorOps:
+ * @init_disas_context: Initialize a DisasContext struct (DisasContextBase has
+ *                      already been initialized).
+ * @init_globals: Initialize global variables.
+ * @tb_start: Start translating a new TB.
+ * @insn_start: Start translating a new instruction.
+ * @breakpoint_check: Check if a breakpoint did hit. When called, the breakpoint
+ *                    has already been checked to match the PC.
+ * @disas_insn: Disassemble one instruction an return the PC for the next
+ *              one. Can set db->is_jmp to DJ_TARGET or above to stop
+ *              translation.
+ * @tb_stop: Stop translating a TB.
+ * @disas_flags: Get flags argument for log_target_disas().
+ *
+ * Target-specific operations for the generic translator loop.
+ */
+typedef struct TranslatorOps {
+    void (*init_disas_context)(DisasContextBase *db, CPUState *cpu);
+    void (*init_globals)(DisasContextBase *db, CPUState *cpu);
+    void (*tb_start)(DisasContextBase *db, CPUState *cpu);
+    void (*insn_start)(DisasContextBase *db, CPUState *cpu);
+    BreakpointCheckType (*breakpoint_check)(DisasContextBase *db, CPUState *cpu,
+                                            const CPUBreakpoint *bp);
+    target_ulong (*translate_insn)(DisasContextBase *db, CPUState *cpu);
+    void (*tb_stop)(DisasContextBase *db, CPUState *cpu);
+    void (*disas_log)(const DisasContextBase *db, CPUState *cpu);
+} TranslatorOps;
+
+/**
+ * translate_block:
+ * @ops: Target-specific operations.
+ * @db: Disassembly context.
+ * @cpu: Target vCPU.
+ * @tb: Translation block.
+ *
+ * Generic translator loop.
+ *
+ * Translation will stop in the following cases (in order):
+ * - When set by #TranslatorOps::insn_start.
+ * - When set by #TranslatorOps::translate_insn.
+ * - When the TCG operation buffer is full.
+ * - When single-stepping is enabled (system-wide or on the current vCPU).
+ * - When too many instructions have been translated.
+ */
+void translate_block(const TranslatorOps *ops, DisasContextBase *db,
+                     CPUState *cpu, TranslationBlock *tb);
+
 #endif  /* EXEC__TRANSLATOR_H */

  parent reply	other threads:[~2017-06-28 12:33 UTC|newest]

Thread overview: 100+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-28 12:16 [Qemu-devel] [PATCH v11 00/29] translate: [tcg] Generic translation framework Lluís Vilanova
2017-06-28 12:20 ` [Qemu-devel] [PATCH v11 01/29] Pass generic CPUState to gen_intermediate_code() Lluís Vilanova
2017-06-29 22:52   ` Emilio G. Cota
2017-06-30 18:46     ` Richard Henderson
2017-07-01 22:44   ` Richard Henderson
2017-06-28 12:24 ` [Qemu-devel] [PATCH v11 02/29] cpu-exec: Avoid global variables in icount-related functions Lluís Vilanova
2017-06-29 22:56   ` Emilio G. Cota
2017-06-28 12:28 ` [Qemu-devel] [PATCH v11 03/29] target: [tcg] Use a generic enum for DISAS_ values Lluís Vilanova
2017-06-29 23:09   ` Emilio G. Cota
2017-07-01 22:48   ` Richard Henderson
2017-06-28 12:32 ` Lluís Vilanova [this message]
2017-06-30  0:02   ` [Qemu-devel] [PATCH v11 04/29] target: [tcg] Add generic translation framework Emilio G. Cota
2017-07-01 22:57     ` Richard Henderson
2017-06-30  1:18   ` Emilio G. Cota
2017-07-01 23:37   ` Richard Henderson
2017-07-04 18:59     ` Lluís Vilanova
2017-07-04 19:14       ` Peter Maydell
2017-07-04 22:31         ` Richard Henderson
2017-07-04 22:34           ` Peter Maydell
2017-06-28 12:36 ` [Qemu-devel] [PATCH v11 05/29] target/i386: [tcg] Port to DisasContextBase Lluís Vilanova
2017-06-29 23:33   ` Emilio G. Cota
2017-07-01 23:39   ` Richard Henderson
2017-06-28 12:40 ` [Qemu-devel] [PATCH v11 06/29] target/i386: [tcg] Refactor init_disas_context Lluís Vilanova
2017-06-29 23:51   ` Emilio G. Cota
2017-07-07  7:41     ` Lluís Vilanova
2017-07-01 23:50   ` Richard Henderson
2017-06-28 12:44 ` [Qemu-devel] [PATCH v11 07/29] target/i386: [tcg] Refactor init_globals Lluís Vilanova
2017-06-30  0:06   ` Emilio G. Cota
2017-07-02  0:25   ` Richard Henderson
2017-06-28 12:48 ` [Qemu-devel] [PATCH v11 08/29] target/i386: [tcg] Refactor insn_start Lluís Vilanova
2017-06-30  0:08   ` Emilio G. Cota
2017-07-02  0:26   ` Richard Henderson
2017-06-28 12:52 ` [Qemu-devel] [PATCH v11 09/29] target/i386: [tcg] Refactor breakpoint_check Lluís Vilanova
2017-06-30  0:24   ` Emilio G. Cota
2017-07-02  0:28   ` Richard Henderson
2017-06-28 12:57 ` [Qemu-devel] [PATCH v11 10/29] target/i386: [tcg] Refactor translate_insn Lluís Vilanova
2017-06-30  0:41   ` Emilio G. Cota
2017-07-07  9:25     ` Lluís Vilanova
2017-07-07 15:18       ` Richard Henderson
2017-07-07 17:05         ` Lluís Vilanova
2017-07-02  0:41   ` Richard Henderson
2017-06-28 13:01 ` [Qemu-devel] [PATCH v11 11/29] target/i386: [tcg] Refactor tb_stop Lluís Vilanova
2017-06-30  0:47   ` Emilio G. Cota
2017-07-02  0:47   ` Richard Henderson
2017-06-28 13:05 ` [Qemu-devel] [PATCH v11 12/29] target/i386: [tcg] Refactor disas_log Lluís Vilanova
2017-06-30  0:50   ` Emilio G. Cota
2017-07-02  0:49   ` Richard Henderson
2017-06-28 13:09 ` [Qemu-devel] [PATCH v11 13/29] target/i386: [tcg] Port to generic translation framework Lluís Vilanova
2017-06-30  1:11   ` Emilio G. Cota
2017-07-07 10:27     ` Lluís Vilanova
2017-07-07 10:29     ` Lluís Vilanova
2017-07-02  0:52   ` Richard Henderson
2017-06-28 13:13 ` [Qemu-devel] [PATCH v11 14/29] target/arm: [tcg] Port to DisasContextBase Lluís Vilanova
2017-07-02  1:00   ` Richard Henderson
2017-06-28 13:17 ` [Qemu-devel] [PATCH v11 15/29] target/arm: [tcg] Port to init_disas_context Lluís Vilanova
2017-07-02  1:04   ` Richard Henderson
2017-06-28 13:21 ` [Qemu-devel] [PATCH v11 16/29] target/arm: [tcg, a64] " Lluís Vilanova
2017-07-02  1:13   ` Richard Henderson
2017-06-28 13:25 ` [Qemu-devel] [PATCH v11 17/29] target/arm: [tcg] Port to init_globals Lluís Vilanova
2017-07-02  1:14   ` Richard Henderson
2017-06-28 13:29 ` [Qemu-devel] [PATCH v11 18/29] target/arm: [tcg] Port to tb_start Lluís Vilanova
2017-07-02  1:17   ` Richard Henderson
2017-06-28 13:33 ` [Qemu-devel] [PATCH v11 19/29] target/arm: [tcg] Port to insn_start Lluís Vilanova
2017-07-02  1:18   ` Richard Henderson
2017-06-28 13:37 ` [Qemu-devel] [PATCH v11 20/29] target/arm: [tcg, a64] " Lluís Vilanova
2017-07-02  1:19   ` Richard Henderson
2017-06-28 13:41 ` [Qemu-devel] [PATCH v11 21/29] target/arm: [tcg] Port to breakpoint_check Lluís Vilanova
2017-07-02  1:21   ` Richard Henderson
2017-06-28 13:45 ` [Qemu-devel] [PATCH v11 22/29] target/arm: [tcg, a64] " Lluís Vilanova
2017-07-02  1:22   ` Richard Henderson
2017-06-28 13:49 ` [Qemu-devel] [PATCH v11 23/29] target/arm: [tcg] Port to translate_insn Lluís Vilanova
2017-07-02  1:34   ` Richard Henderson
2017-07-07 11:13     ` Lluís Vilanova
2017-07-07 15:26       ` Richard Henderson
2017-07-07 17:18         ` Lluís Vilanova
2017-07-07 17:38           ` Richard Henderson
2017-07-10 13:47             ` Lluís Vilanova
2017-07-10 15:28               ` Richard Henderson
2017-07-07 17:33         ` Peter Maydell
2017-07-07 17:48           ` Richard Henderson
2017-06-28 13:53 ` [Qemu-devel] [PATCH v11 24/29] target/arm: [tcg, a64] " Lluís Vilanova
2017-07-02  1:42   ` Richard Henderson
2017-07-07 11:18     ` Lluís Vilanova
2017-07-07 15:46       ` Richard Henderson
2017-07-07 16:19         ` Emilio G. Cota
2017-07-07 17:33           ` Lluís Vilanova
2017-07-07 17:32         ` Lluís Vilanova
2017-07-07 17:41           ` Richard Henderson
2017-07-11 15:56             ` Lluís Vilanova
2017-06-28 13:57 ` [Qemu-devel] [PATCH v11 25/29] target/arm: [tcg] Port to tb_stop Lluís Vilanova
2017-07-02  1:45   ` Richard Henderson
2017-06-28 14:01 ` [Qemu-devel] [PATCH v11 26/29] target/arm: [tcg, a64] " Lluís Vilanova
2017-07-02  1:48   ` Richard Henderson
2017-06-28 14:05 ` [Qemu-devel] [PATCH v11 27/29] target/arm: [tcg] Port to disas_log Lluís Vilanova
2017-07-02  1:49   ` Richard Henderson
2017-06-28 14:09 ` [Qemu-devel] [PATCH v11 28/29] target/arm: [tcg, a64] " Lluís Vilanova
2017-07-02  1:50   ` Richard Henderson
2017-06-28 14:13 ` [Qemu-devel] [PATCH v11 29/29] target/arm: [tcg] Port to generic translation framework Lluís Vilanova
2017-07-02  1:54   ` Richard Henderson
2017-07-07 11:26     ` Lluís Vilanova

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