From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39147) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQDXW-0005dn-2Z for qemu-devel@nongnu.org; Wed, 28 Jun 2017 10:02:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dQDXS-0004UY-Sw for qemu-devel@nongnu.org; Wed, 28 Jun 2017 10:01:54 -0400 From: =?utf-8?b?TGx1w61z?= Vilanova Date: Wed, 28 Jun 2017 17:01:35 +0300 Message-Id: <149865849564.17063.5123403029688828196.stgit@frigg.lan> In-Reply-To: <149865219962.17063.10630533069463266646.stgit@frigg.lan> References: <149865219962.17063.10630533069463266646.stgit@frigg.lan> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v11 26/29] target/arm: [tcg, a64] Port to tb_stop List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: "Emilio G. Cota" , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson , Peter Crosthwaite , Paolo Bonzini , Peter Maydell , "open list:ARM" Incrementally paves the way towards using the generic instruction transla= tion loop. Signed-off-by: Llu=C3=ADs Vilanova --- target/arm/translate-a64.c | 123 +++++++++++++++++++++++---------------= ------ 1 file changed, 65 insertions(+), 58 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 586a01a2de..c57f475dc0 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -11316,6 +11316,69 @@ static target_ulong aarch64_trblock_translate_in= sn(DisasContextBase *dcbase, return dc->pc; } =20 +static void aarch64_trblock_tb_stop(DisasContextBase *dcbase, CPUState *= cpu) +{ + DisasContext *dc =3D container_of(dcbase, DisasContext, base); + + if (unlikely(dc->base.singlestep_enabled || dc->ss_active) + && dc->base.is_jmp !=3D DISAS_EXC) { + /* Note that this means single stepping WFI doesn't halt the CPU. + * For conditional branch insns this is harmless unreachable cod= e as + * gen_goto_tb() has already handled emitting the debug exceptio= n + * (and thus a tb-jump is not possible when singlestepping). + */ + assert(dc->base.is_jmp !=3D DISAS_TB_JUMP); + if (dc->base.is_jmp !=3D DISAS_JUMP) { + gen_a64_set_pc_im(dc->pc); + } + if (dc->base.singlestep_enabled) { + gen_exception_internal(EXCP_DEBUG); + } else { + gen_step_complete_exception(dc); + } + } else { + switch (dc->base.is_jmp) { + case DISAS_NEXT: + case DISAS_TOO_MANY: + gen_goto_tb(dc, 1, dc->pc); + break; + default: + case DISAS_UPDATE: + gen_a64_set_pc_im(dc->pc); + /* fall through */ + case DISAS_JUMP: + tcg_gen_lookup_and_goto_ptr(cpu_pc); + break; + case DISAS_EXIT: + tcg_gen_exit_tb(0); + break; + case DISAS_TB_JUMP: + case DISAS_EXC: + case DISAS_SWI: + break; + case DISAS_WFE: + gen_a64_set_pc_im(dc->pc); + gen_helper_wfe(cpu_env); + break; + case DISAS_YIELD: + gen_a64_set_pc_im(dc->pc); + gen_helper_yield(cpu_env); + break; + case DISAS_WFI: + /* This is a special case because we don't want to just halt= the CPU + * if trying to debug across a WFI. + */ + gen_a64_set_pc_im(dc->pc); + gen_helper_wfi(cpu_env); + /* The helper doesn't necessarily throw an exception, but we + * must go back to the main loop to check for interrupts any= way. + */ + tcg_gen_exit_tb(0); + break; + } + } +} + void gen_intermediate_code_a64(DisasContextBase *dcbase, CPUState *cs, TranslationBlock *tb) { @@ -11398,68 +11461,12 @@ void gen_intermediate_code_a64(DisasContextBase= *dcbase, CPUState *cs, */ } while (!dc->base.is_jmp); =20 + aarch64_trblock_tb_stop(&dc->base, cs); + if (dc->base.tb->cflags & CF_LAST_IO) { gen_io_end(); } =20 - if (unlikely(cs->singlestep_enabled || dc->ss_active) - && dc->base.is_jmp !=3D DISAS_EXC) { - /* Note that this means single stepping WFI doesn't halt the CPU. - * For conditional branch insns this is harmless unreachable cod= e as - * gen_goto_tb() has already handled emitting the debug exceptio= n - * (and thus a tb-jump is not possible when singlestepping). - */ - assert(dc->base.is_jmp !=3D DISAS_TB_JUMP); - if (dc->base.is_jmp !=3D DISAS_JUMP) { - gen_a64_set_pc_im(dc->pc); - } - if (cs->singlestep_enabled) { - gen_exception_internal(EXCP_DEBUG); - } else { - gen_step_complete_exception(dc); - } - } else { - switch (dc->base.is_jmp) { - case DISAS_NEXT: - case DISAS_TOO_MANY: - gen_goto_tb(dc, 1, dc->pc); - break; - default: - case DISAS_UPDATE: - gen_a64_set_pc_im(dc->pc); - /* fall through */ - case DISAS_JUMP: - tcg_gen_lookup_and_goto_ptr(cpu_pc); - break; - case DISAS_EXIT: - tcg_gen_exit_tb(0); - break; - case DISAS_TB_JUMP: - case DISAS_EXC: - case DISAS_SWI: - break; - case DISAS_WFE: - gen_a64_set_pc_im(dc->pc); - gen_helper_wfe(cpu_env); - break; - case DISAS_YIELD: - gen_a64_set_pc_im(dc->pc); - gen_helper_yield(cpu_env); - break; - case DISAS_WFI: - /* This is a special case because we don't want to just halt= the CPU - * if trying to debug across a WFI. - */ - gen_a64_set_pc_im(dc->pc); - gen_helper_wfi(cpu_env); - /* The helper doesn't necessarily throw an exception, but we - * must go back to the main loop to check for interrupts any= way. - */ - tcg_gen_exit_tb(0); - break; - } - } - done_generating: gen_tb_end(tb, dc->base.num_insns); =20