From mboxrd@z Thu Jan 1 00:00:00 1970 From: William Wu Date: Wed, 9 Aug 2017 11:12:40 +0800 Subject: [U-Boot] [PATCH 2/3] ARM: dts: rockchip: add USB nodes for evb-rv1108 In-Reply-To: <1502248361-7953-1-git-send-email-william.wu@rock-chips.com> References: <1502248361-7953-1-git-send-email-william.wu@rock-chips.com> Message-ID: <1502248361-7953-3-git-send-email-william.wu@rock-chips.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de This patch adds USB OTG/EHCI/OHCI nodes for evb-rv1108 USB ports. Signed-off-by: William Wu --- arch/arm/dts/rv1108-evb.dts | 22 ++++++++++++++++++++++ arch/arm/dts/rv1108.dtsi | 24 ++++++++++++++++++++++++ 2 files changed, 46 insertions(+) diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts index 0128dd8..2b221b6 100644 --- a/arch/arm/dts/rv1108-evb.dts +++ b/arch/arm/dts/rv1108-evb.dts @@ -20,6 +20,15 @@ chosen { stdout-path = "serial2:1500000n8"; }; + + vcc5v0_otg: vcc5v0-otg-drv { + compatible = "regulator-fixed"; + enable-active-high; + regulator-name = "vcc5v0_otg"; + gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; }; &gmac { @@ -52,3 +61,16 @@ &uart2 { status = "okay"; }; + +&usb20_otg { + vbus-supply = <&vcc5v0_otg>; + status = "okay"; +}; + +&usb_host_ehci { + status = "okay"; +}; + +&usb_host_ohci { + status = "okay"; +}; diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi index 77ca24e..3153dfe 100644 --- a/arch/arm/dts/rv1108.dtsi +++ b/arch/arm/dts/rv1108.dtsi @@ -175,6 +175,30 @@ status = "disabled"; }; + usb_host_ehci: usb at 30140000 { + compatible = "generic-ehci"; + reg = <0x30140000 0x20000>; + interrupts = ; + status = "disabled"; + }; + + usb_host_ohci: usb at 30160000 { + compatible = "generic-ohci"; + reg = <0x30160000 0x20000>; + interrupts = ; + status = "disabled"; + }; + + usb20_otg: usb at 30180000 { + compatible = "rockchip,rv1108-usb", "rockchip,rk3288-usb", + "snps,dwc2"; + reg = <0x30180000 0x40000>; + interrupts = ; + hnp-srp-disable; + dr_mode = "otg"; + status = "disabled"; + }; + sfc: sfc at 301c0000 { compatible = "rockchip,sfc"; reg = <0x301c0000 0x200>; -- 2.0.0