From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751371AbdHXGiV (ORCPT ); Thu, 24 Aug 2017 02:38:21 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:36041 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751183AbdHXGiT (ORCPT ); Thu, 24 Aug 2017 02:38:19 -0400 From: Sukadev Bhattiprolu To: Michael Ellerman Cc: Benjamin Herrenschmidt , mikey@neuling.org, stewart@linux.vnet.ibm.com, apopple@au1.ibm.com, hbabu@us.ibm.com, oohall@gmail.com, linuxppc-dev@ozlabs.org, Subject: [PATCH v7 00/12] Enable VAS Date: Wed, 23 Aug 2017 23:37:56 -0700 X-Mailer: git-send-email 2.7.4 X-TM-AS-GCONF: 00 x-cbid: 17082406-0036-0000-0000-0000025DE9C5 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00007601; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000224; SDB=6.00906836; UDB=6.00454554; IPR=6.00687033; BA=6.00005550; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00016840; XFM=3.00000015; UTC=2017-08-24 06:38:18 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17082406-0037-0000-0000-0000418A2765 Message-Id: <1503556688-15412-1-git-send-email-sukadev@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-08-24_03:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1708240106 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Power9 introduces a hardware subsystem referred to as the Virtual Accelerator Switchboard (VAS). VAS allows kernel subsystems and user space processes to directly access the Nest Accelerator (NX) engines which implement compression and encryption algorithms in the hardware. NX has been in Power processors since Power7+, but access to the NX engines was through the 'icswx' instruction which is only available to the kernel/hypervisor. Starting with Power9, access to the NX engines is provided to both kernel and user space processes through VAS. The switchboard (i.e VAS) multiplexes accesses between "receivers" and "senders", where the "receivers" are typically the NX engines and "senders" are the kernel subsystems and user processors that wish to access the receivers (NX engines). Once a sender is "connected" to a receiver through the switchboard, the senders can submit compression/ encryption requests to the hardware using the new (PowerISA 3.0) "copy" and "paste" instructions. In the initial OPAL and PowerNV kernel patchsets, the "senders" can only be kernel subsystems (eg NX-842 driver) and receivers can only be the NX-842 engine. Follow-on patch sets will allow senders/receivers to be user-space processes and receivers to be NX-GZIP engines. Provides: This kernel patch set configures the VAS subsystems and provides kernel interfaces to drivers like NX-842 to open receive and send windows in VAS and to submit compression requests to the NX engine. Requires: This patch set needs corresponding VAS/NX skiboot patches which were merged into skiboot tree. i.e skiboot must include: commit b503dcf ("vas: Set mmio enable bits in DD2") Tests: In-kernel compression requests were tested on DD1 and DD2 POWER9 hardware using compression self-test module and the following NX-842 patch set from Haren Myneni: https://lists.ozlabs.org/pipermail/linuxppc-dev/2017-July/160620.html Git Tree: https://github.com/sukadev/linux/ Branch: vas-kern-v7 Thanks to input from Ben Herrenschmidt, Michael Neuling, Michael Ellerman and Haren Myneni. Changelog[v7]: - Drop support for user space send/receive FTW windows (will be posted separately) Simplifies the rx-win-open interface a bit. - [Michael Ellerman] Move GET_FIELD/SET_FIELD macros from uapi/asm/vas.h to asm/vas.h. Changelog[v6] - Add support for user space send/receive FTW windows - Add a new, NX-FTW driver which provides the FTW user interface Changelog[v5] - [Ben Herrenschmidt] Make VAS a platform device in the device tree and use the core platform functions to parse the VAS properties. Map the VAS MMIO regions as non-cachable and paste regions as cachable. Use CONFIG_PPC_VAS rather than CONFIG_VAS; Don't assume VAS ids are sequential. - Copy the FIFO address as is into LFIFO_BAR (don't shift it). Changelog[v4] Comments from Michael Neuling: - Move VAS code from drivers/misc/vas to arch/powerpc/platforms/powernv since VAS only provides interfaces to other drivers like NX-842. - Drop vas-internal.h and use vas.h in separate dirs for VAS internal, kernel API and user API - Rather than create 6 separate device tree properties windows and window context, combine them into 6 "reg" properties. - Drop vas_window_reset() since windows are reset/cleared before being assigned to kernel/users. - Use ilog2() and radix_enabled() helpers Changelog[v3] - Rebase to v4.11-rc1 - Add interfaces to initialize send/receive window attributes to defaults that drivers can use (see arch/powerpc/include/asm/vas.h) - Modify interface vas_paste() to return 0 or error code - Fix a bug in setting Translation Control Mode (0b11 not 0x11) - Enable send-window-credit checking - Reorg code in vas_win_close() - Minor reorgs and tweaks to register field settings to make it easier to add support for user space windows. - Skip writing to read-only registers - Start window indexing from 0 rather than 1 Changelog[v2] - Use vas-id, HVWC, UWC and paste address, entries from device tree rather than defining/computing them in kernel and reorg code. Sukadev Bhattiprolu (12): powerpc/vas: Define macros, register fields and structures Move GET_FIELD/SET_FIELD to vas.h powerpc/vas: Define vas_init() and vas_exit() powerpc/vas: Define helpers to access MMIO regions powerpc/vas: Define helpers to init window context powerpc/vas: Define helpers to alloc/free windows powerpc/vas: Define vas_win_paste_addr() powerpc/vas: Define vas_win_id() powerpc/vas: Define vas_rx_win_open() interface powerpc/vas: Define vas_win_close() interface powerpc/vas: Define vas_tx_win_open() powerpc/vas: Define copy/paste interfaces .../devicetree/bindings/powerpc/ibm,vas.txt | 24 + MAINTAINERS | 9 + arch/powerpc/include/asm/vas.h | 174 +++ arch/powerpc/platforms/powernv/Kconfig | 14 + arch/powerpc/platforms/powernv/Makefile | 1 + arch/powerpc/platforms/powernv/copy-paste.h | 74 ++ arch/powerpc/platforms/powernv/vas-window.c | 1189 ++++++++++++++++++++ arch/powerpc/platforms/powernv/vas.c | 183 +++ arch/powerpc/platforms/powernv/vas.h | 500 ++++++++ drivers/crypto/nx/nx-842-powernv.c | 7 +- drivers/crypto/nx/nx-842.h | 5 - 11 files changed, 2172 insertions(+), 8 deletions(-) create mode 100644 Documentation/devicetree/bindings/powerpc/ibm,vas.txt create mode 100644 arch/powerpc/include/asm/vas.h create mode 100644 arch/powerpc/platforms/powernv/copy-paste.h create mode 100644 arch/powerpc/platforms/powernv/vas-window.c create mode 100644 arch/powerpc/platforms/powernv/vas.c create mode 100644 arch/powerpc/platforms/powernv/vas.h -- 2.7.4