From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751933AbdH1DVJ (ORCPT ); Sun, 27 Aug 2017 23:21:09 -0400 Received: from mail.cn.fujitsu.com ([183.91.158.132]:43040 "EHLO heian.cn.fujitsu.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751857AbdH1DVG (ORCPT ); Sun, 27 Aug 2017 23:21:06 -0400 X-IronPort-AV: E=Sophos;i="5.41,439,1498492800"; d="scan'208";a="24797567" From: Dou Liyang To: , , CC: , , , , , , , Dou Liyang Subject: [PATCH v8 02/13] x86/apic: Prepare for unifying the interrupt delivery modes setup Date: Mon, 28 Aug 2017 11:20:27 +0800 Message-ID: <1503890438-27840-3-git-send-email-douly.fnst@cn.fujitsu.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1503890438-27840-1-git-send-email-douly.fnst@cn.fujitsu.com> References: <1503890438-27840-1-git-send-email-douly.fnst@cn.fujitsu.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.167.226.106] X-yoursite-MailScanner-ID: D46A24724012.AF9E1 X-yoursite-MailScanner: Found to be clean X-yoursite-MailScanner-From: douly.fnst@cn.fujitsu.com Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There are three positions for initializing the interrupt delivery modes: 1) In IRQ initial function, may setup the through-local-APIC virtual wire mode. 2) In an SMP-capable system, will try to switch to symmetric I/O model when preparing the cpus in native_smp_prepare_cpus(). 3) In UP system with UP_LATE_INIT=y, will set up local APIC and I/O APIC in smp_init(). Switching to symmetric I/O mode is so late, which causes kernel in an unmatched mode at the beginning of booting time. And it causes the dump-capture kernel hangs with 'notsc' option inherited from 1st kernel option. Provide a new function to unify that three positions. Preparatory patch to initialize an interrupt mode directly. Signed-off-by: Dou Liyang --- arch/x86/include/asm/apic.h | 2 ++ arch/x86/kernel/apic/apic.c | 16 ++++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index 5f01671..1a970f5 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -128,6 +128,7 @@ extern void disable_local_APIC(void); extern void lapic_shutdown(void); extern void sync_Arb_IDs(void); extern void init_bsp_APIC(void); +extern void apic_intr_mode_init(void); extern void setup_local_APIC(void); extern void init_apic_mappings(void); void register_lapic_address(unsigned long address); @@ -170,6 +171,7 @@ static inline void disable_local_APIC(void) { } # define setup_boot_APIC_clock x86_init_noop # define setup_secondary_APIC_clock x86_init_noop static inline void lapic_update_tsc_freq(void) { } +static inline void apic_intr_mode_init(void) { } #endif /* !CONFIG_X86_LOCAL_APIC */ #ifdef CONFIG_X86_X2APIC diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index 01bde03..809625d 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1343,6 +1343,22 @@ void __init init_bsp_APIC(void) apic_write(APIC_LVT1, value); } +/* Init the interrupt delivery mode for the BSP */ +void __init apic_intr_mode_init(void) +{ + switch (apic_intr_mode_select()) { + case APIC_PIC: + pr_info("APIC: Keep in PIC mode(8259)\n"); + return; + case APIC_VIRTUAL_WIRE: + pr_info("APIC: Switch to virtual wire mode setup\n"); + return; + case APIC_SYMMETRIC_IO: + pr_info("APIC: Switch to symmectic I/O mode setup\n"); + return; + } +} + static void lapic_setup_esr(void) { unsigned int oldvalue, value, maxlvt; -- 2.5.5