From mboxrd@z Thu Jan 1 00:00:00 1970 From: tien.fong.chee at intel.com Date: Tue, 29 Aug 2017 18:45:55 +0800 Subject: [U-Boot] [PATCH 13/19] dts: Add the FPGA design file name to DTS In-Reply-To: <1504003561-6290-1-git-send-email-tien.fong.chee@intel.com> References: <1504003561-6290-1-git-send-email-tien.fong.chee@intel.com> Message-ID: <1504003561-6290-14-git-send-email-tien.fong.chee@intel.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Tien Fong Chee During FPGA program, FPGA raw binary data file would be searched from flash based on the file name defined in DTS, and then feeding the FPGA file found from flash into FPGA manager for configuring FPGA. Signed-off-by: Tien Fong Chee --- .../dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi b/arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi index d10e089..b6b2f75 100644 --- a/arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi +++ b/arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi @@ -20,8 +20,8 @@ chosen { /* Bootloader setting: uboot.rbf_filename */ - cff-file = "ghrd_10as066n2.periph.rbf"; - early-release-fpga-config; + cff-file = "ghrd_10as066n2.periph.rbf.mkimage"; + cffcore-file = "ghrd_10as066n2.core.rbf.mkimage"; }; soc { -- 1.7.7.4