From mboxrd@z Thu Jan  1 00:00:00 1970
From: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Date: Tue, 5 Sep 2017 11:08:42 +0000
Subject: [U-Boot] FSL PCIe LTSSM >= PCI_LTSSM_L0 equals link up
In-Reply-To: <VI1PR04MB207896B726E2A0C4D41295819A9E0@VI1PR04MB2078.eurprd04.prod.outlook.com>
References: <1503938907.4350.28.camel@infinera.com>
 <VI1PR04MB2078693229053F59A24226F09A9E0@VI1PR04MB2078.eurprd04.prod.outlook.com>
 <1503940141.4350.36.camel@infinera.com>
 <VI1PR04MB207896B726E2A0C4D41295819A9E0@VI1PR04MB2078.eurprd04.prod.outlook.com>
Message-ID: <1504609721.27247.29.camel@infinera.com>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

On Mon, 2017-08-28 at 17:14 +0000, York Sun wrote:
> +Xiaowei
> 
> On 08/28/2017 10:09 AM, Joakim Tjernlund wrote:
> > On Mon, 2017-08-28 at 16:55 +0000, York Sun wrote:
> > > On 08/28/2017 09:48 AM, Joakim Tjernlund wrote:
> > > > FSL PCIe controller drivers before REV 3 has this test for link up:
> > > >     enabled = ltssm >= PCI_LTSSM_L0;
> > > > 
> > > > We have a PCIe dev. that stays in LTSSM=0x51 (Polling Compliance) when non ready
> > > > for PCI transaktions. When FSL PCIe controller tries to access this device, it
> > > > hangs forever.
> > > > 
> > > > Is LTSSM=0x51 really a "legal" state for link up?
> > > > If not, what is a suitable range(maybe LO <= ltssm <= L0s(0x27)) ?
> > > > 
> > > >    Jocke
> > > > 
> > > > BTW, the same test is valid in Linux too.
> > > > 
> > > 
> > > Jocke,
> > > 
> > > I am not an expert on PCIe. Please if this thread is helpful,
> > 
> > Me neither .. :)
> > >   
> > > https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatchwork.ozlabs.org%2Fpatch%2F801519%2F&data=01%7C01%7Cyork.sun%40nxp.com%7Cf46ff5111ba04e631a9b08d4ee377ecc%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0&sdata=n9%2B2NIjEvsMBCljRLHS6NVVN4ANa3nBGpwUjI4Od%2Bhs%3D&reserved=0.
> > 
> > It mentions polling compliance but this driver already tests for:
> > if (ltssm < LTSSM_PCIE_L0)
> > 		return 0;
> > 	return 1;
> > 
> > It just adds some delay if the device is in Polling Compliance to see if that
> > changes to L0.
> > Since both layerscape and fsl >= rev 3 already require ltssm to be == L0, I suspect
> > the ltssm >= L0 is bogus.
> > 
> 
> Xiaowei, can you comment?
> 
> York

Ping?
Should I just send a patch ?

 Jocke