From mboxrd@z Thu Jan  1 00:00:00 1970
From: Chee, Tien Fong <tien.fong.chee@intel.com>
Date: Wed, 6 Sep 2017 07:15:33 +0000
Subject: [U-Boot] [PATCH 03/19] arm: socfpga: Add driver for flash to
	program FPGA
In-Reply-To: <a045c7f5-5bd2-74a1-b469-5a7760b2deca@denx.de>
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 <be365cf8-5ee0-635d-8489-5cb9180cf2dc@denx.de>
 <1504508888.7727.73.camel@intel.com>
 <dee29920-30dd-d7e1-7b16-e3b99ede149d@denx.de>
 <1504590823.7727.103.camel@intel.com>
 <716ab6ac-d91f-a3c0-e4d3-393966e06064@denx.de>
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On Rab, 2017-09-06 at 09:10 +0200, Marek Vasut wrote:
> On 09/06/2017 07:06 AM, Chee, Tien Fong wrote:
> [...]
> > 
> > > 
> > > > 
> > > > > 
> > > > > > 
> > > > > > The BSP tool is used to describe internal FPGA in SOCFPGA.
> > > > > > Other
> > > > > > external FPGAs other than SOCFPGA itself, it can be
> > > > > > programmed
> > > > > > through
> > > > > > U-boot.
> > > > > The BSP tool is broken if it generates broken DT, do I have
> > > > > to
> > > > > repeat
> > > > > myself ?
> > > > > 
> > > > BSP tool is only generate the RBF filename for FPGA inside
> > > > SOCFPGA.
> > > > Multiple external FPGA are configured through U-boot.
> > > What happens if you have FPGA connector over SPI ?
> > > 
> > I assume you are saying FPGA connected to EPCQ
> No, I mean FPGA connected over SPI bus.
> 
> > 
> > , and this is one of the
> > external FPGA configuration, like PCIE. For any external FPGA
> > configuration, FPGA itself/external HOST would get the FPGA data
> > from
> > storage such as EPCQ and configuring the FPGA without
> > HPS/Bootloader
> > intervine. SPL/U-boot would skip the FPGA configuration process
> > when
> > they see the mode is set to external FPGA configuration.
> > 
> > I know you want a DT to describe all FPGAs with FPGA node and their
> > own
> > data filename in every node. But, at this moment, all external
> > FPGAs
> > chip other than SOCFPGA itself are configured through U-boot(script 
> > &
> > env variable), or external FPGA configuration method.
> I want DT which describes hardware and is not misdesigned crap.
> Just because the BSP tool is broken does not mean I can allow
> upstream
> to accept that, no way.
> 
> > 
> > How about i just create a FPGA node for SOCFPGA, with FPGA data
> > filename within the node?
> Isn't that what the FPGA manager in mainline Linux does already ?
> 
Yeah, i will port from Linux DTS, and filenames added into the node.