From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751550AbdIREUv (ORCPT ); Mon, 18 Sep 2017 00:20:51 -0400 Received: from smtpbgbr2.qq.com ([54.207.22.56]:60861 "EHLO smtpbgbr2.qq.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751396AbdIREUu (ORCPT ); Mon, 18 Sep 2017 00:20:50 -0400 X-QQ-mid: bizesmtp8t1505708439twq7ilj43 X-QQ-SSF: 01100000008000F0FNF0B00A0000000 X-QQ-FEAT: 6dXuswn9i1WiBE4hAOIjPd2Zhy7oFuJbl1PfgW2Cx0Fwup7IV/tA8og1iw+vH seQBRgAELqFkO1lsObxP9vOjty10eYMsLAm6PwmO58KJC2rafANXEyMmb4q0tWV+E1TMMs0 ZDKyi/TeUeyKINxUuCC90z501LB3dvrKv66RPjDK2UKaArHetFXJzWhA33a8zAr4hOXxTdL I7UcyqFQUxr4SdaTykY7IW16/1amK2r4U93sctpLCG1kn2dsndMUFMGP9GquB1EDXvLgsE6 SfMMDv9NcJJHANq/nnWAJ9kG+5SJuvqkR3acCW3rR50IEJMakJlEFmFKQ= X-QQ-GoodBg: 0 From: Huacai Chen To: Andrew Morton Cc: Fuxin Zhang , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Huacai Chen , stable@vger.kernel.org Subject: [PATCH V5 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN in non-coherent DMA mode Date: Mon, 18 Sep 2017 12:22:28 +0800 Message-Id: <1505708548-4750-1-git-send-email-chenhc@lemote.com> X-Mailer: git-send-email 2.7.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:lemote.com:qybgforeign:qybgforeign4 X-QQ-Bgrelay: 1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In non-coherent DMA mode, kernel uses cache flushing operations to maintain I/O coherency, so the dmapool objects should be aligned to ARCH_DMA_MINALIGN. Otherwise, it will cause data corruption, at least on MIPS: Step 1, dma_map_single Step 2, cache_invalidate (no writeback) Step 3, dma_from_device Step 4, dma_unmap_single If a DMA buffer and a kernel structure share a same cache line, and if the kernel structure has dirty data, cache_invalidate (no writeback) will cause data lost. Cc: stable@vger.kernel.org Signed-off-by: Huacai Chen --- mm/dmapool.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/mm/dmapool.c b/mm/dmapool.c index 4d90a64..6263905 100644 --- a/mm/dmapool.c +++ b/mm/dmapool.c @@ -140,6 +140,9 @@ struct dma_pool *dma_pool_create(const char *name, struct device *dev, else if (align & (align - 1)) return NULL; + if (!device_is_coherent(dev)) + align = max_t(size_t, align, dma_get_cache_alignment()); + if (size == 0) return NULL; else if (size < 4) -- 2.7.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Huacai Chen To: Andrew Morton Cc: Fuxin Zhang , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Huacai Chen , stable@vger.kernel.org Subject: [PATCH V5 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN in non-coherent DMA mode Date: Mon, 18 Sep 2017 12:22:28 +0800 Message-Id: <1505708548-4750-1-git-send-email-chenhc@lemote.com> Sender: owner-linux-mm@kvack.org List-ID: In non-coherent DMA mode, kernel uses cache flushing operations to maintain I/O coherency, so the dmapool objects should be aligned to ARCH_DMA_MINALIGN. Otherwise, it will cause data corruption, at least on MIPS: Step 1, dma_map_single Step 2, cache_invalidate (no writeback) Step 3, dma_from_device Step 4, dma_unmap_single If a DMA buffer and a kernel structure share a same cache line, and if the kernel structure has dirty data, cache_invalidate (no writeback) will cause data lost. Cc: stable@vger.kernel.org Signed-off-by: Huacai Chen --- mm/dmapool.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/mm/dmapool.c b/mm/dmapool.c index 4d90a64..6263905 100644 --- a/mm/dmapool.c +++ b/mm/dmapool.c @@ -140,6 +140,9 @@ struct dma_pool *dma_pool_create(const char *name, struct device *dev, else if (align & (align - 1)) return NULL; + if (!device_is_coherent(dev)) + align = max_t(size_t, align, dma_get_cache_alignment()); + if (size == 0) return NULL; else if (size < 4) -- 2.7.0 -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org