From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752683AbdI3Bp7 (ORCPT ); Fri, 29 Sep 2017 21:45:59 -0400 Received: from regular1.263xmail.com ([211.150.99.132]:35796 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752589AbdI3Bp6 (ORCPT ); Fri, 29 Sep 2017 21:45:58 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: algea.cao@rock-chips.com X-FST-TO: daniel.vetter@intel.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: algea.cao@rock-chips.com X-UNIQUE-TAG: <254688782e9130fe93c4ae6e7d51479c> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Algea Cao To: daniel.vetter@intel.com, jani.nikula@linux.intel.com, seanpaul@chromium.org, airlied@linux.ie, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: kever.yang@rock-chips.com, mark.yao@rock-chips.com, yang.zheng@rock-chips.com, Algea Cao Subject: [PATCH v2 6/7] drm/rockchip: dw_hdmi: update dw-hdmi encoder enable Date: Sat, 30 Sep 2017 09:45:51 +0800 Message-Id: <1506735951-153728-1-git-send-email-algea.cao@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1506735713-147081-0> References: <1506735713-147081-0> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Writing grf register according to device type. Signed-off-by: Algea Cao --- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index e1a9941..b9087af 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -349,9 +349,26 @@ static void dw_hdmi_rockchip_encoder_mode_set(struct drm_encoder *encoder, static void dw_hdmi_rockchip_encoder_enable(struct drm_encoder *encoder) { struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder); - u32 val; + struct drm_crtc *crtc = encoder->crtc; + u32 val, lcdsel_grf_reg, lcdsel_mask; int ret; + if (WARN_ON(!crtc || !crtc->state)) + return; + + switch (hdmi->dev_type) { + case RK3288_HDMI: + lcdsel_grf_reg = RK3288_GRF_SOC_CON6; + lcdsel_mask = RK3288_HDMI_LCDC_SEL; + break; + case RK3399_HDMI: + lcdsel_grf_reg = RK3399_GRF_SOC_CON20; + lcdsel_mask = RK3399_HDMI_LCDC_SEL; + break; + default: + return; + } + ret = drm_of_encoder_active_endpoint_id(hdmi->dev->of_node, encoder); if (ret) val = hdmi->chip_data->lcdsel_lit; -- 2.7.4