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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 03/20] hw/arm/xlnx-zynqmp: Mark the "xlnx, zynqmp" device with user_creatable = false
Date: Fri,  6 Oct 2017 16:59:28 +0100	[thread overview]
Message-ID: <1507305585-20608-4-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1507305585-20608-1-git-send-email-peter.maydell@linaro.org>

From: Thomas Huth <thuth@redhat.com>

The device uses serial_hds in its realize function and thus can't be
used twice. Apart from that, the comma in its name makes it quite hard
to use for the user anyway, since a comma is normally used to separate
the device name from its properties when using the "-device" parameter
or the "device_add" HMP command.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Message-id: 1506441116-16627-1-git-send-email-thuth@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/xlnx-zynqmp.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 2b27daf..d4b6560 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -440,6 +440,8 @@ static void xlnx_zynqmp_class_init(ObjectClass *oc, void *data)
 
     dc->props = xlnx_zynqmp_props;
     dc->realize = xlnx_zynqmp_realize;
+    /* Reason: Uses serial_hds in realize function, thus can't be used twice */
+    dc->user_creatable = false;
 }
 
 static const TypeInfo xlnx_zynqmp_type_info = {
-- 
2.7.4

  parent reply	other threads:[~2017-10-06 15:59 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-06 15:59 [Qemu-devel] [PULL 00/20] target-arm queue Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 02/20] hw/sd: fix out-of-bounds check for multi block reads Peter Maydell
2017-10-06 15:59 ` Peter Maydell [this message]
2017-10-06 15:59 ` [Qemu-devel] [PULL 04/20] nvic: Clear the vector arrays and prigroup on reset Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 05/20] target/arm: Don't switch to target stack early in v7M exception return Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 06/20] target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 07/20] target/arm: Restore security state on exception return Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 08/20] target/arm: Restore SPSEL to correct CONTROL register " Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 09/20] target/arm: Check for xPSR mismatch usage faults earlier for v8M Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 10/20] target/arm: Warn about restoring to unaligned stack Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 11/20] target/arm: Don't warn about exception return with PC low bit set for v8M Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 12/20] target/arm: Add new-in-v8M SFSR and SFAR Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 13/20] target/arm: Update excret sanity checks for v8M Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 14/20] target/arm: Add support for restoring v8M additional state context Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 15/20] target/arm: Add v8M support to exception entry code Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 16/20] nvic: Implement Security Attribution Unit registers Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 17/20] target/arm: Implement security attribute lookups for memory accesses Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 18/20] target/arm: Fix calculation of secure mm_idx values Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 19/20] target/arm: Factor out "get mmuidx for specified security state" Peter Maydell
2017-10-06 15:59 ` [Qemu-devel] [PULL 20/20] nvic: Add missing code for writing SHCSR.HARDFAULTPENDED bit Peter Maydell
2017-10-06 16:44 ` [Qemu-devel] [PULL 00/20] target-arm queue Peter Maydell

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