From: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
To: xen-devel@lists.xen.org
Cc: "Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
Julien Grall <julien.grall@arm.com>,
Stefano Stabellini <sstabellini@kernel.org>,
Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Subject: [PATCH v8 01/11] arm: traps: use only least 32 bits of fid in PSCI handler
Date: Tue, 10 Oct 2017 18:52:41 +0300 [thread overview]
Message-ID: <1507650771-16631-2-git-send-email-volodymyr_babchuk@epam.com> (raw)
In-Reply-To: <1507650771-16631-1-git-send-email-volodymyr_babchuk@epam.com>
According to SMCCC (ARM DEN 0028B, page 12), function id is
stored in least 32 bits of r0/x0 register:
The least significant 32-bits are used, and the most significant
32-bits are zero.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Acked-by: Julien Grall <julien.grall@arm.com>
---
* Removed part of the quote from ARM DEN 0028B due to typo.
* This patch needs to be backported
---
xen/arch/arm/traps.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 701fdc8..0cff83e 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -1463,14 +1463,14 @@ static void do_debug_trap(struct cpu_user_regs *regs, unsigned int code)
#endif
/* helper function for checking arm mode 32/64 bit */
-static inline int psci_mode_check(struct domain *d, register_t fid)
+static inline int psci_mode_check(struct domain *d, uint32_t fid)
{
return !( is_64bit_domain(d)^( (fid & PSCI_0_2_64BIT) >> 30 ) );
}
static void do_trap_psci(struct cpu_user_regs *regs)
{
- register_t fid = PSCI_ARG(regs,0);
+ uint32_t fid = PSCI_ARG32(regs,0);
/* preloading in case psci_mode_check fails */
PSCI_RESULT_REG(regs) = PSCI_INVALID_PARAMETERS;
--
2.7.4
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next prev parent reply other threads:[~2017-10-10 15:52 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-10 15:52 [PATCH v8 00/11] Handle SMCs and HVCs in conformance with SMCCC Volodymyr Babchuk
2017-10-10 15:52 ` Volodymyr Babchuk [this message]
2017-10-10 15:52 ` [PATCH v8 02/11] arm: traps: use generic register accessors in the PSCI code Volodymyr Babchuk
2017-10-10 15:52 ` [PATCH v8 03/11] arm: traps: check if SMC was conditional before handling it Volodymyr Babchuk
2017-10-10 15:52 ` [PATCH v8 04/11] public: xen.h: add definitions for UUID handling Volodymyr Babchuk
2017-10-10 16:12 ` Jan Beulich
2017-10-10 17:03 ` Volodymyr Babchuk
2017-10-11 8:07 ` Jan Beulich
2017-10-11 12:12 ` Volodymyr Babchuk
2017-10-11 12:23 ` Jan Beulich
2017-10-10 19:05 ` [PATCH v9 " Volodymyr Babchuk
2017-10-10 23:24 ` Stefano Stabellini
2017-10-11 8:54 ` Jan Beulich
2017-10-11 9:29 ` Julien Grall
2017-10-11 9:37 ` Jan Beulich
2017-10-11 11:57 ` [PATCH v10 " Volodymyr Babchuk
2017-10-11 12:31 ` Jan Beulich
2017-10-11 15:37 ` Konrad Rzeszutek Wilk
2017-10-10 15:52 ` [PATCH v8 05/11] arm: processor.h: add definition for immediate value mask Volodymyr Babchuk
2017-10-10 15:52 ` [PATCH v8 06/11] arm: add SMCCC protocol definitions Volodymyr Babchuk
2017-10-10 15:52 ` [PATCH v8 07/11] arm: smccc: handle SMCs according to SMCCC Volodymyr Babchuk
2017-10-11 20:38 ` Stefano Stabellini
2017-10-10 15:52 ` [PATCH v8 08/11] arm: traps: handle PSCI calls inside `vsmc.c` Volodymyr Babchuk
2017-10-10 15:52 ` [PATCH v8 09/11] arm: PSCI: use definitions provided by asm/smccc.h Volodymyr Babchuk
2017-10-10 15:52 ` [PATCH v8 10/11] arm: vsmc: remove 64 bit mode check in PSCI handler Volodymyr Babchuk
2017-10-10 15:52 ` [PATCH v8 11/11] public: add and enable XENFEAT_ARM_SMCCC_supported feature Volodymyr Babchuk
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