From mboxrd@z Thu Jan  1 00:00:00 1970
From: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Date: Tue, 17 Oct 2017 13:32:43 +0000
Subject: [U-Boot] [PATCH v2] DW SPI: Get clock value from Device Tree
In-Reply-To: <CAD6G_RQJxBdgyZsSEdfTQL0bZ6qyaKHHrLasxOTDrFhdoaCDMQ@mail.gmail.com>
References: <20171013151817.4588-1-Eugeniy.Paltsev@synopsys.com>
 <CAD6G_RQJxBdgyZsSEdfTQL0bZ6qyaKHHrLasxOTDrFhdoaCDMQ@mail.gmail.com>
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To: u-boot@lists.denx.de

Hi Jagan,

On Mon, 2017-10-16 at 22:37 +0530, Jagan Teki wrote:
> On Fri, Oct 13, 2017 at 8:48 PM, Eugeniy Paltsev
> <Eugeniy.Paltsev@synopsys.com> wrote:
> > Add option to set spi controller clock frequency via device tree
> > using standard clock bindings.
> > Old way of setting spi controller clock frequency (via implementation
> > of 'cm_get_spi_controller_clk_hz' function in platform specific code)
> > remains supported for backward compatibility.
> > 
> > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
> > ---
> > Changes v1->v2:
> >   * disable clock if we can't get the rate.
> >   * get rid of cm_get_spi_controller_clk_hz weak declaration.
> > 
> >  drivers/spi/designware_spi.c | 65 +++++++++++++++++++++++++++++++++++++++++++-
> >  1 file changed, 64 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
> > index 5aa507b..9eb5b1c 100644
> > --- a/drivers/spi/designware_spi.c
> > +++ b/drivers/spi/designware_spi.c
> > @@ -11,6 +11,7 @@
> >   */
> > 
> >  #include <common.h>
> > +#include <clk.h>
> >  #include <dm.h>
> >  #include <errno.h>
> >  #include <malloc.h>
> > @@ -18,7 +19,10 @@
> >  #include <fdtdec.h>
> >  #include <linux/compat.h>
> >  #include <asm/io.h>
> > +/* Only SOCFPGA_GEN5 and SOCFPGA_ARRIA10 uses their clock_manager functions */
> > +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) || defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> >  #include <asm/arch/clock_manager.h>
> > +#endif
> 
> How hard it is to make others to use clock manager? do you have any list?

clock_manager.h is an old (and non-generic) way to deal with different clocks.
For example in SOCFPGA_GEN5 and SOCFPGA_ARRIA10 clock_manager.h provides
cm_get_spi_controller_clk_hz function to deal with spi controller clock.

But today we have another, linux-like alternative: to bind clocks via device tree
and manipulate with clocks via generic functions provided by clk.h

In this patch I added option to get clock via device tree using standard bindings
and restrict clock_manager.h functions usage only to targets which still use it,
so new targets can simply bind clock via device tree and they do not need to
implement/define something in clock_manager.h

So we don't need to make others to use clock manager :)


> thanks!
-- 
 Eugeniy Paltsev