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From: Luwei Kang <luwei.kang@intel.com>
To: xen-devel@lists.xen.org
Cc: kevin.tian@intel.com, sstabellini@kernel.org,
	wei.liu2@citrix.com, jun.nakajima@intel.com,
	konrad.wilk@oracle.com, George.Dunlap@eu.citrix.com,
	andrew.cooper3@citrix.com, ian.jackson@eu.citrix.com,
	tim@xen.org, jbeulich@suse.com, Luwei Kang <luwei.kang@intel.com>
Subject: [PATCH 6/6] x86: Pass through intel processor trace MSRs
Date: Sun, 22 Oct 2017 04:02:27 +0800	[thread overview]
Message-ID: <1508616147-17310-7-git-send-email-luwei.kang@intel.com> (raw)
In-Reply-To: <1508616147-17310-1-git-send-email-luwei.kang@intel.com>

This patch pass through Intel processor trace MSRs
to guest.

Signed-off-by: Luwei Kang <luwei.kang@intel.com>
---
 xen/arch/x86/cpu/intel_pt.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/xen/arch/x86/cpu/intel_pt.c b/xen/arch/x86/cpu/intel_pt.c
index 411b922..8e83b87 100644
--- a/xen/arch/x86/cpu/intel_pt.c
+++ b/xen/arch/x86/cpu/intel_pt.c
@@ -82,6 +82,7 @@ void pt_vcpu_init(struct vcpu *v)
 {
     struct pt_desc *pt = &v->arch.hvm_vmx.pt_desc;
     unsigned int eax, ebx, ecx, edx;
+    int i;
 
     memset(pt, 0, sizeof(struct pt_desc));
     pt->intel_pt_enabled = false;
@@ -102,5 +103,12 @@ void pt_vcpu_init(struct vcpu *v)
 
     vmx_vmcs_enter(v);
     __vmwrite(GUEST_IA32_RTIT_CTL, 0);
+    vmx_clear_msr_intercept(v, MSR_IA32_RTIT_CTL, VMX_MSR_RW);
+    vmx_clear_msr_intercept(v, MSR_IA32_RTIT_STATUS, VMX_MSR_RW);
+    vmx_clear_msr_intercept(v, MSR_IA32_RTIT_OUTPUT_BASE, VMX_MSR_RW);
+    vmx_clear_msr_intercept(v, MSR_IA32_RTIT_OUTPUT_MASK_PTRS, VMX_MSR_RW);
+    vmx_clear_msr_intercept(v, MSR_IA32_RTIT_CR3_MATCH, VMX_MSR_RW);
+    for ( i = 0; i < pt->addr_num; i++ )
+        vmx_clear_msr_intercept(v, MSR_IA32_RTIT_ADDR0_A + i, VMX_MSR_RW);
     vmx_vmcs_exit(v);
 }
-- 
1.8.3.1


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  parent reply	other threads:[~2017-10-21 20:02 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-21 20:02 [PATCH 0/6] Intel Processor Trace virtulization enabling Luwei Kang
2017-10-21 20:02 ` [PATCH 1/6] x86: add a flag to enable Intel processor trace Luwei Kang
2017-10-21 20:02 ` [PATCH 2/6] x86: configure vmcs for Intel processor trace virtualization Luwei Kang
2017-10-21 20:02 ` [PATCH 3/6] x86: add intel proecessor trace support for cpuid Luwei Kang
2017-10-21 20:02 ` [PATCH 4/6] x86: add intel processor trace context Luwei Kang
2017-10-21 20:02 ` [PATCH 5/6] x86: implement intel processor trace context switch Luwei Kang
2017-10-21 20:02 ` Luwei Kang [this message]
2017-10-24 19:13 ` [PATCH 0/6] Intel Processor Trace virtulization enabling Andrew Cooper
2017-10-26  4:13   ` Kang, Luwei
2017-10-26 13:28     ` Andrew Cooper
2017-10-27  5:04       ` Kang, Luwei

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