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From: tien.fong.chee at intel.com <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v4 02/20] dts: Add FPGA bitstream properties to Arria 10 DTS
Date: Tue, 31 Oct 2017 18:42:06 +0800	[thread overview]
Message-ID: <1509446541-3037-3-git-send-email-tien.fong.chee@intel.com> (raw)
In-Reply-To: <1509446541-3037-1-git-send-email-tien.fong.chee@intel.com>

From: Tien Fong Chee <tien.fong.chee@intel.com>

These FPGA bitstream properties would help bootloader to understand
how to configure FPGA and where to look the FPGA RBF files during
booting.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
---
 arch/arm/dts/socfpga_arria10.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi
index 377700d..aeb2be8 100644
--- a/arch/arm/dts/socfpga_arria10.dtsi
+++ b/arch/arm/dts/socfpga_arria10.dtsi
@@ -538,6 +538,11 @@
 			clocks = <&l4_mp_clk>;
 			resets = <&rst FPGAMGR_RESET>;
 			reset-names = "fpgamgr";
+			altr,bitstream_periph =
+			 "ghrd_10as066n2.periph.rbf.mkimage";
+			altr,bitstream_core =
+			 "ghrd_10as066n2.core.rbf.mkimage";
+			altr,bitstream_devpart = "0:1";
 		};
 
 		i2c0: i2c at ffc02200 {
-- 
2.2.0

  parent reply	other threads:[~2017-10-31 10:42 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-31 10:42 [U-Boot] [PATCH v4 00/20] Add FPGA, SDRAM, SPL loadfs U-boot & booting to console tien.fong.chee at intel.com
2017-10-31 10:42 ` [U-Boot] [PATCH v4 01/20] ARM: socfpga: Description on FPGA RBF properties at Arria 10 FPGA manager tien.fong.chee at intel.com
2017-10-31 10:42 ` tien.fong.chee at intel.com [this message]
2017-10-31 10:42 ` [U-Boot] [PATCH v4 04/20] dts: Enable fpga-mgr node build for Arria 10 SPL tien.fong.chee at intel.com
2017-10-31 10:42 ` [U-Boot] [PATCH v4 05/20] fs: Enable generic filesystems interface support in SPL tien.fong.chee at intel.com
2017-10-31 10:42 ` [U-Boot] [PATCH v4 07/20] arm: socfpga: Fix with the correct polling on bit is set tien.fong.chee at intel.com
2017-10-31 10:42 ` [U-Boot] [PATCH v4 09/20] arm: socfpga: Rename the gen5 sdram driver to more specific name tien.fong.chee at intel.com
2017-10-31 10:42 ` [U-Boot] [PATCH v4 10/20] arm: socfpga: Add DRAM bank size initialization function tien.fong.chee at intel.com
2017-10-31 10:42 ` [U-Boot] [PATCH v4 11/20] arm: socfpga: Add DDR driver for Arria 10 tien.fong.chee at intel.com
2017-10-31 10:42 ` [U-Boot] [PATCH v4 12/20] configs: Add DDR Kconfig support " tien.fong.chee at intel.com
2017-10-31 10:42 ` [U-Boot] [PATCH v4 13/20] arm: socfpga: Enable SPL memory allocation tien.fong.chee at intel.com
2017-10-31 10:42 ` [U-Boot] [PATCH v4 14/20] arm: socfpga: Improve comments for Intel SoCFPGA program header tien.fong.chee at intel.com
2017-10-31 10:42 ` [U-Boot] [PATCH v4 15/20] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10 tien.fong.chee at intel.com
2017-10-31 10:42 ` [U-Boot] [PATCH v4 16/20] arm: socfpga: Adding clock frequency info for U-Boot tien.fong.chee at intel.com
2017-10-31 10:42 ` [U-Boot] [PATCH v4 17/20] arm: socfpga: Adding SoCFPGA info for both SPL and U-Boot tien.fong.chee at intel.com
2017-10-31 10:42 ` [U-Boot] [PATCH v4 18/20] arm: socfpga: Remove static declaration on spl_mmc_find_device function tien.fong.chee at intel.com
2017-10-31 10:42 ` [U-Boot] [PATCH v4 19/20] arm: socfpga: Enable DDR working tien.fong.chee at intel.com
2017-10-31 10:42 ` [U-Boot] [PATCH v4 20/20] arm: socfpga: Enable SPL booting U-boot tien.fong.chee at intel.com

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