From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753739AbdLDJRq (ORCPT ); Mon, 4 Dec 2017 04:17:46 -0500 Received: from mail-wr0-f195.google.com ([209.85.128.195]:34890 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753502AbdLDJRm (ORCPT ); Mon, 4 Dec 2017 04:17:42 -0500 X-Google-Smtp-Source: AGs4zMaxoe85RC89NdBSIuTuspyVNHUnRprCU8553MmNYYBlay6UyjseGwBCNKuoHj0uX03/Y8+3vg== Message-ID: <1512379059.2574.17.camel@baylibre.com> Subject: Re: [PATCH 3/3] ARM64: dts: meson-axg: add PWM DT info for Meson-Axg SoC From: Jerome Brunet To: Yixun Lan , Thierry Reding , Kevin Hilman , linux-pwm@vger.kernel.org, linux-amlogic@lists.infradead.org Cc: Rob Herring , devicetree@vger.kernel.org, Neil Armstrong , Mark Rutland , Carlo Caione , Jian Hu , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Date: Mon, 04 Dec 2017 10:17:39 +0100 In-Reply-To: <20171204060018.8856-4-yixun.lan@amlogic.com> References: <20171204060018.8856-1-yixun.lan@amlogic.com> <20171204060018.8856-4-yixun.lan@amlogic.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.26.2 (3.26.2-1.fc27) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 2017-12-04 at 14:00 +0800, Yixun Lan wrote: > From: Jian Hu > > Add PWM DT info for the Amlogic's Meson-Axg SoC. > > Signed-off-by: Jian Hu > Signed-off-by: Yixun Lan > --- > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 120 > +++++++++++++++++++++++++++++ > 1 file changed, 120 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > index 92f65eec3e18..f7f228701df1 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > @@ -177,6 +177,24 @@ > [...] > > @@ -435,6 +537,24 @@ > clock-names = "clk_i2c"; > }; > > + pwm_AO_ab: pwm@7000 { > + compatible = "amlogic,meson-axg-ao-pwm"; > + reg = <0x0 0x07000 0x0 0x20>; > + #pwm-cells = <3>; > + clocks = <&xtal>, <&xtal>; > + clock-names = "clkin0", "clkin1"; like gxbb, "amlogic,meson-axg-ao-pwm" does not have such clock bindings, Later on, if we want to "correctly" get the clock from DT, it will have to gothrough a new compatible, I guess. > + status = "disabled"; > + }; > + > + pwm_AO_cd: pwm@2000 { > + compatible = "amlogic,axg-ao-pwm"; > + reg = <0x0 0x02000 0x0 0x20>; > + #pwm-cells = <3>; > + clocks = <&xtal>, <&xtal>; > + clock-names = "clkin0", "clkin1"; > + status = "disabled"; > + }; > + > uart_AO: serial@3000 { > compatible = "amlogic,meson-gx-uart", > "amlogic,meson-ao-uart"; > reg = <0x0 0x3000 0x0 0x18>; From mboxrd@z Thu Jan 1 00:00:00 1970 From: jbrunet@baylibre.com (Jerome Brunet) Date: Mon, 04 Dec 2017 10:17:39 +0100 Subject: [PATCH 3/3] ARM64: dts: meson-axg: add PWM DT info for Meson-Axg SoC In-Reply-To: <20171204060018.8856-4-yixun.lan@amlogic.com> References: <20171204060018.8856-1-yixun.lan@amlogic.com> <20171204060018.8856-4-yixun.lan@amlogic.com> Message-ID: <1512379059.2574.17.camel@baylibre.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Mon, 2017-12-04 at 14:00 +0800, Yixun Lan wrote: > From: Jian Hu > > Add PWM DT info for the Amlogic's Meson-Axg SoC. > > Signed-off-by: Jian Hu > Signed-off-by: Yixun Lan > --- > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 120 > +++++++++++++++++++++++++++++ > 1 file changed, 120 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > index 92f65eec3e18..f7f228701df1 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > @@ -177,6 +177,24 @@ > [...] > > @@ -435,6 +537,24 @@ > clock-names = "clk_i2c"; > }; > > + pwm_AO_ab: pwm at 7000 { > + compatible = "amlogic,meson-axg-ao-pwm"; > + reg = <0x0 0x07000 0x0 0x20>; > + #pwm-cells = <3>; > + clocks = <&xtal>, <&xtal>; > + clock-names = "clkin0", "clkin1"; like gxbb, "amlogic,meson-axg-ao-pwm" does not have such clock bindings, Later on, if we want to "correctly" get the clock from DT, it will have to gothrough a new compatible, I guess. > + status = "disabled"; > + }; > + > + pwm_AO_cd: pwm at 2000 { > + compatible = "amlogic,axg-ao-pwm"; > + reg = <0x0 0x02000 0x0 0x20>; > + #pwm-cells = <3>; > + clocks = <&xtal>, <&xtal>; > + clock-names = "clkin0", "clkin1"; > + status = "disabled"; > + }; > + > uart_AO: serial at 3000 { > compatible = "amlogic,meson-gx-uart", > "amlogic,meson-ao-uart"; > reg = <0x0 0x3000 0x0 0x18>; From mboxrd@z Thu Jan 1 00:00:00 1970 From: jbrunet@baylibre.com (Jerome Brunet) Date: Mon, 04 Dec 2017 10:17:39 +0100 Subject: [PATCH 3/3] ARM64: dts: meson-axg: add PWM DT info for Meson-Axg SoC In-Reply-To: <20171204060018.8856-4-yixun.lan@amlogic.com> References: <20171204060018.8856-1-yixun.lan@amlogic.com> <20171204060018.8856-4-yixun.lan@amlogic.com> Message-ID: <1512379059.2574.17.camel@baylibre.com> To: linus-amlogic@lists.infradead.org List-Id: linus-amlogic.lists.infradead.org On Mon, 2017-12-04 at 14:00 +0800, Yixun Lan wrote: > From: Jian Hu > > Add PWM DT info for the Amlogic's Meson-Axg SoC. > > Signed-off-by: Jian Hu > Signed-off-by: Yixun Lan > --- > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 120 > +++++++++++++++++++++++++++++ > 1 file changed, 120 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > index 92f65eec3e18..f7f228701df1 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > @@ -177,6 +177,24 @@ > [...] > > @@ -435,6 +537,24 @@ > clock-names = "clk_i2c"; > }; > > + pwm_AO_ab: pwm at 7000 { > + compatible = "amlogic,meson-axg-ao-pwm"; > + reg = <0x0 0x07000 0x0 0x20>; > + #pwm-cells = <3>; > + clocks = <&xtal>, <&xtal>; > + clock-names = "clkin0", "clkin1"; like gxbb, "amlogic,meson-axg-ao-pwm" does not have such clock bindings, Later on, if we want to "correctly" get the clock from DT, it will have to gothrough a new compatible, I guess. > + status = "disabled"; > + }; > + > + pwm_AO_cd: pwm at 2000 { > + compatible = "amlogic,axg-ao-pwm"; > + reg = <0x0 0x02000 0x0 0x20>; > + #pwm-cells = <3>; > + clocks = <&xtal>, <&xtal>; > + clock-names = "clkin0", "clkin1"; > + status = "disabled"; > + }; > + > uart_AO: serial at 3000 { > compatible = "amlogic,meson-gx-uart", > "amlogic,meson-ao-uart"; > reg = <0x0 0x3000 0x0 0x18>;