From mboxrd@z Thu Jan 1 00:00:00 1970 From: tien.fong.chee at intel.com Date: Mon, 11 Dec 2017 18:06:10 +0800 Subject: [U-Boot] [PATCH v6 04/20] dts: Enable fpga-mgr node build for Arria 10 SPL In-Reply-To: <1512986786-3745-1-git-send-email-tien.fong.chee@intel.com> References: <1512986786-3745-1-git-send-email-tien.fong.chee@intel.com> Message-ID: <1512986786-3745-5-git-send-email-tien.fong.chee@intel.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Tien Fong Chee fpga-mgr node is required in SPL, because SPL needs information from the node to configure FPGA in Arria 10. Signed-off-by: Tien Fong Chee --- arch/arm/dts/socfpga_arria10.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi index aeb2be8..1848710 100644 --- a/arch/arm/dts/socfpga_arria10.dtsi +++ b/arch/arm/dts/socfpga_arria10.dtsi @@ -532,6 +532,7 @@ }; fpga_mgr: fpga-mgr at ffd03000 { + u-boot,dm-pre-reloc; compatible = "altr,socfpga-a10-fpga-mgr"; reg = <0xffd03000 0x100 0xffcfe400 0x20>; -- 2.2.0