From: "Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com>
To: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>
Cc: "intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"stable@vger.kernel.org" <stable@vger.kernel.org>
Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915: Disable DC states around GMBUS on GLK
Date: Mon, 11 Dec 2017 18:41:05 +0000 [thread overview]
Message-ID: <1513018949.24929.4.camel@dk-H97M-D3H> (raw)
In-Reply-To: <20171208213739.16388-1-ville.syrjala@linux.intel.com>
On Fri, 2017-12-08 at 23:37 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Prevent the DMC from destroying GMBUS transfers on GLK. GMBUS
> lives in PG1 so DC off is all we need.
>
Just so that I understand this correctly. DMC is expected to take care
of managing power for GMBUS transfers without the driver explicitly
turning on/off the power well 1 but it isn't. Do you know if this is a
DMC regression?
> Cc: stable@vger.kernel.org
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_runtime_pm.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 96ab74f3d101..522e0a63090f 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -1792,6 +1792,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> BIT_ULL(POWER_DOMAIN_GT_IRQ) | \
> BIT_ULL(POWER_DOMAIN_MODESET) | \
> BIT_ULL(POWER_DOMAIN_AUX_A) | \
> + BIT_ULL(POWER_DOMAIN_GMBUS) | \
> BIT_ULL(POWER_DOMAIN_INIT))
>
> #define CNL_DISPLAY_POWERWELL_2_POWER_DOMAINS ( \
next prev parent reply other threads:[~2017-12-11 18:41 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-08 21:37 [PATCH 1/4] drm/i915: Disable DC states around GMBUS on GLK Ville Syrjala
2017-12-08 21:37 ` [PATCH 2/4] drm/i915: No need to power up PG2 for GMBUS on BXT Ville Syrjala
2017-12-08 21:37 ` [PATCH 3/4] drm/i915: Clean up the PNV bit banging vs. GMBUS clock gating w/a Ville Syrjala
2017-12-08 21:50 ` Chris Wilson
2017-12-08 21:37 ` [PATCH 4/4] drm/i915: Disable GMBUS clock gating around GMBUS transfers on gen9+ Ville Syrjala
2017-12-11 21:30 ` Pandiyan, Dhinakaran
2017-12-21 20:24 ` [PATCH v2 " Ville Syrjala
2017-12-29 16:35 ` Jani Nikula
2017-12-08 22:16 ` ✗ Fi.CI.BAT: warning for series starting with [1/4] drm/i915: Disable DC states around GMBUS on GLK Patchwork
2017-12-11 18:41 ` Pandiyan, Dhinakaran [this message]
2017-12-11 19:03 ` [Intel-gfx] [PATCH 1/4] " Ville Syrjälä
2017-12-11 19:03 ` Ville Syrjälä
2017-12-11 23:32 ` Runyan, Arthur J
2017-12-11 23:32 ` Runyan, Arthur J
2017-12-12 1:13 ` [Intel-gfx] " Pandiyan, Dhinakaran
2017-12-21 20:46 ` ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Disable DC states around GMBUS on GLK (rev2) Patchwork
2017-12-21 21:41 ` ✗ Fi.CI.IGT: warning " Patchwork
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