From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x225vfXdTOm+n1mPa8dXBX36+5edk0sqDtcetUjmAzwvwQZ4JRvSx7pR8BFmfPJWh7uWwzMEm ARC-Seal: i=1; a=rsa-sha256; t=1516476232; cv=none; d=google.com; s=arc-20160816; b=hPoccBqf9SvOVhGDMF52WYSfTgjZ2bB57uD6920hKhfuF9jvtRc9dTWZzGuRyFZeU9 w5Yf5vDeK2FlRBTFB+fPMZADqPf1Ss48WFfNHo3qo1PPPRtOqwWV9RF9MnWkauwvyoVV LazB7ifrFS5OTfDyE62jrDSY9haQMHx3r3Ic26wuiAXqvO34BR9J8eF2NKqUW9cCaqBK HYEUl7uRslg6z0nUKhxLBl1lq1SZjIOQ6mL3QfEN/Pq+yjeaKTcraw1d7PfG4npP/EXq zceCuT1owmCF5EzqPgP77MgUx8PH5U+ADo7MWRRv3vEdubpHUJS3azbm3D1H+UPUYHqh FvHw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=qtaQEmuwH/l84pB4/hi8R6FbSU8eDlMm5kQMvWxWElI=; b=sQdUcs1N5fdyqcGP5oCGSl5Y32PAfi0yoDK/w/l5fe42pioBpNa86bCx/+ewDre3wA uZkGGNTCsYb8DH9BrBHePGUxEFcL8g4xLAilUS+erm1T3HIgsFrqa/MQOGP2lyVWmneA hTYJPDq58OsAWyzsQQfEPlJ8PI0tatCp1T970zcIHy/+oysygQBe+6RqiiGkVYTfF6bi RqCdWZGOswxSbyVk3QW4JE4UYvDQpythMKQy79fDCs7nbI824BVUPJMKlIVw1YKm6gXg TP4JMsOOtow9xQPcWLjwV8E7BOvR4NbbeLSUaMF8jOvDkMggt3u769uUAERKcOYsENpd dPig== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amazon.de header.s=amazon201209 header.b=ZQ3sUoYf; spf=pass (google.com: domain of prvs=551b82ed1=karahmed@amazon.com designates 207.171.190.10 as permitted sender) smtp.mailfrom=prvs=551b82ed1=karahmed@amazon.com; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amazon.de Authentication-Results: mx.google.com; dkim=pass header.i=@amazon.de header.s=amazon201209 header.b=ZQ3sUoYf; spf=pass (google.com: domain of prvs=551b82ed1=karahmed@amazon.com designates 207.171.190.10 as permitted sender) smtp.mailfrom=prvs=551b82ed1=karahmed@amazon.com; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amazon.de X-IronPort-AV: E=Sophos;i="5.46,387,1511827200"; d="scan'208";a="716423194" From: KarimAllah Ahmed To: linux-kernel@vger.kernel.org Cc: KarimAllah Ahmed , Andi Kleen , Andrea Arcangeli , Andy Lutomirski , Arjan van de Ven , Ashok Raj , Asit Mallick , Borislav Petkov , Dan Williams , Dave Hansen , David Woodhouse , Greg Kroah-Hartman , "H . Peter Anvin" , Ingo Molnar , Janakarajan Natarajan , Joerg Roedel , Jun Nakajima , Laura Abbott , Linus Torvalds , Masami Hiramatsu , Paolo Bonzini , Peter Zijlstra , =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= , Thomas Gleixner , Tim Chen , Tom Lendacky , kvm@vger.kernel.org, x86@kernel.org, Arjan Van De Ven Subject: [RFC 09/10] x86/enter: Create macros to restrict/unrestrict Indirect Branch Speculation Date: Sat, 20 Jan 2018 20:23:00 +0100 Message-Id: <1516476182-5153-10-git-send-email-karahmed@amazon.de> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516476182-5153-1-git-send-email-karahmed@amazon.de> References: <1516476182-5153-1-git-send-email-karahmed@amazon.de> X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1590140582166248265?= X-GMAIL-MSGID: =?utf-8?q?1590140582166248265?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: From: Tim Chen Create macros to control Indirect Branch Speculation. Name them so they reflect what they are actually doing. The macros are used to restrict and unrestrict the indirect branch speculation. They do not *disable* (or *enable*) indirect branch speculation. A trip back to user-space after *restricting* speculation would still affect the BTB. Quoting from a commit by Tim Chen: """ If IBRS is set, near returns and near indirect jumps/calls will not allow their predicted target address to be controlled by code that executed in a less privileged prediction mode *BEFORE* the IBRS mode was last written with a value of 1 or on another logical processor so long as all Return Stack Buffer (RSB) entries from the previous less privileged prediction mode are overwritten. Thus a near indirect jump/call/return may be affected by code in a less privileged prediction mode that executed *AFTER* IBRS mode was last written with a value of 1. """ [ tglx: Changed macro names and rewrote changelog ] [ karahmed: changed macro names *again* and rewrote changelog ] Signed-off-by: Tim Chen Signed-off-by: Thomas Gleixner Signed-off-by: KarimAllah Ahmed Cc: Andrea Arcangeli Cc: Andi Kleen Cc: Peter Zijlstra Cc: Greg KH Cc: Dave Hansen Cc: Andy Lutomirski Cc: Paolo Bonzini Cc: Dan Williams Cc: Arjan Van De Ven Cc: Linus Torvalds Cc: David Woodhouse Cc: Ashok Raj Link: https://lkml.kernel.org/r/3aab341725ee6a9aafd3141387453b45d788d61a.1515542293.git.tim.c.chen@linux.intel.com Signed-off-by: David Woodhouse --- arch/x86/entry/calling.h | 73 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/arch/x86/entry/calling.h b/arch/x86/entry/calling.h index 3f48f69..5aafb51 100644 --- a/arch/x86/entry/calling.h +++ b/arch/x86/entry/calling.h @@ -6,6 +6,8 @@ #include #include #include +#include +#include /* @@ -349,3 +351,74 @@ For 32-bit we have the following conventions - kernel is built with .Lafter_call_\@: #endif .endm + +/* + * IBRS related macros + */ +.macro PUSH_MSR_REGS + pushq %rax + pushq %rcx + pushq %rdx +.endm + +.macro POP_MSR_REGS + popq %rdx + popq %rcx + popq %rax +.endm + +.macro WRMSR_ASM msr_nr:req edx_val:req eax_val:req + movl \msr_nr, %ecx + movl \edx_val, %edx + movl \eax_val, %eax + wrmsr +.endm + +.macro RESTRICT_IB_SPEC + ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_IBRS + PUSH_MSR_REGS + WRMSR_ASM $MSR_IA32_SPEC_CTRL, $0, $SPEC_CTRL_IBRS + POP_MSR_REGS +.Lskip_\@: +.endm + +.macro UNRESTRICT_IB_SPEC + ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_IBRS + PUSH_MSR_REGS + WRMSR_ASM $MSR_IA32_SPEC_CTRL, $0, $0 + POP_MSR_REGS +.Lskip_\@: +.endm + +.macro RESTRICT_IB_SPEC_CLOBBER + ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_IBRS + WRMSR_ASM $MSR_IA32_SPEC_CTRL, $0, $SPEC_CTRL_IBRS +.Lskip_\@: +.endm + +.macro UNRESTRICT_IB_SPEC_CLOBBER + ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_IBRS + WRMSR_ASM $MSR_IA32_SPEC_CTRL, $0, $0 +.Lskip_\@: +.endm + +.macro RESTRICT_IB_SPEC_SAVE_AND_CLOBBER save_reg:req + ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_IBRS + movl $MSR_IA32_SPEC_CTRL, %ecx + rdmsr + movl %eax, \save_reg + movl $0, %edx + movl $SPEC_CTRL_IBRS, %eax + wrmsr +.Lskip_\@: +.endm + +.macro RESTORE_IB_SPEC_CLOBBER save_reg:req + ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_IBRS + /* Set IBRS to the value saved in the save_reg */ + movl $MSR_IA32_SPEC_CTRL, %ecx + movl $0, %edx + movl \save_reg, %eax + wrmsr +.Lskip_\@: +.endm -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 From: KarimAllah Ahmed Subject: [RFC 09/10] x86/enter: Create macros to restrict/unrestrict Indirect Branch Speculation Date: Sat, 20 Jan 2018 20:23:00 +0100 Message-ID: <1516476182-5153-10-git-send-email-karahmed@amazon.de> References: <1516476182-5153-1-git-send-email-karahmed@amazon.de> Cc: KarimAllah Ahmed , Andi Kleen , Andrea Arcangeli , Andy Lutomirski , Arjan van de Ven , Ashok Raj , Asit Mallick , Borislav Petkov , Dan Williams , Dave Hansen , David Woodhouse , Greg Kroah-Hartman , "H . Peter Anvin" , Ingo Molnar , Janakarajan Natarajan , Joerg Roedel , Jun Nakajima , Laura Abbott , Linus Torvalds , Masami Hiramatsu Received: from smtp-fw-33001.amazon.com ([207.171.190.10]:49196 "EHLO smtp-fw-33001.amazon.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932582AbeATTXw (ORCPT ); Sat, 20 Jan 2018 14:23:52 -0500 In-Reply-To: <1516476182-5153-1-git-send-email-karahmed@amazon.de> Sender: kvm-owner@vger.kernel.org List-ID: From: Tim Chen Create macros to control Indirect Branch Speculation. Name them so they reflect what they are actually doing. The macros are used to restrict and unrestrict the indirect branch speculation. They do not *disable* (or *enable*) indirect branch speculation. A trip back to user-space after *restricting* speculation would still affect the BTB. Quoting from a commit by Tim Chen: """ If IBRS is set, near returns and near indirect jumps/calls will not allow their predicted target address to be controlled by code that executed in a less privileged prediction mode *BEFORE* the IBRS mode was last written with a value of 1 or on another logical processor so long as all Return Stack Buffer (RSB) entries from the previous less privileged prediction mode are overwritten. Thus a near indirect jump/call/return may be affected by code in a less privileged prediction mode that executed *AFTER* IBRS mode was last written with a value of 1. """ [ tglx: Changed macro names and rewrote changelog ] [ karahmed: changed macro names *again* and rewrote changelog ] Signed-off-by: Tim Chen Signed-off-by: Thomas Gleixner Signed-off-by: KarimAllah Ahmed Cc: Andrea Arcangeli Cc: Andi Kleen Cc: Peter Zijlstra Cc: Greg KH Cc: Dave Hansen Cc: Andy Lutomirski Cc: Paolo Bonzini Cc: Dan Williams Cc: Arjan Van De Ven Cc: Linus Torvalds Cc: David Woodhouse Cc: Ashok Raj Link: https://lkml.kernel.org/r/3aab341725ee6a9aafd3141387453b45d788d61a.1515542293.git.tim.c.chen@linux.intel.com Signed-off-by: David Woodhouse --- arch/x86/entry/calling.h | 73 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/arch/x86/entry/calling.h b/arch/x86/entry/calling.h index 3f48f69..5aafb51 100644 --- a/arch/x86/entry/calling.h +++ b/arch/x86/entry/calling.h @@ -6,6 +6,8 @@ #include #include #include +#include +#include /* @@ -349,3 +351,74 @@ For 32-bit we have the following conventions - kernel is built with .Lafter_call_\@: #endif .endm + +/* + * IBRS related macros + */ +.macro PUSH_MSR_REGS + pushq %rax + pushq %rcx + pushq %rdx +.endm + +.macro POP_MSR_REGS + popq %rdx + popq %rcx + popq %rax +.endm + +.macro WRMSR_ASM msr_nr:req edx_val:req eax_val:req + movl \msr_nr, %ecx + movl \edx_val, %edx + movl \eax_val, %eax + wrmsr +.endm + +.macro RESTRICT_IB_SPEC + ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_IBRS + PUSH_MSR_REGS + WRMSR_ASM $MSR_IA32_SPEC_CTRL, $0, $SPEC_CTRL_IBRS + POP_MSR_REGS +.Lskip_\@: +.endm + +.macro UNRESTRICT_IB_SPEC + ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_IBRS + PUSH_MSR_REGS + WRMSR_ASM $MSR_IA32_SPEC_CTRL, $0, $0 + POP_MSR_REGS +.Lskip_\@: +.endm + +.macro RESTRICT_IB_SPEC_CLOBBER + ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_IBRS + WRMSR_ASM $MSR_IA32_SPEC_CTRL, $0, $SPEC_CTRL_IBRS +.Lskip_\@: +.endm + +.macro UNRESTRICT_IB_SPEC_CLOBBER + ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_IBRS + WRMSR_ASM $MSR_IA32_SPEC_CTRL, $0, $0 +.Lskip_\@: +.endm + +.macro RESTRICT_IB_SPEC_SAVE_AND_CLOBBER save_reg:req + ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_IBRS + movl $MSR_IA32_SPEC_CTRL, %ecx + rdmsr + movl %eax, \save_reg + movl $0, %edx + movl $SPEC_CTRL_IBRS, %eax + wrmsr +.Lskip_\@: +.endm + +.macro RESTORE_IB_SPEC_CLOBBER save_reg:req + ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_IBRS + /* Set IBRS to the value saved in the save_reg */ + movl $MSR_IA32_SPEC_CTRL, %ecx + movl $0, %edx + movl \save_reg, %eax + wrmsr +.Lskip_\@: +.endm -- 2.7.4