All of lore.kernel.org
 help / color / mirror / Atom feed
From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 8/9] arm64: assembler: Align phys_to_pte with pte_to_phys
Date: Mon, 29 Jan 2018 11:59:59 +0000	[thread overview]
Message-ID: <1517227200-20412-9-git-send-email-will.deacon@arm.com> (raw)
In-Reply-To: <1517227200-20412-1-git-send-email-will.deacon@arm.com>

pte_to_phys lives in assembler.h and takes its destination register as
the first argument. Move phys_to_pte out of head.S to sit with its
counterpart and rejig it to follow the same calling convention.

Signed-off-by: Will Deacon <will.deacon@arm.com>
---
 arch/arm64/include/asm/assembler.h | 14 ++++++++++++++
 arch/arm64/kernel/head.S           | 24 ++----------------------
 2 files changed, 16 insertions(+), 22 deletions(-)

diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index e4495ef96058..f311a1ed34d0 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -523,6 +523,20 @@ alternative_endif
 #endif
 	.endm
 
+	.macro	phys_to_pte, pte, phys
+#ifdef CONFIG_ARM64_PA_BITS_52
+	/*
+	 * We assume \phys is 64K aligned and this is guaranteed by only
+	 * supporting this configuration with 64K pages.
+	 */
+	orr	\pte, \phys, \phys, lsr #36
+	and	\pte, \pte, #PTE_ADDR_MASK
+#else
+	mov	\pte, \phys
+#endif
+	.endm
+
+
 	.macro	pte_to_phys, phys, pte
 #ifdef CONFIG_ARM64_PA_BITS_52
 	ror	\phys, \pte, #16
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 341649c08337..25f5b2e400fb 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -148,26 +148,6 @@ preserve_boot_args:
 ENDPROC(preserve_boot_args)
 
 /*
- * Macro to arrange a physical address in a page table entry, taking care of
- * 52-bit addresses.
- *
- * Preserves:	phys
- * Returns:	pte
- */
-	.macro	phys_to_pte, phys, pte
-#ifdef CONFIG_ARM64_PA_BITS_52
-	/*
-	 * We assume \phys is 64K aligned and this is guaranteed by only
-	 * supporting this configuration with 64K pages.
-	 */
-	orr	\pte, \phys, \phys, lsr #36
-	and	\pte, \pte, #PTE_ADDR_MASK
-#else
-	mov	\pte, \phys
-#endif
-	.endm
-
-/*
  * Macro to create a table entry to the next page.
  *
  *	tbl:	page table address
@@ -181,7 +161,7 @@ ENDPROC(preserve_boot_args)
  */
 	.macro	create_table_entry, tbl, virt, shift, ptrs, tmp1, tmp2
 	add	\tmp1, \tbl, #PAGE_SIZE
-	phys_to_pte \tmp1, \tmp2
+	phys_to_pte \tmp2, \tmp1
 	orr	\tmp2, \tmp2, #PMD_TYPE_TABLE	// address of next table and entry type
 	lsr	\tmp1, \virt, #\shift
 	sub	\ptrs, \ptrs, #1
@@ -207,7 +187,7 @@ ENDPROC(preserve_boot_args)
  * Returns:	rtbl
  */
 	.macro populate_entries, tbl, rtbl, index, eindex, flags, inc, tmp1
-.Lpe\@:	phys_to_pte \rtbl, \tmp1
+.Lpe\@:	phys_to_pte \tmp1, \rtbl
 	orr	\tmp1, \tmp1, \flags	// tmp1 = table entry
 	str	\tmp1, [\tbl, \index, lsl #3]
 	add	\rtbl, \rtbl, \inc	// rtbl = pa next level
-- 
2.1.4

  parent reply	other threads:[~2018-01-29 11:59 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-29 11:59 [PATCH v2 0/9] Fix kpti-enabled kernels for Cavium ThunderX Will Deacon
2018-01-29 11:59 ` [PATCH v2 1/9] arm64: Add software workaround for Falkor erratum 1041 Will Deacon
2018-01-29 11:59 ` [PATCH v2 2/9] arm64: kpti: Make use of nG dependent on arm64_kernel_unmapped_at_el0() Will Deacon
2018-01-29 11:59 ` [PATCH v2 3/9] arm64: mm: Permit transitioning from Global to Non-Global without BBM Will Deacon
2018-01-29 11:59 ` [PATCH v2 4/9] arm64: kpti: Add ->enable callback to remap swapper using nG mappings Will Deacon
2018-01-30 10:30   ` Will Deacon
2018-01-29 11:59 ` [PATCH v2 5/9] arm64: Force KPTI to be disabled on Cavium ThunderX Will Deacon
2018-01-29 11:59 ` [PATCH v2 6/9] arm64: assembler: Change order of macro arguments in phys_to_ttbr Will Deacon
2018-01-29 11:59 ` [PATCH v2 7/9] arm64: entry: Reword comment about post_ttbr_update_workaround Will Deacon
2018-02-03 11:15   ` Ard Biesheuvel
2018-02-05 16:41     ` Will Deacon
2018-01-29 11:59 ` Will Deacon [this message]
2018-01-29 12:00 ` [PATCH v2 9/9] arm64: idmap: Use "awx" flags for .idmap.text .pushsection directives Will Deacon
2018-02-03 11:36 ` [PATCH v2 0/9] Fix kpti-enabled kernels for Cavium ThunderX Ard Biesheuvel
2018-02-05 16:41   ` Will Deacon
2018-02-05 19:21     ` Ard Biesheuvel
2018-02-06 22:31 ` Catalin Marinas

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1517227200-20412-9-git-send-email-will.deacon@arm.com \
    --to=will.deacon@arm.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.