Re: [PATCH] drm/i915/cnl: Enable DDI-F on Cannonlake.

From: "Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com>
To: "Vivi, Rodrigo" <rodrigo.vivi@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915/cnl: Enable DDI-F on Cannonlake.
Date: Mon, 29 Jan 2018 22:00:37 +0000	[thread overview]
Message-ID: <1517264604.21203.13.camel@dk-H97M-D3H> (raw)
In-Reply-To: <20180127013330.20124-1-rodrigo.vivi@intel.com>

On Fri, 2018-01-26 at 17:33 -0800, Rodrigo Vivi wrote:
> Now let's finish the Port-F support by adding the
> proper port F detection, irq and power well support.
> 
> v2: Rebase
> v3: Use BIT_ULL
> v4: Cover missed case on ddi init.
> v5: Update commit message.
> v6: Rebase on top of display headers rework.
> v7: Squash power-well handling related to DDI F to this
>     patch to avoid warns as pointed out by DK.
> v8: Introduce DDI_F_LANES to PG2. (DK)
> 
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h         |  2 ++
>  drivers/gpu/drm/i915/intel_ddi.c        |  4 ++++
>  drivers/gpu/drm/i915/intel_display.c    |  6 +++++-
>  drivers/gpu/drm/i915/intel_display.h    |  2 ++
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 20 +++++++++++++++++---
>  5 files changed, 30 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 076a49107e02..8261fe4c4316 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1304,6 +1304,7 @@ enum i915_power_well_id {
>  	SKL_DISP_PW_DDI_B,
>  	SKL_DISP_PW_DDI_C,
>  	SKL_DISP_PW_DDI_D,
> +	CNL_DISP_PW_DDI_F = 6,
>  
>  	GLK_DISP_PW_AUX_A = 8,
>  	GLK_DISP_PW_AUX_B,
> @@ -8945,6 +8946,7 @@ enum skl_power_gate {
>  #define  SFUSE_STRAP_RAW_FREQUENCY	(1<<8)
>  #define  SFUSE_STRAP_DISPLAY_DISABLED	(1<<7)
>  #define  SFUSE_STRAP_CRT_DISABLED	(1<<6)
> +#define  SFUSE_STRAP_DDIF_DETECTED	(1<<3)
>  #define  SFUSE_STRAP_DDIB_DETECTED	(1<<2)
>  #define  SFUSE_STRAP_DDIC_DETECTED	(1<<1)
>  #define  SFUSE_STRAP_DDID_DETECTED	(1<<0)
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index e51559be2e3b..cfcd9cb37d5d 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2946,6 +2946,10 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
>  		intel_dig_port->ddi_io_power_domain =
>  			POWER_DOMAIN_PORT_DDI_E_IO;
>  		break;
> +	case PORT_F:
> +		intel_dig_port->ddi_io_power_domain =
> +			POWER_DOMAIN_PORT_DDI_F_IO;
> +		break;
>  	default:
>  		MISSING_CASE(port);
>  	}

It also looked liked intel_dp_set_source_rates was wrong, but I see that
you fix it in the last patch. The conditions for
intel_dp_mst_encoder_init() need to be updated too. I think that is all
I have for this patch.

With the MST change squashed in.
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>

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