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From: "Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com>
To: "Kumar, Mahesh1" <mahesh1.kumar@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915/icl: remove port A/E lane sharing limitation.
Date: Tue, 30 Jan 2018 19:52:14 +0000	[thread overview]
Message-ID: <1517343303.21203.19.camel@dk-H97M-D3H> (raw)
In-Reply-To: <20180130092155.30419-1-mahesh1.kumar@intel.com>


On Tue, 2018-01-30 at 14:51 +0530, Mahesh Kumar wrote:
> From: "Kumar, Mahesh" <mahesh1.kumar@intel.com>
> 
> Platforms before Gen11 were sharing lanes between port-A & port-E.
> This limitation is no more there.
> 
> Changes since V1:
>  - optimize the code (Shashank/Jani)
>  - create helper function to get max lanes (ville)
> 
> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 43 +++++++++++++++++-----------------------
>  1 file changed, 18 insertions(+), 25 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index e51559be2e3b..4bde742a8ff4 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2842,6 +2842,23 @@ static bool intel_ddi_a_force_4_lanes(struct intel_digital_port *dport)
>  	return false;
>  }
>  
> +static int
> +intel_ddi_max_lanes(struct drm_i915_private *dev_priv, enum port port)
> +{
> +	if (INTEL_GEN(dev_priv) >= 11)
> +		return 4;
> +
> +	if (port == PORT_A || port == PORT_E) {
> +		if (I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES)


Is the expectation that bios has already written the correct value
depending on the board?

The patch itself looks correct 
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>



> +			return port == PORT_A ? 4 : 0;
> +		else
> +			/* Both A and E share 2 lanes */
> +			return 2;
> +	}
> +
> +	return 4;
> +}
> +
>  void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
>  {
>  	struct intel_digital_port *intel_dig_port;
> @@ -2850,31 +2867,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
>  	bool init_hdmi, init_dp, init_lspcon = false;
>  	int max_lanes;
>  
> -	if (I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) {
> -		switch (port) {
> -		case PORT_A:
> -			max_lanes = 4;
> -			break;
> -		case PORT_E:
> -			max_lanes = 0;
> -			break;
> -		default:
> -			max_lanes = 4;
> -			break;
> -		}
> -	} else {
> -		switch (port) {
> -		case PORT_A:
> -			max_lanes = 2;
> -			break;
> -		case PORT_E:
> -			max_lanes = 2;
> -			break;
> -		default:
> -			max_lanes = 4;
> -			break;
> -		}
> -	}
> +	max_lanes = intel_ddi_max_lanes(dev_priv, port);
>  
>  	init_hdmi = (dev_priv->vbt.ddi_port_info[port].supports_dvi ||
>  		     dev_priv->vbt.ddi_port_info[port].supports_hdmi);
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  parent reply	other threads:[~2018-01-30 19:52 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-30  9:21 [PATCH] drm/i915/icl: remove port A/E lane sharing limitation Mahesh Kumar
2018-01-30 13:06 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-01-30 15:16 ` ✓ Fi.CI.IGT: " Patchwork
2018-01-30 15:52 ` ✓ Fi.CI.BAT: " Patchwork
2018-01-30 18:06 ` ✗ Fi.CI.IGT: warning " Patchwork
2018-01-30 19:52 ` Pandiyan, Dhinakaran [this message]
2018-01-30 20:13   ` [PATCH] " Ville Syrjälä
2018-02-02 12:21 Mahesh Kumar
2018-02-02 12:56 ` Jani Nikula
2018-02-05  9:34   ` Kumar, Mahesh
2018-02-05 10:03     ` Jani Nikula

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