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From: See, Chin Liang <chin.liang.see@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/2] arm: socfpga: cyclone5: Enable Macronix flash support
Date: Thu, 22 Feb 2018 13:39:03 +0000	[thread overview]
Message-ID: <1519308900.2582.8.camel@intel.com> (raw)
In-Reply-To: <b470963f-7631-cd1d-b5e6-d65ed49b1311@denx.de>

On Thu, 2018-02-22 at 11:45 +0100, Marek Vasut wrote:
> On 02/22/2018 07:29 AM, See, Chin Liang wrote:
> > 
> > On Wed, 2018-02-21 at 20:23 +0100, Marek Vasut wrote:
> > > 
> > > On 02/21/2018 08:39 AM, chin.liang.see at intel.com wrote:
> > > > 
> > > > 
> > > > From: Chin Liang See <chin.liang.see@intel.com>
> > > > 
> > > > Enable Macronix flash support for Cyclone5 SoC
> > > Do these boards actually have a macronix flash ? Most of the ones
> > > I
> > > know
> > > of do not.
> > Good question. 
> > 
> > Actually they are pin compatible and customer can replace the
> > existing
> > one. FYI, there seems a NOR flash shortage worldwide which lead to
> > requests by customer to change the BOM list.
> I'm quite sure better half of those boards won't . If you want to
> enable
> the SPI NORs on the devkits, fine, but the is1, sr1500 and vining are
> unlikely to get a replacement memory type.

Actually the way the code works is detecting JEDEC ID and associate it
with correct flash drivers like Micron, Spansion or Macronix. Hence it
would not yield any issue except slightly larger code. But I can take
out sr1500 and vining if it yield a concern.

Thanks
Chin Liang



> 
> [...]
> 

  reply	other threads:[~2018-02-22 13:39 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-21  7:39 [U-Boot] [PATCH 1/2] arm: socfpga: cyclone5: Enable Macronix flash support chin.liang.see at intel.com
2018-02-21 19:23 ` Marek Vasut
2018-02-22  6:29   ` See, Chin Liang
2018-02-22  7:58     ` Simon Goldschmidt
2018-02-22 10:45     ` Marek Vasut
2018-02-22 13:39       ` See, Chin Liang [this message]
2018-02-22 14:23         ` Marek Vasut

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