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From: Michael Clark <mjc@sifive.com>
To: qemu-devel@nongnu.org
Cc: Michael Clark <mjc@sifive.com>,
	Sagar Karandikar <sagark@eecs.berkeley.edu>,
	Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	Palmer Dabbelt <palmer@sifive.com>
Subject: [Qemu-devel] [PATCH v2 14/23] RISC-V: Make virt header comment title consistent
Date: Fri,  9 Mar 2018 17:12:36 +1300	[thread overview]
Message-ID: <1520568765-58189-15-git-send-email-mjc@sifive.com> (raw)
In-Reply-To: <1520568765-58189-1-git-send-email-mjc@sifive.com>

Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Michael Clark <mjc@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
 include/hw/riscv/virt.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
index 3a4f23e..91163d6 100644
--- a/include/hw/riscv/virt.h
+++ b/include/hw/riscv/virt.h
@@ -1,5 +1,5 @@
 /*
- * SiFive VirtIO Board
+ * QEMU RISC-V VirtIO machine interface
  *
  * Copyright (c) 2017 SiFive, Inc.
  *
-- 
2.7.0

  parent reply	other threads:[~2018-03-09  4:14 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-09  4:12 [Qemu-devel] [PATCH v2 00/23] RISC-V Post-merge spec conformance and cleanup Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 01/23] RISC-V: Make virt create_fdt interface consistent Michael Clark
2018-03-10 20:33   ` Philippe Mathieu-Daudé
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 02/23] RISC-V: Replace hardcoded constants with enum values Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 03/23] RISC-V: Make virt board description match spike Michael Clark
2018-03-10 20:34   ` Philippe Mathieu-Daudé
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 04/23] RISC-V: Use ROM base address and size from memmap Michael Clark
2018-03-10 20:35   ` Philippe Mathieu-Daudé
2018-03-12 18:24   ` Eric Blake
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 05/23] RISC-V: Remove identity_translate from load_elf Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 06/23] RISC-V: Mark ROM read-only after copying in code Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 07/23] RISC-V: Remove unused class definitions Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 08/23] RISC-V: Make sure rom has space for fdt Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 09/23] RISC-V: Include intruction hex in disassembly Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 10/23] RISC-V: Hold rcu_read_lock when accessing memory Michael Clark
2018-03-10 20:45   ` Philippe Mathieu-Daudé
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 11/23] RISC-V: Improve page table walker spec compliance Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 12/23] RISC-V: Update E order and I extension order Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 13/23] RISC-V: Make some header guards more specific Michael Clark
2018-03-10 20:30   ` Philippe Mathieu-Daudé
2018-03-09  4:12 ` Michael Clark [this message]
2018-03-10 20:31   ` [Qemu-devel] [PATCH v2 14/23] RISC-V: Make virt header comment title consistent Philippe Mathieu-Daudé
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 15/23] RISC-V: Use memory_region_is_ram in pte update Michael Clark
2018-03-10 20:42   ` Philippe Mathieu-Daudé
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 16/23] RISC-V: Remove EM_RISCV ELF_MACHINE indirection Michael Clark
2018-03-10 20:32   ` Philippe Mathieu-Daudé
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 17/23] RISC-V: Hardwire satp to 0 for no-mmu case Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 18/23] RISC-V: Remove braces from satp case statement Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 19/23] RISC-V: riscv-qemu port supports sv39 and sv48 Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 20/23] RISC-V: vectored traps are optional Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 21/23] RISC-V: No traps on writes to misa, minstret, mcycle Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 22/23] RISC-V: Remove support for adhoc X_COP interrupt Michael Clark
2018-03-09  4:12 ` [Qemu-devel] [PATCH v2 23/23] RISC-V: Convert cpu definition towards future model Michael Clark
2018-03-10 20:30   ` Philippe Mathieu-Daudé
2018-03-12 17:34 ` [Qemu-devel] [PATCH v2 00/23] RISC-V Post-merge spec conformance and cleanup no-reply

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