From mboxrd@z Thu Jan 1 00:00:00 1970 From: Geert Uytterhoeven Subject: [PATCH v2 3/3] arm64: dts: renesas: ulcb: Configure PMIC for DDR Backup Power Date: Wed, 14 Mar 2018 13:09:46 +0100 Message-ID: <1521029386-29975-4-git-send-email-geert+renesas@glider.be> References: <1521029386-29975-1-git-send-email-geert+renesas@glider.be> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1521029386-29975-1-git-send-email-geert+renesas@glider.be> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Simon Horman , Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, Marek Vasut List-Id: devicetree@vger.kernel.org On the R-Car Starter Kit Premier/Pro, all of the DDR0, DDR1, DDR0C, and DDR1C power rails need to be kept powered when backup mode is enabled. Reflect this in the "rohm,ddr-backup-power" property for the BD9571MWV PMIC node. The accessory power switch (SW8) is a momentary switch, hense specify "rohm,rstbmode-pulse". Signed-off-by: Geert Uytterhoeven --- v2: - New. --- arch/arm64/boot/dts/renesas/ulcb.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi index bb21ae335e8b8489..6caf2e4b776faf40 100644 --- a/arch/arm64/boot/dts/renesas/ulcb.dtsi +++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi @@ -256,6 +256,8 @@ #interrupt-cells = <2>; gpio-controller; #gpio-cells = <2>; + rohm,ddr-backup-power = <15>; + rohm,rstbmode-pulse; regulators { dvfs: dvfs { -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from andre.telenet-ops.be ([195.130.132.53]:49106 "EHLO andre.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751556AbeCNMKV (ORCPT ); Wed, 14 Mar 2018 08:10:21 -0400 From: Geert Uytterhoeven To: Simon Horman , Magnus Damm Cc: Marek Vasut , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH v2 3/3] arm64: dts: renesas: ulcb: Configure PMIC for DDR Backup Power Date: Wed, 14 Mar 2018 13:09:46 +0100 Message-Id: <1521029386-29975-4-git-send-email-geert+renesas@glider.be> In-Reply-To: <1521029386-29975-1-git-send-email-geert+renesas@glider.be> References: <1521029386-29975-1-git-send-email-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org List-ID: On the R-Car Starter Kit Premier/Pro, all of the DDR0, DDR1, DDR0C, and DDR1C power rails need to be kept powered when backup mode is enabled. Reflect this in the "rohm,ddr-backup-power" property for the BD9571MWV PMIC node. The accessory power switch (SW8) is a momentary switch, hense specify "rohm,rstbmode-pulse". Signed-off-by: Geert Uytterhoeven --- v2: - New. --- arch/arm64/boot/dts/renesas/ulcb.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi index bb21ae335e8b8489..6caf2e4b776faf40 100644 --- a/arch/arm64/boot/dts/renesas/ulcb.dtsi +++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi @@ -256,6 +256,8 @@ #interrupt-cells = <2>; gpio-controller; #gpio-cells = <2>; + rohm,ddr-backup-power = <15>; + rohm,rstbmode-pulse; regulators { dvfs: dvfs { -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 From: geert+renesas@glider.be (Geert Uytterhoeven) Date: Wed, 14 Mar 2018 13:09:46 +0100 Subject: [PATCH v2 3/3] arm64: dts: renesas: ulcb: Configure PMIC for DDR Backup Power In-Reply-To: <1521029386-29975-1-git-send-email-geert+renesas@glider.be> References: <1521029386-29975-1-git-send-email-geert+renesas@glider.be> Message-ID: <1521029386-29975-4-git-send-email-geert+renesas@glider.be> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On the R-Car Starter Kit Premier/Pro, all of the DDR0, DDR1, DDR0C, and DDR1C power rails need to be kept powered when backup mode is enabled. Reflect this in the "rohm,ddr-backup-power" property for the BD9571MWV PMIC node. The accessory power switch (SW8) is a momentary switch, hense specify "rohm,rstbmode-pulse". Signed-off-by: Geert Uytterhoeven --- v2: - New. --- arch/arm64/boot/dts/renesas/ulcb.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi index bb21ae335e8b8489..6caf2e4b776faf40 100644 --- a/arch/arm64/boot/dts/renesas/ulcb.dtsi +++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi @@ -256,6 +256,8 @@ #interrupt-cells = <2>; gpio-controller; #gpio-cells = <2>; + rohm,ddr-backup-power = <15>; + rohm,rstbmode-pulse; regulators { dvfs: dvfs { -- 2.7.4