From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.kernel.org ([198.145.29.99]:57612 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935621AbeCSQ3p (ORCPT ); Mon, 19 Mar 2018 12:29:45 -0400 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT To: Boris Brezillon , Eric Anholt , Florian Fainelli , Lee Jones , Mike Turquette , Ray Jui , Scott Branden , Stephen Boyd , Stephen Warren , bcm-kernel-feedback-list@broadcom.com, linux-clk@vger.kernel.org, linux-rpi-kernel@lists.infradead.org From: Stephen Boyd In-Reply-To: <20180208134338.24590-2-boris.brezillon@bootlin.com> Cc: Boris Brezillon , stable@vger.kernel.org References: <20180208134338.24590-1-boris.brezillon@bootlin.com> <20180208134338.24590-2-boris.brezillon@bootlin.com> Message-ID: <152147698429.242365.13201145820361051741@swboyd.mtv.corp.google.com> Subject: Re: [PATCH 2/4] clk: bcm2835: Protect sections updating shared registers Date: Mon, 19 Mar 2018 09:29:44 -0700 Sender: stable-owner@vger.kernel.org List-ID: Quoting Boris Brezillon (2018-02-08 05:43:36) > CM_PLLx and A2W_XOSC_CTRL registers are accessed by different clock > handlers and must be accessed with ->regs_lock held. > Update the sections where this protection is missing. > > Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks") > Cc: > Signed-off-by: Boris Brezillon > --- Applied to clk-fixes From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 To: Boris Brezillon , Eric Anholt , Florian Fainelli , Lee Jones , Mike Turquette , Ray Jui , Scott Branden , Stephen Boyd , Stephen Warren , bcm-kernel-feedback-list@broadcom.com, linux-clk@vger.kernel.org, linux-rpi-kernel@lists.infradead.org From: Stephen Boyd In-Reply-To: <20180208134338.24590-2-boris.brezillon@bootlin.com> Cc: Boris Brezillon , stable@vger.kernel.org References: <20180208134338.24590-1-boris.brezillon@bootlin.com> <20180208134338.24590-2-boris.brezillon@bootlin.com> Message-ID: <152147698429.242365.13201145820361051741@swboyd.mtv.corp.google.com> Subject: Re: [PATCH 2/4] clk: bcm2835: Protect sections updating shared registers Date: Mon, 19 Mar 2018 09:29:44 -0700 List-ID: Quoting Boris Brezillon (2018-02-08 05:43:36) > CM_PLLx and A2W_XOSC_CTRL registers are accessed by different clock > handlers and must be accessed with ->regs_lock held. > Update the sections where this protection is missing. > = > Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio= domain clocks") > Cc: > Signed-off-by: Boris Brezillon > --- Applied to clk-fixes