All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ilia Lin <ilialin@codeaurora.org>
To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org,
	mark.rutland@arm.com, rjw@rjwysocki.net, viresh.kumar@linaro.org,
	lgirdwood@gmail.com, broonie@kernel.org, andy.gross@linaro.org,
	david.brown@linaro.org, catalin.marinas@arm.com,
	will.deacon@arm.com, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Cc: rnayak@codeaurora.org, ilialin@codeaurora.org,
	amit.kucheria@linaro.org, nicolas.dechesne@linaro.org,
	celster@codeaurora.org, tfinkel@codeaurora.org
Subject: [PATCH v4 11/14] dt: qcom: Add SAW regulator for 8x96 CPUs
Date: Fri, 30 Mar 2018 00:26:44 +0300	[thread overview]
Message-ID: <1522358807-10413-12-git-send-email-ilialin@codeaurora.org> (raw)
In-Reply-To: <1522358807-10413-1-git-send-email-ilialin@codeaurora.org>

1. Add syscon node for the SAW CPU registers
2. Add SAW regulators gang definition for s8-s11
3. Add voltages to the OPP tables
4. Add the s11 SAW regulator as CPU regulator

Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/msm8996.dtsi | 77 +++++++++++++++++++++++++++++++++++
 1 file changed, 77 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index a0792bd..993f0a3 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -15,6 +15,8 @@
 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
 #include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/spmi/spmi.h>
+
 
 / {
 	model = "Qualcomm Technologies, Inc. MSM8996";
@@ -99,6 +101,7 @@
 			reg = <0x0 0x0>;
 			enable-method = "psci";
 			clocks = <&kryocc 0>;
+			cpu-supply = <&pm8994_s11_saw>;
 			operating-points-v2 = <&cluster0_opp>;
 			cooling-min-level = <0>;
 			cooling-max-level = <15>;
@@ -116,6 +119,7 @@
 			reg = <0x0 0x1>;
 			enable-method = "psci";
 			clocks = <&kryocc 0>;
+			cpu-supply = <&pm8994_s11_saw>;
 			operating-points-v2 = <&cluster0_opp>;
 			cooling-min-level = <0>;
 			cooling-max-level = <15>;
@@ -129,6 +133,7 @@
 			reg = <0x0 0x100>;
 			enable-method = "psci";
 			clocks = <&kryocc 1>;
+			cpu-supply = <&pm8994_s11_saw>;
 			operating-points-v2 = <&cluster1_opp>;
 			cooling-min-level = <0>;
 			cooling-max-level = <15>;
@@ -146,6 +151,7 @@
 			reg = <0x0 0x101>;
 			enable-method = "psci";
 			clocks = <&kryocc 1>;
+			cpu-supply = <&pm8994_s11_saw>;
 			operating-points-v2 = <&cluster1_opp>;
 			cooling-min-level = <0>;
 			cooling-max-level = <15>;
@@ -182,66 +188,82 @@
 
 		opp-307200000 {
 			opp-hz = /bits/ 64 <  307200000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-422400000 {
 			opp-hz = /bits/ 64 <  422400000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-480000000 {
 			opp-hz = /bits/ 64 <  480000000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-556800000 {
 			opp-hz = /bits/ 64 <  556800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-652800000 {
 			opp-hz = /bits/ 64 <  652800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-729600000 {
 			opp-hz = /bits/ 64 <  729600000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-844800000 {
 			opp-hz = /bits/ 64 <  844800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-960000000 {
 			opp-hz = /bits/ 64 <  960000000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1036800000 {
 			opp-hz = /bits/ 64 < 1036800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1113600000 {
 			opp-hz = /bits/ 64 < 1113600000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1190400000 {
 			opp-hz = /bits/ 64 < 1190400000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1228800000 {
 			opp-hz = /bits/ 64 < 1228800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1324800000 {
 			opp-hz = /bits/ 64 < 1324800000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1401600000 {
 			opp-hz = /bits/ 64 < 1401600000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1478400000 {
 			opp-hz = /bits/ 64 < 1478400000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1593600000 {
 			opp-hz = /bits/ 64 < 1593600000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 	};
@@ -252,102 +274,127 @@
 
 		opp-307200000 {
 			opp-hz = /bits/ 64 <  307200000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-403200000 {
 			opp-hz = /bits/ 64 <  403200000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-480000000 {
 			opp-hz = /bits/ 64 <  480000000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-556800000 {
 			opp-hz = /bits/ 64 <  556800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-652800000 {
 			opp-hz = /bits/ 64 <  652800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-729600000 {
 			opp-hz = /bits/ 64 <  729600000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-806400000 {
 			opp-hz = /bits/ 64 <  806400000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-883200000 {
 			opp-hz = /bits/ 64 <  883200000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-940800000 {
 			opp-hz = /bits/ 64 <  940800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1036800000 {
 			opp-hz = /bits/ 64 < 1036800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1113600000 {
 			opp-hz = /bits/ 64 < 1113600000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1190400000 {
 			opp-hz = /bits/ 64 < 1190400000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1248000000 {
 			opp-hz = /bits/ 64 < 1248000000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1324800000 {
 			opp-hz = /bits/ 64 < 1324800000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1401600000 {
 			opp-hz = /bits/ 64 < 1401600000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1478400000 {
 			opp-hz = /bits/ 64 < 1478400000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1555200000 {
 			opp-hz = /bits/ 64 < 1555200000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1632000000 {
 			opp-hz = /bits/ 64 < 1632000000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1708800000 {
 			opp-hz = /bits/ 64 < 1708800000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1785600000 {
 			opp-hz = /bits/ 64 < 1785600000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1824000000 {
 			opp-hz = /bits/ 64 < 1824000000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1920000000 {
 			opp-hz = /bits/ 64 < 1920000000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1996800000 {
 			opp-hz = /bits/ 64 < 1996800000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-2073600000 {
 			opp-hz = /bits/ 64 < 2073600000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-2150400000 {
 			opp-hz = /bits/ 64 < 2150400000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 	};
@@ -664,6 +711,11 @@
 			#mbox-cells = <1>;
 		};
 
+		saw3: syscon@9A10000 {
+			compatible = "syscon";
+			reg = <0x9A10000 0x1000>;
+		};
+
 		gcc: clock-controller@300000 {
 			compatible = "qcom,gcc-msm8996";
 			#clock-cells = <1>;
@@ -880,6 +932,31 @@
 			#size-cells = <0>;
 			interrupt-controller;
 			#interrupt-cells = <4>;
+			pmic@1 {
+				compatible = "qcom,pm8994", "qcom,spmi-pmic";
+				reg = <0x1 SPMI_USID>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				spm-regulators {
+					compatible = "qcom,pm8994-regulators";
+					qcom,saw-reg = <&saw3>;
+					s8 {
+						qcom,saw-slave;
+					};
+					s9 {
+						qcom,saw-slave;
+					};
+					s10 {
+						qcom,saw-slave;
+					};
+					pm8994_s11_saw: s11 {
+						qcom,saw-leader;
+						regulator-always-on;
+						regulator-min-microvolt = <905000>;
+						regulator-max-microvolt = <1140000>;
+					};
+				};
+			};
 		};
 
 		mmcc: clock-controller@8c0000 {
-- 
1.9.1

WARNING: multiple messages have this Message-ID
From: ilialin@codeaurora.org (Ilia Lin)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 11/14] dt: qcom: Add SAW regulator for 8x96 CPUs
Date: Fri, 30 Mar 2018 00:26:44 +0300	[thread overview]
Message-ID: <1522358807-10413-12-git-send-email-ilialin@codeaurora.org> (raw)
In-Reply-To: <1522358807-10413-1-git-send-email-ilialin@codeaurora.org>

1. Add syscon node for the SAW CPU registers
2. Add SAW regulators gang definition for s8-s11
3. Add voltages to the OPP tables
4. Add the s11 SAW regulator as CPU regulator

Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/msm8996.dtsi | 77 +++++++++++++++++++++++++++++++++++
 1 file changed, 77 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index a0792bd..993f0a3 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -15,6 +15,8 @@
 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
 #include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/spmi/spmi.h>
+
 
 / {
 	model = "Qualcomm Technologies, Inc. MSM8996";
@@ -99,6 +101,7 @@
 			reg = <0x0 0x0>;
 			enable-method = "psci";
 			clocks = <&kryocc 0>;
+			cpu-supply = <&pm8994_s11_saw>;
 			operating-points-v2 = <&cluster0_opp>;
 			cooling-min-level = <0>;
 			cooling-max-level = <15>;
@@ -116,6 +119,7 @@
 			reg = <0x0 0x1>;
 			enable-method = "psci";
 			clocks = <&kryocc 0>;
+			cpu-supply = <&pm8994_s11_saw>;
 			operating-points-v2 = <&cluster0_opp>;
 			cooling-min-level = <0>;
 			cooling-max-level = <15>;
@@ -129,6 +133,7 @@
 			reg = <0x0 0x100>;
 			enable-method = "psci";
 			clocks = <&kryocc 1>;
+			cpu-supply = <&pm8994_s11_saw>;
 			operating-points-v2 = <&cluster1_opp>;
 			cooling-min-level = <0>;
 			cooling-max-level = <15>;
@@ -146,6 +151,7 @@
 			reg = <0x0 0x101>;
 			enable-method = "psci";
 			clocks = <&kryocc 1>;
+			cpu-supply = <&pm8994_s11_saw>;
 			operating-points-v2 = <&cluster1_opp>;
 			cooling-min-level = <0>;
 			cooling-max-level = <15>;
@@ -182,66 +188,82 @@
 
 		opp-307200000 {
 			opp-hz = /bits/ 64 <  307200000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-422400000 {
 			opp-hz = /bits/ 64 <  422400000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-480000000 {
 			opp-hz = /bits/ 64 <  480000000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-556800000 {
 			opp-hz = /bits/ 64 <  556800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-652800000 {
 			opp-hz = /bits/ 64 <  652800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-729600000 {
 			opp-hz = /bits/ 64 <  729600000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-844800000 {
 			opp-hz = /bits/ 64 <  844800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-960000000 {
 			opp-hz = /bits/ 64 <  960000000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1036800000 {
 			opp-hz = /bits/ 64 < 1036800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1113600000 {
 			opp-hz = /bits/ 64 < 1113600000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1190400000 {
 			opp-hz = /bits/ 64 < 1190400000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1228800000 {
 			opp-hz = /bits/ 64 < 1228800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1324800000 {
 			opp-hz = /bits/ 64 < 1324800000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1401600000 {
 			opp-hz = /bits/ 64 < 1401600000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1478400000 {
 			opp-hz = /bits/ 64 < 1478400000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1593600000 {
 			opp-hz = /bits/ 64 < 1593600000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 	};
@@ -252,102 +274,127 @@
 
 		opp-307200000 {
 			opp-hz = /bits/ 64 <  307200000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-403200000 {
 			opp-hz = /bits/ 64 <  403200000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-480000000 {
 			opp-hz = /bits/ 64 <  480000000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-556800000 {
 			opp-hz = /bits/ 64 <  556800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-652800000 {
 			opp-hz = /bits/ 64 <  652800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-729600000 {
 			opp-hz = /bits/ 64 <  729600000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-806400000 {
 			opp-hz = /bits/ 64 <  806400000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-883200000 {
 			opp-hz = /bits/ 64 <  883200000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-940800000 {
 			opp-hz = /bits/ 64 <  940800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1036800000 {
 			opp-hz = /bits/ 64 < 1036800000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1113600000 {
 			opp-hz = /bits/ 64 < 1113600000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1190400000 {
 			opp-hz = /bits/ 64 < 1190400000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1248000000 {
 			opp-hz = /bits/ 64 < 1248000000 >;
+			opp-microvolt = <905000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1324800000 {
 			opp-hz = /bits/ 64 < 1324800000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1401600000 {
 			opp-hz = /bits/ 64 < 1401600000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1478400000 {
 			opp-hz = /bits/ 64 < 1478400000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1555200000 {
 			opp-hz = /bits/ 64 < 1555200000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1632000000 {
 			opp-hz = /bits/ 64 < 1632000000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1708800000 {
 			opp-hz = /bits/ 64 < 1708800000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1785600000 {
 			opp-hz = /bits/ 64 < 1785600000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1824000000 {
 			opp-hz = /bits/ 64 < 1824000000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1920000000 {
 			opp-hz = /bits/ 64 < 1920000000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-1996800000 {
 			opp-hz = /bits/ 64 < 1996800000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-2073600000 {
 			opp-hz = /bits/ 64 < 2073600000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 		opp-2150400000 {
 			opp-hz = /bits/ 64 < 2150400000 >;
+			opp-microvolt = <1140000 905000 1140000>;
 			clock-latency-ns = <200000>;
 		};
 	};
@@ -664,6 +711,11 @@
 			#mbox-cells = <1>;
 		};
 
+		saw3: syscon at 9A10000 {
+			compatible = "syscon";
+			reg = <0x9A10000 0x1000>;
+		};
+
 		gcc: clock-controller at 300000 {
 			compatible = "qcom,gcc-msm8996";
 			#clock-cells = <1>;
@@ -880,6 +932,31 @@
 			#size-cells = <0>;
 			interrupt-controller;
 			#interrupt-cells = <4>;
+			pmic at 1 {
+				compatible = "qcom,pm8994", "qcom,spmi-pmic";
+				reg = <0x1 SPMI_USID>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				spm-regulators {
+					compatible = "qcom,pm8994-regulators";
+					qcom,saw-reg = <&saw3>;
+					s8 {
+						qcom,saw-slave;
+					};
+					s9 {
+						qcom,saw-slave;
+					};
+					s10 {
+						qcom,saw-slave;
+					};
+					pm8994_s11_saw: s11 {
+						qcom,saw-leader;
+						regulator-always-on;
+						regulator-min-microvolt = <905000>;
+						regulator-max-microvolt = <1140000>;
+					};
+				};
+			};
 		};
 
 		mmcc: clock-controller at 8c0000 {
-- 
1.9.1

  parent reply	other threads:[~2018-03-29 21:26 UTC|newest]

Thread overview: 67+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-29 21:26 [PATCH v4 00/14] CPU scaling support for msm8996 Ilia Lin
2018-03-29 21:26 ` Ilia Lin
2018-03-29 21:26 ` [PATCH v4 01/14] soc: qcom: Separate kryo l2 accessors from PMU driver Ilia Lin
2018-03-29 21:26   ` Ilia Lin
2018-03-31  4:39   ` kbuild test robot
2018-03-31  4:39     ` kbuild test robot
2018-03-31  4:39     ` kbuild test robot
2018-04-01 22:34   ` Bjorn Andersson
2018-04-01 22:34     ` Bjorn Andersson
2018-03-29 21:26 ` [PATCH v4 02/14] clk: qcom: Make clk_alpha_pll_configure available to modules Ilia Lin
2018-03-29 21:26   ` Ilia Lin
2018-03-29 21:26 ` [PATCH v4 03/14] clk: qcom: Add CPU clock driver for msm8996 Ilia Lin
2018-03-29 21:26   ` Ilia Lin
2018-03-29 21:26 ` [PATCH v4 04/14] clk: qcom: Add DT bindings for " Ilia Lin
2018-03-29 21:26   ` Ilia Lin
2018-04-05 13:18   ` Rob Herring
2018-04-05 13:18     ` Rob Herring
2018-03-29 21:26 ` [PATCH v4 05/14] clk: qcom: cpu-8996: Add support to switch to alternate PLL Ilia Lin
2018-03-29 21:26   ` Ilia Lin
2018-03-29 21:26 ` [PATCH v4 06/14] clk: qcom: cpu-8996: Add support to switch below 600Mhz Ilia Lin
2018-03-29 21:26   ` Ilia Lin
2018-03-29 21:26 ` [PATCH v4 07/14] clk: qcom: Add ACD path to CPU clock driver for msm8996 Ilia Lin
2018-03-29 21:26   ` Ilia Lin
2018-03-29 21:26 ` [PATCH v4 08/14] dt: qcom: Add opp and thermal to the msm8996 Ilia Lin
2018-03-29 21:26   ` Ilia Lin
2018-04-02  9:16   ` Viresh Kumar
2018-04-02  9:16     ` Viresh Kumar
2018-05-04  6:04     ` Viresh Kumar
2018-05-04  6:04       ` Viresh Kumar
2018-05-04  6:04       ` Viresh Kumar
2018-05-04  6:48       ` ilialin
2018-05-04  6:48         ` ilialin at codeaurora.org
2018-05-04  6:48         ` ilialin
2018-05-04  6:48         ` ilialin
2018-05-04  7:03         ` Viresh Kumar
2018-05-04  7:03           ` Viresh Kumar
2018-05-04  7:03           ` Viresh Kumar
2018-03-29 21:26 ` [PATCH v4 09/14] regulator: qcom_spmi: Add support for SAW Ilia Lin
2018-03-29 21:26   ` Ilia Lin
2018-03-29 21:26 ` [PATCH v4 10/14] dt-bindings: Add support for SAW documentation Ilia Lin
2018-03-29 21:26   ` Ilia Lin
2018-04-09 20:21   ` Rob Herring
2018-04-09 20:21     ` Rob Herring
2018-04-17 11:09     ` Mark Brown
2018-04-17 11:09       ` Mark Brown
2018-03-29 21:26 ` Ilia Lin [this message]
2018-03-29 21:26   ` [PATCH v4 11/14] dt: qcom: Add SAW regulator for 8x96 CPUs Ilia Lin
2018-03-29 21:26 ` [PATCH v4 12/14] cpufreq: Add Kryo CPU scaling driver Ilia Lin
2018-03-29 21:26   ` Ilia Lin
2018-04-02  9:26   ` Viresh Kumar
2018-04-02  9:26     ` Viresh Kumar
2018-04-02 14:56   ` Sricharan R
2018-04-02 14:56     ` Sricharan R
2018-03-29 21:26 ` [PATCH v4 13/14] dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu Ilia Lin
2018-03-29 21:26   ` Ilia Lin
2018-04-02  9:30   ` Viresh Kumar
2018-04-02  9:30     ` Viresh Kumar
2018-04-02 15:07     ` Sricharan R
2018-04-02 15:07       ` Sricharan R
2018-04-03  2:41       ` Sricharan R
2018-04-03  2:41         ` Sricharan R
2018-04-03  4:23         ` Viresh Kumar
2018-04-03  4:23           ` Viresh Kumar
2018-04-03 16:39           ` Sricharan R
2018-04-03 16:39             ` Sricharan R
2018-03-29 21:26 ` [PATCH v4 14/14] dt: qcom: Add qcom-cpufreq-kryo driver configuration Ilia Lin
2018-03-29 21:26   ` Ilia Lin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1522358807-10413-12-git-send-email-ilialin@codeaurora.org \
    --to=ilialin@codeaurora.org \
    --cc=amit.kucheria@linaro.org \
    --cc=andy.gross@linaro.org \
    --cc=broonie@kernel.org \
    --cc=catalin.marinas@arm.com \
    --cc=celster@codeaurora.org \
    --cc=david.brown@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=lgirdwood@gmail.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=linux-soc@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=mturquette@baylibre.com \
    --cc=nicolas.dechesne@linaro.org \
    --cc=rjw@rjwysocki.net \
    --cc=rnayak@codeaurora.org \
    --cc=robh@kernel.org \
    --cc=sboyd@kernel.org \
    --cc=tfinkel@codeaurora.org \
    --cc=viresh.kumar@linaro.org \
    --cc=will.deacon@arm.com \
    --subject='Re: [PATCH v4 11/14] dt: qcom: Add SAW regulator for 8x96 CPUs' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.