[PATCH v2] drm/amd/pp: Refine smu7_get_gpu_power function

[PATCH v2] drm/amd/pp: Refine smu7_get_gpu_power function

[Rex Zhu]

v2: not always sleep 20 ms to read back the power value.
    just delay 1 ms, and check the return value.

Do not check whether the smu message was supported by firmware.
send the message with parameter 0. if the return value not changed,
we use another way to read power.

There is no impact if driver send unsupported messages to smu.
so also refine the error info for smu7.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c   | 28 +++++++++++++---------
 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 10 +++++---
 2 files changed, 24 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 81a50cf..4478d03 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -3362,24 +3362,30 @@ static int smu7_get_pp_table_entry(struct pp_hwmgr *hwmgr,
 
 static int smu7_get_gpu_power(struct pp_hwmgr *hwmgr, u32 *query)
 {
+	int i;
+
 	if (!query)
 		return -EINVAL;
 
-	if (hwmgr->chip_id >= CHIP_POLARIS10) {
-		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrPkgPwr);
-		*query = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);
-	} else {
-		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PmStatusLogStart);
-		cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
-					ixSMU_PM_STATUS_94, 0);
+	*query = 0;
+	smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetCurrPkgPwr, 0);
+	*query = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);
 
-		msleep_interruptible(10);
+	if (*query != 0)
+		return 0;
 
-		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PmStatusLogSample);
+	smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PmStatusLogStart);
+	cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
+				ixSMU_PM_STATUS_94, 0);
 
+	for (i = 0; i < 10; i++) {
+		mdelay(1);
+		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PmStatusLogSample);
 		*query = cgs_read_ind_register(hwmgr->device,
-							CGS_IND_REG__SMC,
-							ixSMU_PM_STATUS_94);
+						CGS_IND_REG__SMC,
+						ixSMU_PM_STATUS_94);
+		if (*query != 0)
+			break;
 	}
 
 	return 0;
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
index 41fab2d..551bc7d 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
@@ -175,8 +175,10 @@ int smu7_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg)
 
 	ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP);
 
-	if (ret != 1)
-		pr_info("\n failed to send pre message %x ret is %d \n",  msg, ret);
+	if (ret == 0xFE)
+		pr_debug("last message was not supported\n");
+	else if (ret != 1)
+		pr_info("\n last message was failed ret is %d\n", ret);
 
 	cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, msg);
 
@@ -184,7 +186,9 @@ int smu7_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg)
 
 	ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP);
 
-	if (ret != 1)
+	if (ret == 0xFE)
+		pr_debug("message %x was not supported\n", msg);
+	else if (ret != 1)
 		pr_info("\n failed to send message %x ret is %d \n",  msg, ret);
 
 	return 0;
-- 
1.9.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx