From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rishabh Bhatnagar Subject: [PATCH v4 0/2] SDM845 System Cache Driver Date: Tue, 10 Apr 2018 13:08:11 -0700 Message-ID: <1523390893-10904-1-git-send-email-rishabhb@codeaurora.org> Return-path: Sender: linux-kernel-owner@vger.kernel.org To: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Cc: linux-arm@lists.infradead.org, linux-kernel@vger.kernel.org, tsoni@codeaurora.org, kyan@codeaurora.org, ckadabi@codeaurora.org, stanimir.varbanov@linaro.org, evgreen@chromium.org, Rishabh Bhatnagar List-Id: linux-arm-msm@vger.kernel.org This series implements system cache or LLCC(Last Level Cache Controller) driver for SDM845 SOC. The purpose of the driver is to partition the system cache and program the settings such as priortiy, lines to probe while doing a look up in the system cache, low power related settings etc. The partitions are called cache slices. Each cache slice is associated with size and SCID(System Cache ID). The driver also provides API for clients to query the cache slice details,activate and deactivate them. The driver can be broadly classified into: * SOC specific driver: llcc-sdm845.c: Cache partitioning and cache slice properties for usecases on sdm845 that need to use system cache. * API : llcc-slice.c: Exports APIs to clients to query cache slice details, activate and deactivate cache slices. Changes since v3: * Use the regmap_read_poll_timeout function * Check for regmap read/write errors. * Remove memory barrier after regmap write * Derive memory bank offsets using stride macro variable * Remove debug statements from code * Remove the qcom_llcc_remove function * Use if IS_ENABLED in place of ifdef for built-in module * Change EXPORT_SYMBOL to EXPORT_SYMBOL_GPL * Remove unnecessary free functions * Change the variable names as per review comments Changes since v2: * Corrected the Makefile to fix compilation. Changes since v1: * Added Makefile and Kconfig. Changes since v0: * Removed the syscon and simple-mfd approach * Updated the device tree nodes to mention LLCC as a single HW block * Moved llcc bank offsets from device tree and handled the offset in the driver. ckadabi@codeaurora.org (2): Documentation: Documentation for qcom, llcc drivers: soc: Add LLCC driver .../devicetree/bindings/arm/msm/qcom,llcc.txt | 58 +++ drivers/soc/qcom/Kconfig | 17 + drivers/soc/qcom/Makefile | 2 + drivers/soc/qcom/llcc-sdm845.c | 110 ++++++ drivers/soc/qcom/llcc-slice.c | 404 +++++++++++++++++++++ include/linux/soc/qcom/llcc-qcom.h | 168 +++++++++ 6 files changed, 759 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt create mode 100644 drivers/soc/qcom/llcc-sdm845.c create mode 100644 drivers/soc/qcom/llcc-slice.c create mode 100644 include/linux/soc/qcom/llcc-qcom.h -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project From mboxrd@z Thu Jan 1 00:00:00 1970 From: rishabhb@codeaurora.org (Rishabh Bhatnagar) Date: Tue, 10 Apr 2018 13:08:11 -0700 Subject: [PATCH v4 0/2] SDM845 System Cache Driver Message-ID: <1523390893-10904-1-git-send-email-rishabhb@codeaurora.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This series implements system cache or LLCC(Last Level Cache Controller) driver for SDM845 SOC. The purpose of the driver is to partition the system cache and program the settings such as priortiy, lines to probe while doing a look up in the system cache, low power related settings etc. The partitions are called cache slices. Each cache slice is associated with size and SCID(System Cache ID). The driver also provides API for clients to query the cache slice details,activate and deactivate them. The driver can be broadly classified into: * SOC specific driver: llcc-sdm845.c: Cache partitioning and cache slice properties for usecases on sdm845 that need to use system cache. * API : llcc-slice.c: Exports APIs to clients to query cache slice details, activate and deactivate cache slices. Changes since v3: * Use the regmap_read_poll_timeout function * Check for regmap read/write errors. * Remove memory barrier after regmap write * Derive memory bank offsets using stride macro variable * Remove debug statements from code * Remove the qcom_llcc_remove function * Use if IS_ENABLED in place of ifdef for built-in module * Change EXPORT_SYMBOL to EXPORT_SYMBOL_GPL * Remove unnecessary free functions * Change the variable names as per review comments Changes since v2: * Corrected the Makefile to fix compilation. Changes since v1: * Added Makefile and Kconfig. Changes since v0: * Removed the syscon and simple-mfd approach * Updated the device tree nodes to mention LLCC as a single HW block * Moved llcc bank offsets from device tree and handled the offset in the driver. ckadabi at codeaurora.org (2): Documentation: Documentation for qcom, llcc drivers: soc: Add LLCC driver .../devicetree/bindings/arm/msm/qcom,llcc.txt | 58 +++ drivers/soc/qcom/Kconfig | 17 + drivers/soc/qcom/Makefile | 2 + drivers/soc/qcom/llcc-sdm845.c | 110 ++++++ drivers/soc/qcom/llcc-slice.c | 404 +++++++++++++++++++++ include/linux/soc/qcom/llcc-qcom.h | 168 +++++++++ 6 files changed, 759 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt create mode 100644 drivers/soc/qcom/llcc-sdm845.c create mode 100644 drivers/soc/qcom/llcc-slice.c create mode 100644 include/linux/soc/qcom/llcc-qcom.h -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project