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From: John Spotswood <john.a.spotswood@intel.com>
To: Jackie Li <yaodong.li@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3 2/4] drm/i915: Always set HUC_LOADING_AGENT_GUC bit in WOPCM offset register
Date: Fri, 13 Apr 2018 16:34:05 -0700	[thread overview]
Message-ID: <1523662445.3618.3.camel@intel.com> (raw)
In-Reply-To: <1523320940-32742-2-git-send-email-yaodong.li@intel.com>

On Mon, 2018-04-09 at 17:42 -0700, Jackie Li wrote:
> The enable_guc modparam is used to enable/disable GuC/HuC FW
> uploading
> dynamcially during i915 module loading. If WOPCM offset register was
> locked
> without having HUC_LOADING_AGENT_GUC bit set to 1, the module
> reloading
> with both GuC and HuC FW will fail since we need to set this bit to 1
> for
> HuC FW uploading.
> 
> Since HUC_LOADING_AGENT_GUC bit has no impact on GuC FW uploading,
> this
> patch updates the register updating code to make sure the WOPCM
> offset
> register is always locked with HUC_LOADING_AGENT_GUC bit set to 1
> which
> will guarantee successful uploading of both GuC and HuC FW. We will
> further
> take care of the locked values in the following enhancement patch.
> 
> Signed-off-by: Jackie Li <yaodong.li@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> Cc: Michal Winiarski <michal.winiarski@intel.com>
> Cc: John Spotswood <john.a.spotswood@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Reviewed-by: John Spotswood <john.a.spotswood@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_wopcm.c | 8 +++-----
>  1 file changed, 3 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_wopcm.c
> b/drivers/gpu/drm/i915/intel_wopcm.c
> index 74bf76f..b1c08ca 100644
> --- a/drivers/gpu/drm/i915/intel_wopcm.c
> +++ b/drivers/gpu/drm/i915/intel_wopcm.c
> @@ -238,8 +238,6 @@ static inline int write_and_verify(struct
> drm_i915_private *dev_priv,
>  int intel_wopcm_init_hw(struct intel_wopcm *wopcm)
>  {
>  	struct drm_i915_private *dev_priv = wopcm_to_i915(wopcm);
> -	u32 huc_agent;
> -	u32 mask;
>  	int err;
>  
>  	if (!USES_GUC(dev_priv))
> @@ -255,10 +253,10 @@ int intel_wopcm_init_hw(struct intel_wopcm
> *wopcm)
>  	if (err)
>  		goto err_out;
>  
> -	huc_agent = USES_HUC(dev_priv) ? HUC_LOADING_AGENT_GUC : 0;
> -	mask = GUC_WOPCM_OFFSET_MASK | GUC_WOPCM_OFFSET_VALID |
> huc_agent;
>  	err = write_and_verify(dev_priv, DMA_GUC_WOPCM_OFFSET,
> -			       wopcm->guc.base | huc_agent, mask,
> +			       wopcm->guc.base |
> HUC_LOADING_AGENT_GUC,
> +			       GUC_WOPCM_OFFSET_MASK |
> HUC_LOADING_AGENT_GUC |
> +			       GUC_WOPCM_OFFSET_VALID,
>  			       GUC_WOPCM_OFFSET_VALID);
>  	if (err)
>  		goto err_out;
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  reply	other threads:[~2018-04-13 23:34 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-10  0:42 [PATCH v3 1/4] drm/i915: Always do WOPCM partitioning based on real firmware sizes Jackie Li
2018-04-10  0:42 ` [PATCH v3 2/4] drm/i915: Always set HUC_LOADING_AGENT_GUC bit in WOPCM offset register Jackie Li
2018-04-13 23:34   ` John Spotswood [this message]
2018-04-14  2:26   ` Michal Wajdeczko
2018-04-16 17:43     ` Yaodong Li
2018-04-19 15:52       ` Michal Wajdeczko
2018-04-19 21:26         ` Yaodong Li
2018-04-10  0:42 ` [PATCH v3 3/4] drm/i915: Add code to accept valid locked WOPCM register values Jackie Li
2018-04-13 23:34   ` John Spotswood
2018-04-14  4:20   ` Michal Wajdeczko
2018-04-16 18:43     ` Yaodong Li
2018-04-19 16:37       ` Michal Wajdeczko
2018-04-19 21:50         ` Yaodong Li
2018-04-10  0:42 ` [PATCH v3 4/4] HAX enable guc for CI Jackie Li
2018-04-10  1:26 ` ✓ Fi.CI.BAT: success for series starting with [v3,1/4] drm/i915: Always do WOPCM partitioning based on real firmware sizes Patchwork
2018-04-10  3:03 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-04-13 23:33 ` [PATCH v3 1/4] " John Spotswood
2018-04-14  2:15 ` Michal Wajdeczko
2018-04-16 17:28   ` Yaodong Li
2018-04-19 15:31     ` Michal Wajdeczko
2018-04-19 21:17       ` Yaodong Li

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