From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AIpwx489ojFQm5hr5TyHfFcp8/7JJ9yE0JvorE5+Qnpdl2EaeQ4e+rGpFDntXYGcywui8DXcpdA/ ARC-Seal: i=1; a=rsa-sha256; t=1523943079; cv=none; d=google.com; s=arc-20160816; b=EgZm/YtSHgBcWX8tifhDJ+VshGt9opBr66WcWMQTZ0kCWtVtgCkys4mujpBz0GqguM vgU6ZKnT0AMrBWegf7G3GhcmBBtw289Vi4IOegDsT365IX1frXHpfdzfnmhWnyUKaX0P 40dO+ScIQhlGXvabb8O+OSHro0+z7G386COjmB+tmmMvj6uxGiB99SZ5DvcmWOC2tiOQ 3+Y61wMSeXsDqqjONLKG+73wiw7K7c7s/L+8qLQqhE2JGidT0Z4afxWqINKJ2MKK+vQM 6hI3dux74lnFki70zz8Y76YjNa8hDiSA1k/P3FVJ2vOk+30KMRusSgFHeyN43mYYwXoJ Ku1Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=message-id:content-transfer-encoding:mime-version:organization :references:in-reply-to:date:cc:to:from:subject :arc-authentication-results; bh=3QyngbaqOa8nXNCJqcgSA355hCrfkTOok8ougHzMtbE=; b=iQEGmty5cGvQdtE8e4d3t/RTZP9U/AzKtyRRjEvrtgLbxREQm7g+1T/CS4uCSnQw7r lAKQmSEYoat8yLoTk38vMkadQa7WmD0xrSLx4Mr6QSFPxlwC0PL7twxnGeN1ATQGiHaU QIyTtkClmSi2pDPwcwagHB4yTGWC+Jm1ckyBmiaw44nl82GUwPSpTqv9zPI5uvzfviHg 2He2WThNsMPW2JZkLm1odrX7JA521w85FtkW6y6kRySu1OJTScbhHhsVHofAcjDHrxKD L3WPxKFcYFS/Bs0k1cSik/p92ooYaWR7mtWD1ssh4GyV07WD4wVr9/3y8xPMD7Sko5d7 aDXg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of alastair@au1.ibm.com designates 148.163.158.5 as permitted sender) smtp.mailfrom=alastair@au1.ibm.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=ibm.com Authentication-Results: mx.google.com; spf=pass (google.com: domain of alastair@au1.ibm.com designates 148.163.158.5 as permitted sender) smtp.mailfrom=alastair@au1.ibm.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=ibm.com Subject: Re: [PATCH 2/7] powerpc: Use TIDR CPU feature to control TIDR allocation From: "Alastair D'Silva" To: Andrew Donnellan , linuxppc-dev@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, mikey@neuling.org, vaibhav@linux.vnet.ibm.com, aneesh.kumar@linux.vnet.ibm.com, malat@debian.org, felix@linux.vnet.ibm.com, pombredanne@nexb.com, sukadev@linux.vnet.ibm.com, npiggin@gmail.com, gregkh@linuxfoundation.org, arnd@arndb.de, fbarrat@linux.vnet.ibm.com, corbet@lwn.net Date: Tue, 17 Apr 2018 15:31:08 +1000 In-Reply-To: <89476138-a279-761a-21be-4a7cd1d80167@au1.ibm.com> References: <20180417020950.21446-1-alastair@au1.ibm.com> <20180417020950.21446-3-alastair@au1.ibm.com> <89476138-a279-761a-21be-4a7cd1d80167@au1.ibm.com> Organization: IBM Australia Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.26.6 (3.26.6-1.fc27) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 x-cbid: 18041705-0044-0000-0000-000005490660 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18041705-0045-0000-0000-0000288911E4 Message-Id: <1523943068.3246.3.camel@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-04-17_03:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1804170049 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1597957550458920157?= X-GMAIL-MSGID: =?utf-8?q?1597970138522335513?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: On Tue, 2018-04-17 at 14:21 +1000, Andrew Donnellan wrote: > On 17/04/18 12:09, Alastair D'Silva wrote: > > From: Alastair D'Silva > > > > Switch the use of TIDR on it's CPU feature, rather than assuming it > > is available based on architecture. > > > > Signed-off-by: Alastair D'Silva > > There's a use of TIDR in restore_sprs() that's behind the ARCH_300 > flag > as well, ideally it should never trigger in the !P9_TIDR case, but > you > might want to update that too for clarity? > Thanks for the review, I'll include your suggestions in the next set. -- Alastair D'Silva Open Source Developer Linux Technology Centre, IBM Australia mob: 0423 762 819 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.1 (2015-04-28) on archive.lwn.net X-Spam-Level: X-Spam-Status: No, score=-5.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham autolearn_force=no version=3.4.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by archive.lwn.net (Postfix) with ESMTP id ABE217DE74 for ; Tue, 17 Apr 2018 05:31:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750802AbeDQFbU (ORCPT ); Tue, 17 Apr 2018 01:31:20 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:53328 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750765AbeDQFbT (ORCPT ); Tue, 17 Apr 2018 01:31:19 -0400 Received: from pps.filterd (m0098396.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w3H5Tqik060048 for ; Tue, 17 Apr 2018 01:31:19 -0400 Received: from e06smtp14.uk.ibm.com (e06smtp14.uk.ibm.com [195.75.94.110]) by mx0a-001b2d01.pphosted.com with ESMTP id 2hd7q3q5e0-1 (version=TLSv1.2 cipher=AES256-SHA256 bits=256 verify=NOT) for ; Tue, 17 Apr 2018 01:31:18 -0400 Received: from localhost by e06smtp14.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 17 Apr 2018 06:31:11 +0100 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w3H5VBUG10355020; Tue, 17 Apr 2018 05:31:11 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 85A01A405F; Tue, 17 Apr 2018 06:23:20 +0100 (BST) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 332D0A4053; Tue, 17 Apr 2018 06:23:20 +0100 (BST) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Tue, 17 Apr 2018 06:23:20 +0100 (BST) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 14E01A0195; Tue, 17 Apr 2018 15:31:09 +1000 (AEST) Subject: Re: [PATCH 2/7] powerpc: Use TIDR CPU feature to control TIDR allocation From: "Alastair D'Silva" To: Andrew Donnellan , linuxppc-dev@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, mikey@neuling.org, vaibhav@linux.vnet.ibm.com, aneesh.kumar@linux.vnet.ibm.com, malat@debian.org, felix@linux.vnet.ibm.com, pombredanne@nexb.com, sukadev@linux.vnet.ibm.com, npiggin@gmail.com, gregkh@linuxfoundation.org, arnd@arndb.de, fbarrat@linux.vnet.ibm.com, corbet@lwn.net Date: Tue, 17 Apr 2018 15:31:08 +1000 In-Reply-To: <89476138-a279-761a-21be-4a7cd1d80167@au1.ibm.com> References: <20180417020950.21446-1-alastair@au1.ibm.com> <20180417020950.21446-3-alastair@au1.ibm.com> <89476138-a279-761a-21be-4a7cd1d80167@au1.ibm.com> Organization: IBM Australia Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.26.6 (3.26.6-1.fc27) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 x-cbid: 18041705-0044-0000-0000-000005490660 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18041705-0045-0000-0000-0000288911E4 Message-Id: <1523943068.3246.3.camel@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-04-17_03:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1804170049 Sender: linux-doc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-doc@vger.kernel.org On Tue, 2018-04-17 at 14:21 +1000, Andrew Donnellan wrote: > On 17/04/18 12:09, Alastair D'Silva wrote: > > From: Alastair D'Silva > > > > Switch the use of TIDR on it's CPU feature, rather than assuming it > > is available based on architecture. > > > > Signed-off-by: Alastair D'Silva > > There's a use of TIDR in restore_sprs() that's behind the ARCH_300 > flag > as well, ideally it should never trigger in the !P9_TIDR case, but > you > might want to update that too for clarity? > Thanks for the review, I'll include your suggestions in the next set. -- Alastair D'Silva Open Source Developer Linux Technology Centre, IBM Australia mob: 0423 762 819 -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html