From mboxrd@z Thu Jan 1 00:00:00 1970 From: Hemant Agrawal Subject: [PATCH] bus/fslmc: fix the compilation with clang 3.4 Date: Thu, 19 Apr 2018 18:02:39 +0530 Message-ID: <1524141159-19909-1-git-send-email-hemant.agrawal@nxp.com> Mime-Version: 1.0 Content-Type: text/plain Cc: kirill.rybalchenko@intel.com, maxime.coquelin@redhat.com To: dev@dpdk.org Return-path: Received: from EUR02-VE1-obe.outbound.protection.outlook.com (mail-eopbgr20062.outbound.protection.outlook.com [40.107.2.62]) by dpdk.org (Postfix) with ESMTP id 87A9BCF9E for ; Thu, 19 Apr 2018 14:34:48 +0200 (CEST) List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" error: redefinition of typedef 'dma_addr_t' is a C11 feature [-Werror,-Wtypedef-redefinition] Fixes: 4bc5ab88dbd6 ("net/dpaa2: fix Tx only mode") Cc: stable@dpdk.org Signed-off-by: Hemant Agrawal --- drivers/bus/fslmc/qbman/include/fsl_qbman_base.h | 2 -- drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 3 +++ drivers/net/dpaa2/dpaa2_rxtx.c | 4 ++-- 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h index 96269ed..bb60a98 100644 --- a/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h +++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h @@ -6,8 +6,6 @@ #ifndef _FSL_QBMAN_BASE_H #define _FSL_QBMAN_BASE_H -typedef uint64_t dma_addr_t; - /** * DOC: QBMan basic structures * diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c index 23012e3..3700d70 100644 --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c @@ -30,6 +30,9 @@ #include "dpaa2_sec_priv.h" #include "dpaa2_sec_logs.h" +/* Required types */ +typedef uint64_t dma_addr_t; + /* RTA header files */ #include #include diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c index ef3a897..dc0da96 100644 --- a/drivers/net/dpaa2/dpaa2_rxtx.c +++ b/drivers/net/dpaa2/dpaa2_rxtx.c @@ -481,7 +481,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) q_storage->last_num_pkts); qbman_pull_desc_set_fq(&pulldesc, fqid); qbman_pull_desc_set_storage(&pulldesc, dq_storage, - (dma_addr_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1); + (uint64_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1); if (check_swp_active_dqs(DPAA2_PER_LCORE_ETHRX_DPIO->index)) { while (!qbman_check_command_complete( get_swp_active_dqs( @@ -517,7 +517,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) qbman_pull_desc_set_numframes(&pulldesc, DPAA2_DQRR_RING_SIZE); qbman_pull_desc_set_fq(&pulldesc, fqid); qbman_pull_desc_set_storage(&pulldesc, dq_storage1, - (dma_addr_t)(DPAA2_VADDR_TO_IOVA(dq_storage1)), 1); + (uint64_t)(DPAA2_VADDR_TO_IOVA(dq_storage1)), 1); /* Check if the previous issued command is completed. * Also seems like the SWP is shared between the Ethernet Driver -- 2.7.4